ath79: add support for Senao Engenius EAP1750H
[openwrt/staging/dedeckeh.git] / target / linux / ath79 / dts / qca9558_engenius_eap1750h.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x_senao_loader.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "engenius,eap1750h", "qca,qca9558";
10 model = "EnGenius EAP1750H";
11
12 aliases {
13 label-mac-device = &eth0;
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-running = &led_power;
17 led-upgrade = &led_power;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
26 debounce-interval = <60>;
27 linux,code = <KEY_RESTART>;
28 };
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 led_power: power {
35 label = "amber:power";
36 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
37 default-state = "on";
38 };
39
40 wifi2g {
41 label = "blue:wifi2g";
42 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
43 linux,default-trigger = "phy1tpt";
44 };
45
46 wifi5g {
47 label = "green:wifi5g";
48 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
49 linux,default-trigger = "phy0tpt";
50 };
51
52 wps {
53 label = "blue:wps";
54 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
55 };
56 };
57 };
58
59 &partitions {
60 art: partition@ff0000 {
61 label = "art";
62 reg = <0xff0000 0x010000>;
63 read-only;
64 };
65 };
66
67 &mdio0 {
68 status = "okay";
69
70 phy5: ethernet-phy@5 {
71 reg = <5>;
72 eee-broken-100tx;
73 eee-broken-1000t;
74 };
75 };
76
77 &eth0 {
78 status = "okay";
79
80 nvmem-cells = <&macaddr_art_0>;
81 nvmem-cell-names = "mac-address";
82
83 phy-handle = <&phy5>;
84 phy-mode = "rgmii-id";
85
86 pll-data = <0x82000000 0x80000101 0x80001313>;
87 };
88
89 &wmac {
90 status = "okay";
91
92 nvmem-cells = <&macaddr_art_0>, <&calibration_ath9k>;
93 nvmem-cell-names = "mac-address", "calibration";
94 mac-address-increment = <1>;
95 };
96
97 &ath10k {
98 status = "okay";
99
100 nvmem-cells = <&macaddr_art_0>, <&calibration_ath10k>;
101 nvmem-cell-names = "mac-address", "calibration";
102 mac-address-increment = <2>;
103 };
104
105 &art {
106 compatible = "nvmem-cells";
107
108 macaddr_art_0: macaddr@0 {
109 reg = <0x0 0x6>;
110 };
111
112 calibration_ath9k: calibration@1000 {
113 reg = <0x1000 0x440>;
114 };
115
116 calibration_ath10k: calibration@5000 {
117 reg = <0x5000 0x844>;
118 };
119 };