1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,qca9550";
12 bootargs = "console=ttyS0,115200n8";
21 compatible = "mips,mips74Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
28 compatible = "fixed-clock";
30 clock-output-names = "ref";
31 clock-frequency = <40000000>;
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9550-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x100>;
41 #qca,ddr-wb-channel-cells = <1>;
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
50 clocks = <&pll ATH79_CLK_REF>;
60 usb_phy0: usb-phy0@18030000 {
61 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
62 reg = <0x18030000 4>, <0x18030004 4>;
64 reset-names = "usb-phy", "usb-suspend-override";
65 resets = <&rst 4>, <&rst 3>;
72 usb_phy1: usb-phy1@18030010 {
73 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
74 reg = <0x18030010 4>, <0x18030014 4>;
76 reset-names = "usb-phy", "usb-suspend-override";
77 resets = <&rst2 4>, <&rst2 3>;
85 compatible = "qca,qca9550-gpio",
87 reg = <0x18040000 0x28>;
96 #interrupt-cells = <2>;
99 pinmux: pinmux@1804002c {
100 compatible = "pinctrl-single";
102 reg = <0x1804002c 0x44>;
106 pinctrl-single,bit-per-mux;
107 pinctrl-single,register-width = <32>;
108 pinctrl-single,function-mask = <0x1>;
109 #pinctrl-cells = <2>;
111 jtag_disable_pins: pinmux_jtag_disable_pins {
112 pinctrl-single,bits = <0x40 0x2 0x2>;
116 pll: pll-controller@18050000 {
117 compatible = "qca,qca9550-pll",
118 "qca,qca9550-pll", "syscon";
119 reg = <0x18050000 0x50>;
122 clock-output-names = "cpu", "ddr", "ahb";
128 compatible = "qca,ar7130-wdt";
129 reg = <0x18060008 0x8>;
133 clocks = <&pll ATH79_CLK_AHB>;
137 rst: reset-controller@1806001c {
138 compatible = "qca,qca9550-reset",
140 reg = <0x1806001c 0x4>;
143 interrupt-parent = <&cpuintc>;
145 intc2: interrupt-controller2 {
146 compatible = "qca,ar9340-intc";
148 interrupt-parent = <&cpuintc>;
151 interrupt-controller;
152 #interrupt-cells = <1>;
154 qca,int-status-addr = <0xac>;
155 qca,pending-bits = <0xf>, /* wmac */
156 <0x1f0>; /* pcie rc 0 */
159 intc3: interrupt-controller3 {
160 compatible = "qca,ar9340-intc";
162 interrupt-parent = <&cpuintc>;
165 interrupt-controller;
166 #interrupt-cells = <1>;
168 qca,int-status-addr = <0xac>;
169 qca,pending-bits = <0x1f000>, /* pcie rc 1 */
170 <0x1000000>, /* usb1 */
171 <0x10000000>; /* usb2 */
175 rst2: reset-controller@180600c0 {
176 compatible = "qca,qca9550-reset",
179 reg = <0x180600c0 0x4>;
185 gmac: gmac@18070000 {
186 compatible = "qca,qca9550-gmac";
187 reg = <0x18070000 0x58>;
190 pcie0: pcie-controller@180c0000 {
191 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
192 #address-cells = <3>;
194 bus-range = <0x0 0x0>;
195 reg = <0x180c0000 0x1000>, /* CRP */
196 <0x180f0000 0x100>, /* CTRL */
197 <0x14000000 0x1000>; /* CFG */
198 reg-names = "crp_base", "ctrl_base", "cfg_base";
199 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
200 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
201 interrupt-parent = <&intc2>;
204 resets = <&rst 6>, <&rst 7>;
205 reset-names = "hc", "phy";
207 interrupt-controller;
208 #interrupt-cells = <1>;
210 interrupt-map-mask = <0 0 0 1>;
211 interrupt-map = <0 0 0 0 &pcie0 0>;
215 wmac: wmac@18100000 {
216 compatible = "qca,qca9550-wmac";
217 reg = <0x18100000 0x10000>;
219 interrupt-parent = <&intc2>;
225 pcie1: pcie-controller@18250000 {
226 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
227 #address-cells = <3>;
229 bus-range = <0x0 0x0>;
230 reg = <0x18250000 0x1000>, /* CRP */
231 <0x18280000 0x100>, /* CTRL */
232 <0x16000000 0x1000>; /* CFG */
233 reg-names = "crp_base", "ctrl_base", "cfg_base";
234 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
235 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */
236 interrupt-parent = <&intc3>;
239 resets = <&rst2 6>, <&rst2 7>;
240 reset-names = "hc", "phy";
242 interrupt-controller;
243 #interrupt-cells = <1>;
245 interrupt-map-mask = <0 0 0 1>;
246 interrupt-map = <0 0 0 0 &pcie1 0>;
251 compatible = "generic-ehci";
252 reg = <0x1b000000 0x1fc>;
254 interrupt-parent = <&intc3>;
257 reset-names = "usb-host";
259 has-transaction-translator;
260 caps-offset = <0x100>;
262 phy-names = "usb-phy0";
269 compatible = "generic-ehci";
270 reg = <0x1b400000 0x1fc>;
272 interrupt-parent = <&intc3>;
275 reset-names = "usb-host";
277 has-transaction-translator;
278 caps-offset = <0x100>;
280 phy-names = "usb-phy1";
286 nand: nand@1b800200 {
287 compatible = "qca,ar934x-nand";
288 reg = <0x1b800200 0xb8>;
291 interrupt-parent = <&miscintc>;
294 reset-names = "nand";
296 nand-ecc-mode = "hw";
298 #address-cells = <1>;
305 compatible = "qca,ar934x-spi";
306 reg = <0x1f000000 0x1c>;
308 clocks = <&pll ATH79_CLK_AHB>;
312 #address-cells = <1>;
319 compatible = "qca,ar9340-mdio";
323 compatible = "qca,qca9550-eth", "syscon";
325 pll-reg = <0 0x28 0>;
328 pll-data = <0x16000000 0x00000101 0x00001616>;
331 resets = <&rst 9>, <&rst 22>;
332 reset-names = "mac", "mdio";
336 compatible = "qca,ar9340-mdio";
340 compatible = "qca,qca9550-eth", "syscon";
342 pll-reg = <0 0x48 0>;
345 pll-data = <0x16000000 0x00000101 0x00001616>;
348 resets = <&rst 13>, <&rst 23>;
349 reset-names = "mac", "mdio";