1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 compatible = "qca,qca9550";
12 bootargs = "console=ttyS0,115200n8";
21 compatible = "mips,mips74Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
28 compatible = "fixed-clock";
30 clock-output-names = "ref";
31 clock-frequency = <40000000>;
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9550-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x100>;
41 #qca,ddr-wb-channel-cells = <1>;
44 uart0: uart@18020000 {
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
50 clocks = <&pll ATH79_CLK_REF>;
58 usb_phy0: usb-phy0@18030000 {
59 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
60 reg = <0x18030000 4>, <0x18030004 4>;
62 reset-names = "usb-phy", "usb-suspend-override";
63 resets = <&rst 4>, <&rst 3>;
70 usb_phy1: usb-phy1@18030010 {
71 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
72 reg = <0x18030010 4>, <0x18030014 4>;
74 reset-names = "usb-phy", "usb-suspend-override";
75 resets = <&rst2 4>, <&rst2 3>;
83 compatible = "qca,qca9550-gpio",
85 reg = <0x18040000 0x28>;
94 #interrupt-cells = <2>;
97 pinmux: pinmux@1804002c {
98 compatible = "pinctrl-single";
100 reg = <0x1804002c 0x44>;
104 pinctrl-single,bit-per-mux;
105 pinctrl-single,register-width = <32>;
106 pinctrl-single,function-mask = <0x1>;
107 #pinctrl-cells = <2>;
109 jtag_disable_pins: pinmux_jtag_disable_pins {
110 pinctrl-single,bits = <0x40 0x2 0x2>;
114 pll: pll-controller@18050000 {
115 compatible = "qca,qca9550-pll", "syscon";
116 reg = <0x18050000 0x50>;
119 clock-output-names = "cpu", "ddr", "ahb";
126 compatible = "qca,ar7130-wdt";
127 reg = <0x18060008 0x8>;
131 clocks = <&pll ATH79_CLK_AHB>;
135 rst: reset-controller@1806001c {
136 compatible = "qca,qca9550-reset",
138 reg = <0x1806001c 0x4>;
141 interrupt-parent = <&cpuintc>;
143 intc2: interrupt-controller2 {
144 compatible = "qca,ar9340-intc";
146 interrupt-parent = <&cpuintc>;
149 interrupt-controller;
150 #interrupt-cells = <1>;
152 qca,int-status-addr = <0xac>;
153 qca,pending-bits = <0xf>, /* wmac */
154 <0x1f0>; /* pcie rc 0 */
157 intc3: interrupt-controller3 {
158 compatible = "qca,ar9340-intc";
160 interrupt-parent = <&cpuintc>;
163 interrupt-controller;
164 #interrupt-cells = <1>;
166 qca,int-status-addr = <0xac>;
167 qca,pending-bits = <0x1f000>, /* pcie rc 1 */
168 <0x1000000>, /* usb1 */
169 <0x10000000>; /* usb2 */
173 rst2: reset-controller@180600c0 {
174 compatible = "qca,qca9550-reset",
177 reg = <0x180600c0 0x4>;
182 uart1: uart@18500000 {
183 compatible = "qca,ar9330-uart";
184 reg = <0x18500000 0x14>;
188 clocks = <&pll ATH79_CLK_REF>;
189 clock-names = "uart";
195 gmac: gmac@18070000 {
196 compatible = "qca,qca9550-gmac";
197 reg = <0x18070000 0x58>;
200 pcie0: pcie@180c0000 {
201 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
202 #address-cells = <3>;
204 bus-range = <0x0 0x0>;
205 reg = <0x180c0000 0x1000>, /* CRP */
206 <0x180f0000 0x100>, /* CTRL */
207 <0x14000000 0x1000>; /* CFG */
208 reg-names = "crp_base", "ctrl_base", "cfg_base";
209 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
210 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
211 interrupt-parent = <&intc2>;
216 resets = <&rst 6>, <&rst 7>;
217 reset-names = "hc", "phy";
219 interrupt-controller;
220 #interrupt-cells = <1>;
222 interrupt-map-mask = <0 0 0 1>;
223 interrupt-map = <0 0 0 0 &pcie0 0>;
227 wmac: wmac@18100000 {
228 compatible = "qca,qca9550-wmac";
229 reg = <0x18100000 0x10000>;
231 interrupt-parent = <&intc2>;
237 pcie1: pcie@18250000 {
238 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
239 #address-cells = <3>;
241 bus-range = <0x0 0x0>;
242 reg = <0x18250000 0x1000>, /* CRP */
243 <0x18280000 0x100>, /* CTRL */
244 <0x16000000 0x1000>; /* CFG */
245 reg-names = "crp_base", "ctrl_base", "cfg_base";
246 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
247 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */
248 interrupt-parent = <&intc3>;
253 resets = <&rst2 6>, <&rst2 7>;
254 reset-names = "hc", "phy";
256 interrupt-controller;
257 #interrupt-cells = <1>;
259 interrupt-map-mask = <0 0 0 1>;
260 interrupt-map = <0 0 0 0 &pcie1 0>;
265 compatible = "generic-ehci";
266 reg = <0x1b000000 0x1fc>;
268 interrupt-parent = <&intc3>;
271 reset-names = "usb-host";
273 has-transaction-translator;
274 caps-offset = <0x100>;
276 phy-names = "usb-phy0";
281 #address-cells = <1>;
286 #trigger-source-cells = <0>;
291 compatible = "generic-ehci";
292 reg = <0x1b400000 0x1fc>;
294 interrupt-parent = <&intc3>;
297 reset-names = "usb-host";
299 has-transaction-translator;
300 caps-offset = <0x100>;
302 phy-names = "usb-phy1";
307 #address-cells = <1>;
312 #trigger-source-cells = <0>;
316 nand: nand@1b800200 {
317 compatible = "qca,ar934x-nand";
318 reg = <0x1b800200 0xb8>;
321 interrupt-parent = <&miscintc>;
324 reset-names = "nand";
326 nand-ecc-mode = "hw";
332 compatible = "qca,ar934x-spi";
333 reg = <0x1f000000 0x1c>;
335 clocks = <&pll ATH79_CLK_AHB>;
339 #address-cells = <1>;
346 compatible = "qca,ar9340-mdio";
350 compatible = "qca,qca9550-eth", "syscon";
352 pll-reg = <0 0x28 0>;
355 pll-data = <0x16000000 0x00000101 0x00001616>;
358 resets = <&rst 9>, <&rst 22>;
359 reset-names = "mac", "mdio";
363 compatible = "qca,ar9340-mdio";
367 compatible = "qca,qca9550-eth", "syscon";
369 pll-reg = <0 0x48 0>;
372 pll-data = <0x16000000 0x00000101 0x00001616>;
375 resets = <&rst 13>, <&rst 23>;
376 reset-names = "mac", "mdio";