ath79: increase spi clock for D-Link DIR-842
[openwrt/staging/luka.git] / target / linux / ath79 / dts / qca9563_dlink_dir-842-c.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "qca956x.dtsi"
7
8 / {
9 chosen {
10 bootargs = "console=ttyS0,115200n8";
11 };
12
13 keys {
14 compatible = "gpio-keys";
15
16 wps {
17 linux,code = <KEY_WPS_BUTTON>;
18 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
19 debounce-interval = <60>;
20 };
21
22 reset {
23 linux,code = <KEY_RESTART>;
24 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
25 debounce-interval = <60>;
26 };
27 };
28 };
29
30 &uart {
31 status = "okay";
32 };
33
34 &pcie {
35 status = "okay";
36 };
37
38 &spi {
39 status = "okay";
40
41 num-cs = <1>;
42
43 flash@0 {
44 compatible = "jedec,spi-nor";
45 reg = <0>;
46 spi-max-frequency = <50000000>;
47
48 partitions {
49 compatible = "fixed-partitions";
50 #address-cells = <1>;
51 #size-cells = <1>;
52
53 partition@0 {
54 label = "u-boot";
55 reg = <0x000000 0x40000>;
56 read-only;
57 };
58
59 partition@40000 {
60 label = "u-boot-env";
61 reg = <0x040000 0x10000>;
62 read-only;
63 };
64
65 partition@50000 {
66 label = "devdata";
67 reg = <0x050000 0x10000>;
68 read-only;
69 };
70
71 partition@60000 {
72 label = "devconf";
73 reg = <0x060000 0x10000>;
74 read-only;
75 };
76
77 partition@70000 {
78 label = "misc";
79 reg = <0x070000 0x10000>;
80 read-only;
81 };
82
83 partition@80000 {
84 compatible = "seama";
85 label = "firmware";
86 reg = <0x080000 0xf50000>;
87 };
88
89 art: partition@fd0000 {
90 label = "art";
91 reg = <0xfd0000 0x010000>;
92 read-only;
93 };
94
95 partition@fe0000 {
96 label = "reserved";
97 reg = <0xfe0000 0x20000>;
98 read-only;
99 };
100 };
101 };
102 };
103
104 &mdio0 {
105 status = "okay";
106
107 phy-mask = <0>;
108
109 phy0: ethernet-phy@0 {
110 reg = <0>;
111 qca,mib-poll-interval = <500>;
112 reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
113
114 qca,ar8327-initvals = <
115 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
116 0x10 0x81000080 /* POWER_ON_STRIP */
117 0x50 0xcc35cc35 /* LED_CTRL0 */
118 0x54 0xcb37cb37 /* LED_CTRL1 */
119 0x58 0x00000000 /* LED_CTRL2 */
120 0x5c 0x00f3cf00 /* LED_CTRL3 */
121 0x7c 0x0000007e /* PORT0_STATUS */
122 >;
123 };
124 };
125
126 &eth0 {
127 status = "okay";
128
129 pll-data = <0x03000101 0x00000101 0x00001919>;
130
131 phy-mode = "sgmii";
132 phy-handle = <&phy0>;
133 };
134
135 &wmac {
136 status = "okay";
137
138 qca,no-eeprom;
139 };