1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qca956x.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 compatible = "gpio-keys";
14 linux,code = <KEY_WPS_BUTTON>;
15 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
16 debounce-interval = <60>;
21 linux,code = <KEY_RESTART>;
22 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
23 debounce-interval = <60>;
32 compatible = "qcom,ath10k";
33 reg = <0x0000 0 0 0 0>;
35 nvmem-cells = <&calibration_ath10k>, <&macaddr_devdata_94>;
36 nvmem-cell-names = "calibration", "mac-address-ascii";
44 compatible = "jedec,spi-nor";
46 spi-max-frequency = <25000000>;
49 compatible = "fixed-partitions";
55 reg = <0x000000 0x040000>;
59 bdcfg: partition@40000 {
60 compatible = "u-boot,env";
62 reg = <0x040000 0x010000>;
67 reg = <0x050000 0x010000>;
70 compatible = "nvmem-cells";
74 macaddr_devdata_94: macaddr@94 {
78 macaddr_devdata_b0: macaddr@b0 {
85 reg = <0x060000 0x010000>;
92 reg = <0x070000 0xf80000>;
97 reg = <0xff0000 0x010000>;
100 compatible = "nvmem-cells";
101 #address-cells = <1>;
104 calibration_ath9k: calibration@1000 {
105 reg = <0x1000 0x440>;
108 calibration_ath10k: calibration@5000 {
109 reg = <0x5000 0x844>;
119 phy0: ethernet-phy@0 {
122 qca,mib-poll-interval = <500>;
124 reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
126 qca,ar8327-initvals = <
127 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
128 0x10 0x81000080 /* POWER_ON_STRAP */
129 0x50 0xcc35cc35 /* LED_CTRL0 */
130 0x54 0xcb37cb37 /* LED_CTRL1 */
131 0x58 0x00000000 /* LED_CTRL2 */
132 0x5c 0x00f3cf00 /* LED_CTRL3 */
133 0x7c 0x0000007e /* PORT0_STATUS */
141 pll-data = <0x03000101 0x00000101 0x00001919>;
144 phy-handle = <&phy0>;
150 nvmem-cells = <&calibration_ath9k>, <&macaddr_devdata_b0>;
151 nvmem-cell-names = "calibration", "mac-address-ascii";