1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qca956x.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
11 compatible = "gpio-keys";
14 linux,code = <KEY_WPS_BUTTON>;
15 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
16 debounce-interval = <60>;
20 linux,code = <KEY_RESTART>;
21 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
22 debounce-interval = <60>;
31 compatible = "qcom,ath10k";
32 reg = <0x0000 0 0 0 0>;
34 nvmem-cells = <&calibration_ath10k>, <&macaddr_devdata_94>;
35 nvmem-cell-names = "calibration", "mac-address-ascii";
43 compatible = "jedec,spi-nor";
45 spi-max-frequency = <50000000>;
48 compatible = "fixed-partitions";
54 reg = <0x000000 0x40000>;
60 reg = <0x040000 0x10000>;
66 reg = <0x050000 0x10000>;
69 compatible = "nvmem-cells";
73 macaddr_devdata_94: macaddr@94 {
77 macaddr_devdata_b0: macaddr@b0 {
84 reg = <0x060000 0x10000>;
91 reg = <0x070000 0xf80000>;
96 reg = <0xff0000 0x010000>;
99 compatible = "nvmem-cells";
100 #address-cells = <1>;
103 calibration_ath9k: calibration@1000 {
104 reg = <0x1000 0x440>;
107 calibration_ath10k: calibration@5000 {
108 reg = <0x5000 0x844>;
118 phy0: ethernet-phy@0 {
121 qca,mib-poll-interval = <500>;
123 reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
125 qca,ar8327-initvals = <
126 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
127 0x10 0x81000080 /* POWER_ON_STRAP */
128 0x50 0xcc35cc35 /* LED_CTRL0 */
129 0x54 0xcb37cb37 /* LED_CTRL1 */
130 0x58 0x00000000 /* LED_CTRL2 */
131 0x5c 0x00f3cf00 /* LED_CTRL3 */
132 0x7c 0x0000007e /* PORT0_STATUS */
140 pll-data = <0x03000101 0x00000101 0x00001919>;
143 phy-handle = <&phy0>;
149 nvmem-cells = <&calibration_ath9k>, <&macaddr_devdata_b0>;
150 nvmem-cell-names = "calibration", "mac-address-ascii";