1 From 0e7f36bfd68401e8c42933e7f770f270497bb9a8 Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Tue, 6 Mar 2018 09:23:25 +0100
4 Subject: [PATCH 21/27] MIPS: ath79: turn pci-ar724x driver into a pure OF
7 Signed-off-by: John Crispin <john@phrozen.org>
9 arch/mips/pci/pci-ar724x.c | 86 +++++++++++++++++++++-------------------------
10 1 file changed, 40 insertions(+), 46 deletions(-)
12 --- a/arch/mips/pci/pci-ar724x.c
13 +++ b/arch/mips/pci/pci-ar724x.c
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 +#include <linux/irqchip/chained_irq.h>
19 #include <asm/mach-ath79/ath79.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
21 +#include <linux/of_irq.h>
22 +#include <linux/of_pci.h>
24 #define AR724X_PCI_REG_APP 0x00
25 #define AR724X_PCI_REG_RESET 0x18
26 @@ -45,17 +48,20 @@ struct ar724x_pci_controller {
27 void __iomem *crp_base;
36 + struct device_node *np;
37 struct pci_controller pci_controller;
38 + struct irq_domain *domain;
39 struct resource io_res;
40 struct resource mem_res;
43 +static struct irq_chip ar724x_pci_irq_chip;
45 static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
48 @@ -231,35 +237,31 @@ static struct pci_ops ar724x_pci_ops = {
50 static void ar724x_pci_irq_handler(struct irq_desc *desc)
52 - struct ar724x_pci_controller *apc;
54 + struct irq_chip *chip = irq_desc_get_chip(desc);
55 + struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc);
58 - apc = irq_desc_get_handler_data(desc);
59 - base = apc->ctrl_base;
61 - pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
62 - __raw_readl(base + AR724X_PCI_REG_INT_MASK);
63 + chained_irq_enter(chip, desc);
64 + pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) &
65 + __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK);
67 if (pending & AR724X_PCI_INT_DEV0)
68 - generic_handle_irq(apc->irq_base + 0);
70 + generic_handle_irq(irq_linear_revmap(apc->domain, 1));
73 + chained_irq_exit(chip, desc);
76 static void ar724x_pci_irq_unmask(struct irq_data *d)
78 struct ar724x_pci_controller *apc;
83 apc = irq_data_get_irq_chip_data(d);
84 base = apc->ctrl_base;
85 - offset = apc->irq_base - d->irq;
88 + switch (irq_linear_revmap(apc->domain, d->irq)) {
90 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
91 __raw_writel(t | AR724X_PCI_INT_DEV0,
92 @@ -273,14 +275,12 @@ static void ar724x_pci_irq_mask(struct i
94 struct ar724x_pci_controller *apc;
99 apc = irq_data_get_irq_chip_data(d);
100 base = apc->ctrl_base;
101 - offset = apc->irq_base - d->irq;
104 + switch (irq_linear_revmap(apc->domain, d->irq)) {
106 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
107 __raw_writel(t & ~AR724X_PCI_INT_DEV0,
108 @@ -305,26 +305,32 @@ static struct irq_chip ar724x_pci_irq_ch
109 .irq_mask_ack = ar724x_pci_irq_mask,
112 +static int ar724x_pci_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
114 + struct ar724x_pci_controller *apc = d->host_data;
116 + irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq);
117 + irq_set_chip_data(irq, apc);
122 +static const struct irq_domain_ops ar724x_pci_domain_ops = {
123 + .xlate = irq_domain_xlate_onecell,
124 + .map = ar724x_pci_irq_map,
127 static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
133 base = apc->ctrl_base;
135 __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
136 __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
138 - apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
140 - for (i = apc->irq_base;
141 - i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
142 - irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
144 - irq_set_chip_data(i, apc);
147 + apc->domain = irq_domain_add_linear(apc->np, 2, &ar724x_pci_domain_ops, apc);
148 irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
151 @@ -394,29 +400,11 @@ static int ar724x_pci_probe(struct platf
155 - res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
159 - apc->io_res.parent = res;
160 - apc->io_res.name = "PCI IO space";
161 - apc->io_res.start = res->start;
162 - apc->io_res.end = res->end;
163 - apc->io_res.flags = IORESOURCE_IO;
165 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
169 - apc->mem_res.parent = res;
170 - apc->mem_res.name = "PCI memory space";
171 - apc->mem_res.start = res->start;
172 - apc->mem_res.end = res->end;
173 - apc->mem_res.flags = IORESOURCE_MEM;
175 + apc->np = pdev->dev.of_node;
176 apc->pci_controller.pci_ops = &ar724x_pci_ops;
177 apc->pci_controller.io_resource = &apc->io_res;
178 apc->pci_controller.mem_resource = &apc->mem_res;
179 + pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node);
182 * Do the full PCIE Root Complex Initialization Sequence if the PCIe
183 @@ -438,10 +426,16 @@ static int ar724x_pci_probe(struct platf
187 +static const struct of_device_id ar724x_pci_ids[] = {
188 + { .compatible = "qcom,ar7240-pci" },
192 static struct platform_driver ar724x_pci_driver = {
193 .probe = ar724x_pci_probe,
195 .name = "ar724x-pci",
196 + .of_match_table = of_match_ptr(ar724x_pci_ids),