1 From f4128f3224df2309262ef8d1275d928717ebefd0 Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Tue, 6 Mar 2018 09:21:46 +0100
4 Subject: [PATCH 22/27] MIPS: ath79: drop pci.c
6 This patch drops pci.c fromt he ath79 folder and moves the the pcibios
7 callbacks to a new fixup file.
9 Signed-off-by: John Crispin <john@phrozen.org>
11 arch/mips/ath79/Makefile | 1 -
12 arch/mips/ath79/pci.c | 285 --------------------------------------------
13 arch/mips/pci/Makefile | 1 +
14 arch/mips/pci/fixup-ath79.c | 21 ++++
15 4 files changed, 22 insertions(+), 286 deletions(-)
16 delete mode 100644 arch/mips/ath79/pci.c
17 create mode 100644 arch/mips/pci/fixup-ath79.c
19 Index: linux-4.14.25/arch/mips/ath79/Makefile
20 ===================================================================
21 --- linux-4.14.25.orig/arch/mips/ath79/Makefile
22 +++ linux-4.14.25/arch/mips/ath79/Makefile
24 obj-y := prom.o setup.o irq.o common.o clock.o
26 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
27 -obj-$(CONFIG_PCI) += pci.o
31 Index: linux-4.14.25/arch/mips/ath79/pci.c
32 ===================================================================
33 --- linux-4.14.25.orig/arch/mips/ath79/pci.c
37 - * Atheros AR71XX/AR724X specific PCI setup code
39 - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
40 - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
41 - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
43 - * Parts of this file are based on Atheros' 2.6.15 BSP
45 - * This program is free software; you can redistribute it and/or modify it
46 - * under the terms of the GNU General Public License version 2 as published
47 - * by the Free Software Foundation.
50 -#include <linux/init.h>
51 -#include <linux/pci.h>
52 -#include <linux/resource.h>
53 -#include <linux/platform_device.h>
54 -#include <asm/mach-ath79/ar71xx_regs.h>
55 -#include <asm/mach-ath79/ath79.h>
56 -#include <asm/mach-ath79/irq.h>
59 -static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
60 -static const struct ath79_pci_irq *ath79_pci_irq_map;
61 -static unsigned ath79_pci_nr_irqs;
63 -static const struct ath79_pci_irq ar71xx_pci_irq_map[] = {
67 - .irq = ATH79_PCI_IRQ(0),
71 - .irq = ATH79_PCI_IRQ(1),
75 - .irq = ATH79_PCI_IRQ(2),
79 -static const struct ath79_pci_irq ar724x_pci_irq_map[] = {
83 - .irq = ATH79_PCI_IRQ(0),
87 -static const struct ath79_pci_irq qca955x_pci_irq_map[] = {
92 - .irq = ATH79_PCI_IRQ(0),
98 - .irq = ATH79_PCI_IRQ(1),
102 -int pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
107 - if (ath79_pci_nr_irqs == 0 ||
108 - ath79_pci_irq_map == NULL) {
109 - if (soc_is_ar71xx()) {
110 - ath79_pci_irq_map = ar71xx_pci_irq_map;
111 - ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
112 - } else if (soc_is_ar724x() ||
115 - ath79_pci_irq_map = ar724x_pci_irq_map;
116 - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
117 - } else if (soc_is_qca955x()) {
118 - ath79_pci_irq_map = qca955x_pci_irq_map;
119 - ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
120 - } else if (soc_is_qca956x()) {
121 - ath79_pci_irq_map = qca956x_pci_irq_map;
122 - ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map);
124 - pr_crit("pci %s: invalid irq map\n",
125 - pci_name((struct pci_dev *) dev));
130 - for (i = 0; i < ath79_pci_nr_irqs; i++) {
131 - const struct ath79_pci_irq *entry;
133 - entry = &ath79_pci_irq_map[i];
134 - if (entry->bus == dev->bus->number &&
135 - entry->slot == slot &&
136 - entry->pin == pin) {
143 - pr_crit("pci %s: no irq found for pin %u\n",
144 - pci_name((struct pci_dev *) dev), pin);
146 - pr_info("pci %s: using irq %d for pin %u\n",
147 - pci_name((struct pci_dev *) dev), irq, pin);
152 -int pcibios_plat_dev_init(struct pci_dev *dev)
154 - if (ath79_pci_plat_dev_init)
155 - return ath79_pci_plat_dev_init(dev);
160 -void __init ath79_pci_set_irq_map(unsigned nr_irqs,
161 - const struct ath79_pci_irq *map)
163 - ath79_pci_nr_irqs = nr_irqs;
164 - ath79_pci_irq_map = map;
167 -void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))
169 - ath79_pci_plat_dev_init = func;
172 -static struct platform_device *
173 -ath79_register_pci_ar71xx(void)
175 - struct platform_device *pdev;
176 - struct resource res[4];
178 - memset(res, 0, sizeof(res));
180 - res[0].name = "cfg_base";
181 - res[0].flags = IORESOURCE_MEM;
182 - res[0].start = AR71XX_PCI_CFG_BASE;
183 - res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;
185 - res[1].flags = IORESOURCE_IRQ;
186 - res[1].start = ATH79_CPU_IRQ(2);
187 - res[1].end = ATH79_CPU_IRQ(2);
189 - res[2].name = "io_base";
190 - res[2].flags = IORESOURCE_IO;
194 - res[3].name = "mem_base";
195 - res[3].flags = IORESOURCE_MEM;
196 - res[3].start = AR71XX_PCI_MEM_BASE;
197 - res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
199 - pdev = platform_device_register_simple("ar71xx-pci", -1,
200 - res, ARRAY_SIZE(res));
204 -static struct platform_device *
205 -ath79_register_pci_ar724x(int id,
206 - unsigned long cfg_base,
207 - unsigned long ctrl_base,
208 - unsigned long crp_base,
209 - unsigned long mem_base,
210 - unsigned long mem_size,
211 - unsigned long io_base,
214 - struct platform_device *pdev;
215 - struct resource res[6];
217 - memset(res, 0, sizeof(res));
219 - res[0].name = "cfg_base";
220 - res[0].flags = IORESOURCE_MEM;
221 - res[0].start = cfg_base;
222 - res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1;
224 - res[1].name = "ctrl_base";
225 - res[1].flags = IORESOURCE_MEM;
226 - res[1].start = ctrl_base;
227 - res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1;
229 - res[2].flags = IORESOURCE_IRQ;
230 - res[2].start = irq;
233 - res[3].name = "mem_base";
234 - res[3].flags = IORESOURCE_MEM;
235 - res[3].start = mem_base;
236 - res[3].end = mem_base + mem_size - 1;
238 - res[4].name = "io_base";
239 - res[4].flags = IORESOURCE_IO;
240 - res[4].start = io_base;
241 - res[4].end = io_base;
243 - res[5].name = "crp_base";
244 - res[5].flags = IORESOURCE_MEM;
245 - res[5].start = crp_base;
246 - res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;
248 - pdev = platform_device_register_simple("ar724x-pci", id,
249 - res, ARRAY_SIZE(res));
253 -int __init ath79_register_pci(void)
255 - struct platform_device *pdev = NULL;
257 - if (soc_is_ar71xx()) {
258 - pdev = ath79_register_pci_ar71xx();
259 - } else if (soc_is_ar724x()) {
260 - pdev = ath79_register_pci_ar724x(-1,
261 - AR724X_PCI_CFG_BASE,
262 - AR724X_PCI_CTRL_BASE,
263 - AR724X_PCI_CRP_BASE,
264 - AR724X_PCI_MEM_BASE,
265 - AR724X_PCI_MEM_SIZE,
268 - } else if (soc_is_ar9342() ||
272 - bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
273 - if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0)
276 - pdev = ath79_register_pci_ar724x(-1,
277 - AR724X_PCI_CFG_BASE,
278 - AR724X_PCI_CTRL_BASE,
279 - AR724X_PCI_CRP_BASE,
280 - AR724X_PCI_MEM_BASE,
281 - AR724X_PCI_MEM_SIZE,
284 - } else if (soc_is_qca9558()) {
285 - pdev = ath79_register_pci_ar724x(0,
286 - QCA955X_PCI_CFG_BASE0,
287 - QCA955X_PCI_CTRL_BASE0,
288 - QCA955X_PCI_CRP_BASE0,
289 - QCA955X_PCI_MEM_BASE0,
290 - QCA955X_PCI_MEM_SIZE,
294 - pdev = ath79_register_pci_ar724x(1,
295 - QCA955X_PCI_CFG_BASE1,
296 - QCA955X_PCI_CTRL_BASE1,
297 - QCA955X_PCI_CRP_BASE1,
298 - QCA955X_PCI_MEM_BASE1,
299 - QCA955X_PCI_MEM_SIZE,
302 - } else if (soc_is_qca956x()) {
303 - pdev = ath79_register_pci_ar724x(0,
304 - QCA956X_PCI_CFG_BASE1,
305 - QCA956X_PCI_CTRL_BASE1,
306 - QCA956X_PCI_CRP_BASE1,
307 - QCA956X_PCI_MEM_BASE1,
308 - QCA956X_PCI_MEM_SIZE,
312 - /* No PCI support */
317 - pr_err("unable to register PCI controller device\n");
319 - return pdev ? 0 : -ENODEV;
321 Index: linux-4.14.25/arch/mips/pci/Makefile
322 ===================================================================
323 --- linux-4.14.25.orig/arch/mips/pci/Makefile
324 +++ linux-4.14.25/arch/mips/pci/Makefile
325 @@ -29,6 +29,7 @@ obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-vir
327 # These are still pretty much in the old state, watch, go blind.
329 +obj-$(CONFIG_ATH79) += fixup-ath79.o
330 obj-$(CONFIG_LASAT) += pci-lasat.o
331 obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
332 obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o
333 Index: linux-4.14.25/arch/mips/pci/fixup-ath79.c
334 ===================================================================
336 +++ linux-4.14.25/arch/mips/pci/fixup-ath79.c
339 + * Copyright (C) 2018 John Crispin <john@phrozen.org>
341 + * This program is free software; you can redistribute it and/or modify it
342 + * under the terms of the GNU General Public License version 2 as published
343 + * by the Free Software Foundation.
346 +#include <linux/pci.h>
347 +//#include <linux/of_irq.h>
348 +#include <linux/of_pci.h>
350 +int pcibios_plat_dev_init(struct pci_dev *dev)
352 + return PCIBIOS_SUCCESSFUL;
355 +int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
357 + return of_irq_parse_and_map_pci(dev, slot, pin);