1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Tue, 6 Mar 2018 13:26:27 +0100
3 Subject: [PATCH] MIPS: ath79: support setting up clock via DT on all SoC
6 Use the same functions as the legacy code
8 Signed-off-by: Felix Fietkau <nbd@nbd.name>
11 --- a/arch/mips/ath79/clock.c
12 +++ b/arch/mips/ath79/clock.c
13 @@ -658,16 +658,6 @@ ath79_get_sys_clk_rate(const char *id)
15 static void __init ath79_clocks_init_dt(struct device_node *np)
17 - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
20 -CLK_OF_DECLARE(ar7100, "qca,ar7100-pll", ath79_clocks_init_dt);
21 -CLK_OF_DECLARE(ar7240, "qca,ar7240-pll", ath79_clocks_init_dt);
22 -CLK_OF_DECLARE(ar9340, "qca,ar9340-pll", ath79_clocks_init_dt);
23 -CLK_OF_DECLARE(ar9550, "qca,qca9550-pll", ath79_clocks_init_dt);
25 -static void __init ath79_clocks_init_dt_ng(struct device_node *np)
28 void __iomem *pll_base;
30 @@ -681,14 +671,21 @@ static void __init ath79_clocks_init_dt_
34 - if (of_device_is_compatible(np, "qca,ar9130-pll"))
35 + if (of_device_is_compatible(np, "qca,ar7100-pll"))
36 + ar71xx_clocks_init(pll_base);
37 + else if (of_device_is_compatible(np, "qca,ar7240-pll") ||
38 + of_device_is_compatible(np, "qca,ar9130-pll"))
39 ar724x_clocks_init(pll_base);
40 else if (of_device_is_compatible(np, "qca,ar9330-pll"))
41 ar933x_clocks_init(pll_base);
43 - pr_err("%pOF: could not find any appropriate clk_init()\n", np);
46 + else if (of_device_is_compatible(np, "qca,ar9340-pll"))
47 + ar934x_clocks_init(pll_base);
48 + else if (of_device_is_compatible(np, "qca,qca9530-pll"))
49 + qca953x_clocks_init(pll_base);
50 + else if (of_device_is_compatible(np, "qca,qca9550-pll"))
51 + qca955x_clocks_init(pll_base);
52 + else if (of_device_is_compatible(np, "qca,qca9560-pll"))
53 + qca956x_clocks_init(pll_base);
55 if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) {
56 pr_err("%pOF: could not register clk provider\n", np);
57 @@ -703,6 +700,14 @@ err_iounmap:
61 -CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt_ng);
62 -CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt_ng);
64 +CLK_OF_DECLARE(ar7100_clk, "qca,ar7100-pll", ath79_clocks_init_dt);
65 +CLK_OF_DECLARE(ar7240_clk, "qca,ar7240-pll", ath79_clocks_init_dt);
66 +CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt);
67 +CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt);
68 +CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-pll", ath79_clocks_init_dt);
69 +CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt);
70 +CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt);
71 +CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt);