target/linux/atheros-2.6/files/drivers/net/ar2313/platform.h

   1 /********************************************************************************
   2    Title:   $Source: platform.h,v $
   3
   4    Author:  Dan Steinberg
   5             Copyright Integrated Device Technology 2001
   6
   7    Purpose: AR2313 Register/Bit Definitions
   8
   9    Update:
  10             $Log: platform.h,v $
  11
  12    Notes:   See Merlot architecture spec for complete details.  Note, all
  13             addresses are virtual addresses in kseg1 (Uncached, Unmapped).
  14
  15 ********************************************************************************/
  16
  17 #ifndef PLATFORM_H
  18 #define PLATFORM_H
  19
  20 //
  21 // New Combo structure for Both Eth0 AND eth1
  22 //
  23 typedef struct {
  24   volatile unsigned int mac_control;    /* 0x00 */
  25   volatile unsigned int mac_addr[2];    /* 0x04 - 0x08*/
  26   volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
  27   volatile unsigned int mii_addr;       /* 0x14 */
  28   volatile unsigned int mii_data;       /* 0x18 */
  29   volatile unsigned int flow_control;   /* 0x1c */
  30   volatile unsigned int vlan_tag;       /* 0x20 */
  31   volatile unsigned int pad[7];         /* 0x24 - 0x3c */
  32   volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
  33
  34 } ETHERNET_STRUCT;
  35
  36 /********************************************************************
  37  * Interrupt controller
  38  ********************************************************************/
  39
  40 typedef struct {
  41   volatile unsigned int wdog_control;           /* 0x08 */
  42   volatile unsigned int wdog_timer;             /* 0x0c */
  43   volatile unsigned int misc_status;            /* 0x10 */
  44   volatile unsigned int misc_mask;              /* 0x14 */
  45   volatile unsigned int global_status;          /* 0x18 */
  46   volatile unsigned int reserved;               /* 0x1c */
  47   volatile unsigned int reset_control;          /* 0x20 */
  48 } INTERRUPT;
  49
  50 /********************************************************************
  51  * DMA controller
  52  ********************************************************************/
  53 typedef struct {
  54   volatile unsigned int bus_mode;        /* 0x00 (CSR0) */
  55   volatile unsigned int xmt_poll;        /* 0x04 (CSR1) */
  56   volatile unsigned int rcv_poll;        /* 0x08 (CSR2) */
  57   volatile unsigned int rcv_base;        /* 0x0c (CSR3) */
  58   volatile unsigned int xmt_base;        /* 0x10 (CSR4) */
  59   volatile unsigned int status;          /* 0x14 (CSR5) */
  60   volatile unsigned int control;         /* 0x18 (CSR6) */
  61   volatile unsigned int intr_ena;        /* 0x1c (CSR7) */
  62   volatile unsigned int rcv_missed;      /* 0x20 (CSR8) */
  63   volatile unsigned int reserved[11];    /* 0x24-0x4c (CSR9-19) */
  64   volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
  65   volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
  66 } DMA;
  67
  68 #endif /* PLATFORM_H */