1 From 57e4984d7b342860d635155c13bf747d2c225e26 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Tue, 14 Jul 2020 14:21:33 +0100
4 Subject: [PATCH] ARM: dts: Add bcm2711-rpi-400.dts
6 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
8 arch/arm/boot/dts/Makefile | 1 +
9 arch/arm/boot/dts/bcm2711-rpi-400.dts | 615 ++++++++++++++++++
10 arch/arm64/boot/dts/broadcom/Makefile | 1 +
11 .../boot/dts/broadcom/bcm2711-rpi-400.dts | 1 +
12 4 files changed, 618 insertions(+)
13 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-400.dts
14 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
16 --- a/arch/arm/boot/dts/Makefile
17 +++ b/arch/arm/boot/dts/Makefile
18 @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
20 bcm2710-rpi-3-b-plus.dtb \
22 + bcm2711-rpi-400.dtb \
27 +++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts
29 +// SPDX-License-Identifier: GPL-2.0
31 +#include "bcm2711.dtsi"
32 +#include "bcm2835-rpi.dtsi"
34 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
37 + compatible = "raspberrypi,400", "brcm,bcm2711";
38 + model = "Raspberry Pi 400";
41 + /* 8250 auxiliary UART instead of pl011 */
42 + stdout-path = "serial1:115200n8";
45 + /* Will be filled by the bootloader */
47 + device_type = "memory";
52 + emmc2bus = &emmc2bus;
59 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
64 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
65 + default-state = "keep";
66 + linux,default-trigger = "default-on";
70 + wifi_pwrseq: wifi-pwrseq {
71 + compatible = "mmc-pwrseq-simple";
72 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
75 + sd_io_1v8_reg: sd_io_1v8_reg {
76 + compatible = "regulator-gpio";
77 + regulator-name = "vdd-sd-io";
78 + regulator-min-microvolt = <1800000>;
79 + regulator-max-microvolt = <3300000>;
81 + regulator-always-on;
82 + regulator-settling-time-us = <5000>;
83 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
84 + states = <1800000 0x1
89 + sd_vcc_reg: sd_vcc_reg {
90 + compatible = "regulator-fixed";
91 + regulator-name = "vcc-sd";
92 + regulator-min-microvolt = <3300000>;
93 + regulator-max-microvolt = <3300000>;
96 + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
109 + firmware_clocks: clocks {
110 + compatible = "raspberrypi,firmware-clocks";
111 + #clock-cells = <1>;
115 + compatible = "raspberrypi,firmware-gpio";
118 + gpio-line-names = "BT_ON",
130 + compatible = "raspberrypi,firmware-reset";
131 + #reset-cells = <1>;
137 + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
138 + * the official GPU firmware DT blob.
141 + * "FOO" = GPIO line named "FOO" on the schematic
142 + * "FOO_N" = GPIO line named "FOO" on schematic, active low
144 + gpio-line-names = "ID_SDA",
175 + /* Used by BT module */
187 + /* Shared with SPI flash */
190 + "STATUS_LED_G_CLK",
209 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
210 + clock-names = "hdmi", "bvb", "audio", "cec";
215 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
216 + clock-names = "hdmi", "bvb", "audio", "cec";
221 + clocks = <&firmware_clocks 4>;
241 + pinctrl-names = "default";
242 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
246 +/* SDHCI is used to control the SDIO for wireless */
248 + #address-cells = <1>;
250 + pinctrl-names = "default";
251 + pinctrl-0 = <&emmc_gpio34>;
254 + mmc-pwrseq = <&wifi_pwrseq>;
259 + compatible = "brcm,bcm4329-fmac";
263 +/* EMMC2 is used to drive the SD card */
265 + vqmmc-supply = <&sd_io_1v8_reg>;
266 + vmmc-supply = <&sd_vcc_reg>;
272 + phy-handle = <&phy1>;
273 + phy-mode = "rgmii-rxid";
278 + phy1: ethernet-phy@1 {
279 + /* No PHY interrupt */
286 + #address-cells = <3>;
293 + reg = <0x10000 0 0 0 0>;
294 + resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
299 +/* uart0 communicates with the BT module */
301 + pinctrl-names = "default";
302 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
307 + compatible = "brcm,bcm43438-bt";
308 + max-speed = <2000000>;
309 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
313 +/* uart1 is mapped to the pin header */
315 + pinctrl-names = "default";
316 + pinctrl-0 = <&uart1_gpio14>;
321 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
329 + status = "disabled";
332 +// =============================================
333 +// Downstream rpi- changes
337 +#include "bcm270x.dtsi"
338 +#include "bcm271x-rpi-bt.dtsi"
342 + /delete-node/ pixelvalve@7e807000;
343 + /delete-node/ hdmi@7e902000;
347 +#include "bcm2711-rpi.dtsi"
348 +#include "bcm283x-rpi-csi1-2lane.dtsi"
349 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
353 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
362 + /delete-property/ i2c2;
367 + /delete-property/ intc;
370 + /delete-node/ wifi-pwrseq;
374 + pinctrl-names = "default";
375 + pinctrl-0 = <&sdio_pins>;
381 + pinctrl-0 = <&uart0_pins &bt_pins>;
386 + pinctrl-0 = <&uart1_pins>;
390 + pinctrl-names = "default";
391 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
392 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
395 + compatible = "spidev";
396 + reg = <0>; /* CE0 */
397 + #address-cells = <1>;
399 + spi-max-frequency = <125000000>;
403 + compatible = "spidev";
404 + reg = <1>; /* CE1 */
405 + #address-cells = <1>;
407 + spi-max-frequency = <125000000>;
412 + spi0_pins: spi0_pins {
413 + brcm,pins = <9 10 11>;
414 + brcm,function = <BCM2835_FSEL_ALT0>;
417 + spi0_cs_pins: spi0_cs_pins {
419 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
422 + spi3_pins: spi3_pins {
423 + brcm,pins = <1 2 3>;
424 + brcm,function = <BCM2835_FSEL_ALT3>;
427 + spi3_cs_pins: spi3_cs_pins {
428 + brcm,pins = <0 24>;
429 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
432 + spi4_pins: spi4_pins {
433 + brcm,pins = <5 6 7>;
434 + brcm,function = <BCM2835_FSEL_ALT3>;
437 + spi4_cs_pins: spi4_cs_pins {
438 + brcm,pins = <4 25>;
439 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
442 + spi5_pins: spi5_pins {
443 + brcm,pins = <13 14 15>;
444 + brcm,function = <BCM2835_FSEL_ALT3>;
447 + spi5_cs_pins: spi5_cs_pins {
448 + brcm,pins = <12 26>;
449 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
452 + spi6_pins: spi6_pins {
453 + brcm,pins = <19 20 21>;
454 + brcm,function = <BCM2835_FSEL_ALT3>;
457 + spi6_cs_pins: spi6_cs_pins {
458 + brcm,pins = <18 27>;
459 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
464 + brcm,function = <BCM2835_FSEL_ALT0>;
465 + brcm,pull = <BCM2835_PUD_UP>;
470 + brcm,function = <BCM2835_FSEL_ALT0>;
471 + brcm,pull = <BCM2835_PUD_UP>;
476 + brcm,function = <BCM2835_FSEL_ALT5>;
477 + brcm,pull = <BCM2835_PUD_UP>;
482 + brcm,function = <BCM2835_FSEL_ALT5>;
483 + brcm,pull = <BCM2835_PUD_UP>;
487 + brcm,pins = <12 13>;
488 + brcm,function = <BCM2835_FSEL_ALT5>;
489 + brcm,pull = <BCM2835_PUD_UP>;
493 + brcm,pins = <22 23>;
494 + brcm,function = <BCM2835_FSEL_ALT5>;
495 + brcm,pull = <BCM2835_PUD_UP>;
499 + brcm,pins = <18 19 20 21>;
500 + brcm,function = <BCM2835_FSEL_ALT0>;
503 + sdio_pins: sdio_pins {
504 + brcm,pins = <34 35 36 37 38 39>;
505 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
506 + brcm,pull = <0 2 2 2 2 2>;
510 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
512 + brcm,function = <0>;
516 + uart0_pins: uart0_pins {
517 + brcm,pins = <32 33>;
518 + brcm,function = <BCM2835_FSEL_ALT3>;
522 + uart1_pins: uart1_pins {
528 + uart2_pins: uart2_pins {
530 + brcm,function = <BCM2835_FSEL_ALT4>;
534 + uart3_pins: uart3_pins {
536 + brcm,function = <BCM2835_FSEL_ALT4>;
540 + uart4_pins: uart4_pins {
542 + brcm,function = <BCM2835_FSEL_ALT4>;
546 + uart5_pins: uart5_pins {
547 + brcm,pins = <12 13>;
548 + brcm,function = <BCM2835_FSEL_ALT4>;
554 + clock-frequency = <100000>;
558 + pinctrl-names = "default";
559 + pinctrl-0 = <&i2c1_pins>;
560 + clock-frequency = <100000>;
564 + pinctrl-names = "default";
565 + pinctrl-0 = <&i2s_pins>;
570 + /delete-property/ i2c2_baudrate;
571 + /delete-property/ i2c2_iknowwhatimdoing;
575 +// =============================================
576 +// Board specific stuff here
579 + power_ctrl: power_ctrl {
580 + compatible = "gpio-poweroff";
581 + gpios = <&expgpio 5 0>;
587 + status = "disabled";
591 + led-modes = <0x00 0x08>; /* link/activity link */
595 + audio_pins: audio_pins {
596 + brcm,pins = <40 41>;
597 + brcm,function = <4>;
604 + linux,default-trigger = "default-on";
605 + default-state = "on";
606 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
611 + linux,default-trigger = "default-on";
612 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
617 + status = "disabled";
621 + pinctrl-names = "default";
622 + pinctrl-0 = <&audio_pins>;
623 + brcm,disable-headphones = <1>;
628 + act_led_gpio = <&act_led>,"gpios:4";
629 + act_led_activelow = <&act_led>,"gpios:8";
630 + act_led_trigger = <&act_led>,"linux,default-trigger";
632 + pwr_led_gpio = <&pwr_led>,"gpios:4";
633 + pwr_led_activelow = <&pwr_led>,"gpios:8";
634 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
636 + eth_led0 = <&phy1>,"led-modes:0";
637 + eth_led1 = <&phy1>,"led-modes:4";
639 + sd_poll_once = <&emmc2>, "non-removable?";
640 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
641 + <&spi0>, "dmas:8=", <&dma40>;
644 --- a/arch/arm64/boot/dts/broadcom/Makefile
645 +++ b/arch/arm64/boot/dts/broadcom/Makefile
646 @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp
647 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
648 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
649 dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
650 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb
651 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
652 dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
655 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
657 +#include "../../../../arm/boot/dts/bcm2711-rpi-400.dts"