1 From acc8ac41d15594d4f735531c89bbeb03d85c344d Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Thu, 8 Oct 2020 16:06:08 +0200
4 Subject: [PATCH] drm/vc4: hdmi: Properly compute the BVB clock rate
6 The BVB clock rate computation doesn't take into account a mode clock of
7 594MHz that we're going to need to support 4k60.
9 Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
10 Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
11 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
13 drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++--------
14 1 file changed, 9 insertions(+), 8 deletions(-)
16 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
17 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
19 # define VC4_HD_M_ENABLE BIT(0)
21 #define CEC_CLOCK_FREQ 40000
22 -#define VC4_HSM_MID_CLOCK 149985000
24 static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
26 @@ -813,7 +812,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
27 conn_state_to_vc4_hdmi_conn_state(conn_state);
28 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
29 struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
30 - unsigned long pixel_rate, hsm_rate;
31 + unsigned long bvb_rate, pixel_rate, hsm_rate;
34 ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
35 @@ -862,12 +861,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
37 vc4_hdmi_cec_update_clk_div(vc4_hdmi);
40 - * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
43 - vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock,
44 - (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
45 + if (pixel_rate > 297000000)
46 + bvb_rate = 300000000;
47 + else if (pixel_rate > 148500000)
48 + bvb_rate = 150000000;
50 + bvb_rate = 75000000;
52 + vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate);
53 if (IS_ERR(vc4_hdmi->bvb_req)) {
54 DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req));
55 clk_request_done(vc4_hdmi->hsm_req);