34effa3a3209edefa6dfabe466c646fecdfc6836
[openwrt/staging/chunkeey.git] / target / linux / bcm27xx / patches-5.10 / 950-0698-overlays-Add-overlay-for-Si446x-Transceiver-SPI.patch
1 From 7f747c53fc4afa9a25eeb3ca290b4fed4690ca3f Mon Sep 17 00:00:00 2001
2 From: "Sunip K. Mukherjee" <sunipkmukherjee@gmail.com>
3 Date: Sun, 4 Jul 2021 16:03:07 -0400
4 Subject: [PATCH] overlays: Add overlay for Si446x Transceiver SPI
5
6 See: https://github.com/raspberrypi/linux/pull/4430
7
8 Signed-off-by: Sunip K. Mukherjee <sunipkmukherjee@gmail.com>
9 ---
10 arch/arm/boot/dts/overlays/Makefile | 1 +
11 arch/arm/boot/dts/overlays/README | 10 ++++
12 .../boot/dts/overlays/si446x-spi0-overlay.dts | 53 +++++++++++++++++++
13 3 files changed, 64 insertions(+)
14 create mode 100644 arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
15
16 --- a/arch/arm/boot/dts/overlays/Makefile
17 +++ b/arch/arm/boot/dts/overlays/Makefile
18 @@ -176,6 +176,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
19 seeed-can-fd-hat-v1.dtbo \
20 seeed-can-fd-hat-v2.dtbo \
21 sh1106-spi.dtbo \
22 + si446x-spi0.dtbo \
23 smi.dtbo \
24 smi-dev.dtbo \
25 smi-nand.dtbo \
26 --- a/arch/arm/boot/dts/overlays/README
27 +++ b/arch/arm/boot/dts/overlays/README
28 @@ -2733,6 +2733,16 @@ Params: speed SPI bus
29 height Display height (32 or 64; default 64)
30
31
32 +Name: si446x-spi0
33 +Info: Overlay for Si446x UHF Transceiver via SPI using si446x driver.
34 + The driver is currently out-of-tree at
35 + https://github.com/sunipkmukherjee/silabs.git
36 +Load: dtoverlay=si446x-spi0,<param>=<val>
37 +Params: speed SPI bus speed (default 4000000)
38 + int_pin GPIO pin for interrupts (default 17)
39 + reset_pin GPIO pin for RESET (default 27)
40 +
41 +
42 Name: smi
43 Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
44 Load: dtoverlay=smi
45 --- /dev/null
46 +++ b/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
47 @@ -0,0 +1,53 @@
48 +// Overlay for the SiLabs Si446X Controller - SPI0
49 +// Default Interrupt Pin: 17
50 +// Default SDN Pin: 27
51 +/dts-v1/;
52 +/plugin/;
53 +
54 + / {
55 + compatible = "brcm,bcm2835";
56 +
57 + fragment@0 {
58 + target = <&spi0>;
59 + __overlay__ {
60 + // needed to avoid dtc warning
61 + #address-cells = <1>;
62 + #size-cells = <0>;
63 +
64 + status = "okay";
65 +
66 + uhf0: si446x@0{
67 + compatible = "silabs,si446x";
68 + reg = <0>; // CE0
69 + pinctrl-names = "default";
70 + pinctrl-0 = <&uhf0_pins>;
71 + interrupt-parent = <&gpio>;
72 + interrupts = <17 0x2>; // falling edge
73 + spi-max-frequency = <4000000>;
74 + sdn_pin = <27>;
75 + irq_pin = <17>;
76 + status = "okay";
77 + };
78 + };
79 + };
80 +
81 + fragment@1 {
82 + target = <&gpio>;
83 + __overlay__ {
84 + uhf0_pins: uhf0_pins {
85 + brcm,pins = <17 27>;
86 + brcm,function = <0 1>; // in, out
87 + brcm,pull = <2 0>; // high, none
88 + };
89 + };
90 + };
91 +
92 + __overrides__ {
93 + int_pin = <&uhf0>, "interrupts:0",
94 + <&uhf0>, "irq_pin:0",
95 + <&uhf0_pins>, "brcm,pins:0";
96 + reset_pin = <&uhf0>, "sdn_pin:0",
97 + <&uhf0_pins>, "brcm,pins:4";
98 + speed = <&uhf0>, "spi-max-frequency:0";
99 + };
100 +};