1 From ab5164dbd0241da27ec87eff34408dd97d9658c0 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Thu, 9 Sep 2021 10:37:15 +0100
4 Subject: [PATCH] ARM: dts: Add Pi Zero 2 support
6 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
8 arch/arm/boot/dts/Makefile | 1 +
9 arch/arm/boot/dts/bcm2710-rpi-zero-2.dts | 177 ++++++++++++++++++
10 arch/arm64/boot/dts/broadcom/Makefile | 1 +
11 .../boot/dts/broadcom/bcm2710-rpi-zero-2.dts | 1 +
12 4 files changed, 180 insertions(+)
13 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-zero-2.dts
14 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2.dts
16 --- a/arch/arm/boot/dts/Makefile
17 +++ b/arch/arm/boot/dts/Makefile
18 @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
20 bcm2708-rpi-zero.dtb \
21 bcm2708-rpi-zero-w.dtb \
22 + bcm2710-rpi-zero-2.dtb \
27 +++ b/arch/arm/boot/dts/bcm2710-rpi-zero-2.dts
31 +#include "bcm2710.dtsi"
32 +#include "bcm2709-rpi.dtsi"
33 +#include "bcm283x-rpi-csi1-2lane.dtsi"
34 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
35 +#include "bcm2708-rpi-bt.dtsi"
36 +#include "bcm283x-rpi-cam1-regulator.dtsi"
39 + compatible = "raspberrypi,model-zero-2", "brcm,bcm2837";
40 + model = "Raspberry Pi Zero 2";
43 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
54 + spi0_pins: spi0_pins {
55 + brcm,pins = <9 10 11>;
56 + brcm,function = <4>; /* alt0 */
59 + spi0_cs_pins: spi0_cs_pins {
61 + brcm,function = <1>; /* output */
66 + brcm,function = <4>;
71 + brcm,function = <4>;
75 + brcm,pins = <18 19 20 21>;
76 + brcm,function = <4>; /* alt0 */
79 + sdio_pins: sdio_pins {
80 + brcm,pins = <34 35 36 37 38 39>;
81 + brcm,function = <7>; // alt3 = SD1
82 + brcm,pull = <0 2 2 2 2 2>;
87 + brcm,function = <4>; /* alt0:GPCLK2 */
91 + uart0_pins: uart0_pins {
92 + brcm,pins = <30 31 32 33>;
93 + brcm,function = <7>; /* alt3=UART0 */
94 + brcm,pull = <2 0 0 2>; /* up none none up */
97 + uart1_pins: uart1_pins {
103 + audio_pins: audio_pins {
105 + brcm,function = <>;
110 + pinctrl-names = "default";
111 + pinctrl-0 = <&sdio_pins>;
117 + pinctrl-names = "default";
118 + pinctrl-0 = <&uart0_pins &bt_pins>;
123 + pinctrl-names = "default";
124 + pinctrl-0 = <&uart1_pins>;
129 + pinctrl-names = "default";
130 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
131 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
134 + compatible = "spidev";
135 + reg = <0>; /* CE0 */
136 + #address-cells = <1>;
138 + spi-max-frequency = <125000000>;
142 + compatible = "spidev";
143 + reg = <1>; /* CE1 */
144 + #address-cells = <1>;
146 + spi-max-frequency = <125000000>;
151 + clock-frequency = <100000>;
155 + pinctrl-names = "default";
156 + pinctrl-0 = <&i2c1_pins>;
157 + clock-frequency = <100000>;
161 + clock-frequency = <100000>;
165 + pinctrl-names = "default";
166 + pinctrl-0 = <&i2s_pins>;
172 + linux,default-trigger = "actpwr";
173 + gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
178 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
182 + pinctrl-names = "default";
183 + pinctrl-0 = <&audio_pins>;
184 + brcm,disable-headphones = <1>;
188 + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
192 + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
196 + gpio = <&gpio 40 GPIO_ACTIVE_HIGH>;
201 + act_led_gpio = <&act_led>,"gpios:4";
202 + act_led_activelow = <&act_led>,"gpios:8";
203 + act_led_trigger = <&act_led>,"linux,default-trigger";
206 --- a/arch/arm64/boot/dts/broadcom/Makefile
207 +++ b/arch/arm64/boot/dts/broadcom/Makefile
208 @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
209 bcm2837-rpi-3-b.dtb \
210 bcm2837-rpi-3-b-plus.dtb \
211 bcm2837-rpi-cm3-io3.dtb
212 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-zero-2.dtb
213 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-2-b.dtb
214 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
215 dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
217 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-zero-2.dts
219 +#include "../../../../arm/boot/dts/bcm2710-rpi-zero-2.dts"