1 From 9667f053b5015bfb486e16d3c88a79b961395876 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Mon, 6 Mar 2017 09:06:18 +0000
4 Subject: [PATCH] clk-bcm2835: Read max core clock from firmware
6 The VPU is responsible for managing the core clock, usually under
7 direction from the bcm2835-cpufreq driver but not via the clk-bcm2835
8 driver. Since the core frequency can change without warning, it is
9 safer to report the maximum clock rate to users of the core clock -
10 I2C, SPI and the mini UART - to err on the safe side when calculating
13 If the DT node for the clock driver includes a reference to the
14 firmware node, use the firmware API to query the maximum core clock
15 instead of reading the divider registers.
17 Prior to this patch, a "100KHz" I2C bus was sometimes clocked at about
18 160KHz. In particular, switching to the 4.9 kernel was likely to break
19 SenseHAT usage on a Pi3.
21 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
23 drivers/clk/bcm/clk-bcm2835.c | 39 ++++++++++++++++++++++++++++++++++-
24 1 file changed, 38 insertions(+), 1 deletion(-)
26 --- a/drivers/clk/bcm/clk-bcm2835.c
27 +++ b/drivers/clk/bcm/clk-bcm2835.c
29 #include <linux/platform_device.h>
30 #include <linux/slab.h>
31 #include <dt-bindings/clock/bcm2835.h>
32 +#include <soc/bcm2835/raspberrypi-firmware.h>
34 #define CM_PASSWORD 0x5a000000
37 #define SOC_BCM2711 BIT(1)
38 #define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
40 +#define VCMSG_ID_CORE_CLOCK 4
43 * Names of clocks used within the driver that need to be replaced
44 * with an external parent's name. This array is in the order that
45 @@ -313,6 +316,7 @@ static const char *const cprman_parent_n
46 struct bcm2835_cprman {
49 + struct rpi_firmware *fw;
50 spinlock_t regs_lock; /* spinlock for all clocks */
53 @@ -1015,6 +1019,30 @@ static unsigned long bcm2835_clock_get_r
54 return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
57 +static unsigned long bcm2835_clock_get_rate_vpu(struct clk_hw *hw,
58 + unsigned long parent_rate)
60 + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
61 + struct bcm2835_cprman *cprman = clock->cprman;
69 + packet.id = VCMSG_ID_CORE_CLOCK;
72 + if (!rpi_firmware_property(cprman->fw,
73 + RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
74 + &packet, sizeof(packet)))
78 + return bcm2835_clock_get_rate(hw, parent_rate);
81 static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)
83 struct bcm2835_cprman *cprman = clock->cprman;
84 @@ -1303,7 +1331,7 @@ static int bcm2835_vpu_clock_is_on(struc
86 static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
87 .is_prepared = bcm2835_vpu_clock_is_on,
88 - .recalc_rate = bcm2835_clock_get_rate,
89 + .recalc_rate = bcm2835_clock_get_rate_vpu,
90 .set_rate = bcm2835_clock_set_rate,
91 .determine_rate = bcm2835_clock_determine_rate,
92 .set_parent = bcm2835_clock_set_parent,
93 @@ -2241,6 +2269,7 @@ static int bcm2835_clk_probe(struct plat
94 const struct bcm2835_clk_desc *desc;
95 const size_t asize = ARRAY_SIZE(clk_desc_array);
96 const struct cprman_plat_data *pdata;
97 + struct device_node *fw_node;
101 @@ -2262,6 +2291,14 @@ static int bcm2835_clk_probe(struct plat
102 if (IS_ERR(cprman->regs))
103 return PTR_ERR(cprman->regs);
105 + fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
107 + struct rpi_firmware *fw = rpi_firmware_get(NULL);
109 + return -EPROBE_DEFER;
113 memset(bcm2835_clk_claimed, 0, sizeof(bcm2835_clk_claimed));
115 !of_property_read_u32_index(pdev->dev.of_node, "claim-clocks",