1 From 104dcc1aff0ae5509ad9875c11e3e0d8c290709d Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Tue, 2 Jun 2020 17:19:51 +0100
4 Subject: [PATCH] ARM: dts: Add bcm2711-rpi-cm4.dts
6 Add initial DTS file for Compute Module 4.
8 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
10 arch/arm/boot/dts/Makefile | 3 +-
11 arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 586 ++++++++++++++++++++++++++
12 arch/arm/boot/dts/overlays/README | 6 +
13 3 files changed, 594 insertions(+), 1 deletion(-)
14 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
16 --- a/arch/arm/boot/dts/Makefile
17 +++ b/arch/arm/boot/dts/Makefile
18 @@ -12,7 +12,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
21 bcm2710-rpi-3-b-plus.dtb \
23 + bcm2710-rpi-cm3.dtb \
26 dtb-$(CONFIG_ARCH_ALPINE) += \
29 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
31 +// SPDX-License-Identifier: GPL-2.0
33 +#include "bcm2711.dtsi"
34 +#include "bcm2835-rpi.dtsi"
37 + compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
38 + model = "Raspberry Pi Compute Module 4";
41 + /* 8250 auxiliary UART instead of pl011 */
42 + stdout-path = "serial1:115200n8";
45 + /* Will be filled by the bootloader */
47 + device_type = "memory";
57 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
62 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
66 + wifi_pwrseq: wifi-pwrseq {
67 + compatible = "mmc-pwrseq-simple";
68 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
71 + sd_io_1v8_reg: sd_io_1v8_reg {
72 + compatible = "regulator-gpio";
73 + regulator-name = "vdd-sd-io";
74 + regulator-min-microvolt = <1800000>;
75 + regulator-max-microvolt = <3300000>;
77 + regulator-always-on;
78 + regulator-settling-time-us = <5000>;
79 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
80 + states = <1800000 0x1
88 + compatible = "raspberrypi,firmware-gpio";
91 + gpio-line-names = "BT_ON",
103 + gpios = <3 GPIO_ACTIVE_HIGH>;
109 + gpios = <7 GPIO_ACTIVE_HIGH>;
116 + pinctrl-names = "default";
117 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
121 +/* SDHCI is used to control the SDIO for wireless */
123 + #address-cells = <1>;
125 + pinctrl-names = "default";
126 + pinctrl-0 = <&emmc_gpio34>;
129 + mmc-pwrseq = <&wifi_pwrseq>;
134 + compatible = "brcm,bcm4329-fmac";
138 +/* EMMC2 is used to drive the SD card */
140 + vqmmc-supply = <&sd_io_1v8_reg>;
146 + phy-handle = <&phy1>;
147 + phy-mode = "rgmii-rxid";
152 + phy1: ethernet-phy@1 {
153 + /* No PHY interrupt */
158 +/* uart0 communicates with the BT module */
160 + pinctrl-names = "default";
161 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
166 + compatible = "brcm,bcm43438-bt";
167 + max-speed = <2000000>;
168 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
172 +/* uart1 is mapped to the pin header */
174 + pinctrl-names = "default";
175 + pinctrl-0 = <&uart1_gpio14>;
180 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
223 +// =============================================
224 +// Downstream rpi- changes
226 +#include "bcm270x.dtsi"
230 + /delete-node/ pixelvalve@7e807000;
231 + /delete-node/ hdmi@7e902000;
235 +#include "bcm2711-rpi.dtsi"
236 +#include "bcm283x-rpi-csi1-2lane.dtsi"
237 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
239 +/delete-node/ &emmc2;
243 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
252 + /delete-property/ i2c2;
257 + /delete-property/ ethernet;
258 + /delete-property/ intc;
260 + emmc2bus = &emmc2bus;
263 + emmc2bus: emmc2bus {
264 + compatible = "simple-bus";
265 + #address-cells = <2>;
268 + ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
269 + dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
271 + emmc2: emmc2@7e340000 {
272 + compatible = "brcm,bcm2711-emmc2";
274 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
275 + clocks = <&clocks BCM2711_CLOCK_EMMC2>;
276 + reg = <0x0 0x7e340000 0x100>;
277 + vqmmc-supply = <&sd_io_1v8_reg>;
282 + /delete-node/ wifi-pwrseq;
286 + pinctrl-names = "default";
287 + pinctrl-0 = <&sdio_pins>;
293 + pinctrl-0 = <&uart0_pins &bt_pins>;
296 + /delete-node/ bluetooth;
300 + pinctrl-0 = <&uart1_pins>;
304 + pinctrl-names = "default";
305 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
306 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
309 + compatible = "spidev";
310 + reg = <0>; /* CE0 */
311 + #address-cells = <1>;
313 + spi-max-frequency = <125000000>;
317 + compatible = "spidev";
318 + reg = <1>; /* CE1 */
319 + #address-cells = <1>;
321 + spi-max-frequency = <125000000>;
326 + spi0_pins: spi0_pins {
327 + brcm,pins = <9 10 11>;
328 + brcm,function = <BCM2835_FSEL_ALT0>;
331 + spi0_cs_pins: spi0_cs_pins {
333 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
336 + spi3_pins: spi3_pins {
337 + brcm,pins = <1 2 3>;
338 + brcm,function = <BCM2835_FSEL_ALT3>;
341 + spi3_cs_pins: spi3_cs_pins {
342 + brcm,pins = <0 24>;
343 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
346 + spi4_pins: spi4_pins {
347 + brcm,pins = <5 6 7>;
348 + brcm,function = <BCM2835_FSEL_ALT3>;
351 + spi4_cs_pins: spi4_cs_pins {
352 + brcm,pins = <4 25>;
353 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
356 + spi5_pins: spi5_pins {
357 + brcm,pins = <13 14 15>;
358 + brcm,function = <BCM2835_FSEL_ALT3>;
361 + spi5_cs_pins: spi5_cs_pins {
362 + brcm,pins = <12 26>;
363 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
366 + spi6_pins: spi6_pins {
367 + brcm,pins = <19 20 21>;
368 + brcm,function = <BCM2835_FSEL_ALT3>;
371 + spi6_cs_pins: spi6_cs_pins {
372 + brcm,pins = <18 27>;
373 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
378 + brcm,function = <BCM2835_FSEL_ALT0>;
379 + brcm,pull = <BCM2835_PUD_UP>;
384 + brcm,function = <BCM2835_FSEL_ALT0>;
385 + brcm,pull = <BCM2835_PUD_UP>;
390 + brcm,function = <BCM2835_FSEL_ALT5>;
391 + brcm,pull = <BCM2835_PUD_UP>;
396 + brcm,function = <BCM2835_FSEL_ALT5>;
397 + brcm,pull = <BCM2835_PUD_UP>;
401 + brcm,pins = <12 13>;
402 + brcm,function = <BCM2835_FSEL_ALT5>;
403 + brcm,pull = <BCM2835_PUD_UP>;
407 + brcm,pins = <22 23>;
408 + brcm,function = <BCM2835_FSEL_ALT5>;
409 + brcm,pull = <BCM2835_PUD_UP>;
413 + brcm,pins = <18 19 20 21>;
414 + brcm,function = <BCM2835_FSEL_ALT0>;
417 + sdio_pins: sdio_pins {
418 + brcm,pins = <34 35 36 37 38 39>;
419 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
420 + brcm,pull = <0 2 2 2 2 2>;
424 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
426 + brcm,function = <0>;
430 + uart0_pins: uart0_pins {
431 + brcm,pins = <32 33>;
432 + brcm,function = <BCM2835_FSEL_ALT3>;
436 + uart1_pins: uart1_pins {
442 + uart2_pins: uart2_pins {
444 + brcm,function = <BCM2835_FSEL_ALT4>;
448 + uart3_pins: uart3_pins {
450 + brcm,function = <BCM2835_FSEL_ALT4>;
454 + uart4_pins: uart4_pins {
456 + brcm,function = <BCM2835_FSEL_ALT4>;
460 + uart5_pins: uart5_pins {
461 + brcm,pins = <12 13>;
462 + brcm,function = <BCM2835_FSEL_ALT4>;
468 + clock-frequency = <100000>;
472 + pinctrl-names = "default";
473 + pinctrl-0 = <&i2c1_pins>;
474 + clock-frequency = <100000>;
478 + pinctrl-names = "default";
479 + pinctrl-0 = <&i2s_pins>;
484 + /delete-property/ i2c2_baudrate;
485 + /delete-property/ i2c2_iknowwhatimdoing;
489 +// =============================================
490 +// Board specific stuff here
493 + sd_vcc_reg: sd_vcc_reg {
494 + compatible = "regulator-fixed";
495 + regulator-name = "vcc-sd";
496 + regulator-min-microvolt = <3300000>;
497 + regulator-max-microvolt = <3300000>;
499 + enable-active-high;
500 + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
505 + status = "disabled";
509 + vmmc-supply = <&sd_vcc_reg>;
514 + led-modes = <0x00 0x08>; /* link/activity link */
518 + audio_pins: audio_pins {
519 + brcm,pins = <40 41>;
520 + brcm,function = <4>;
527 + linux,default-trigger = "mmc0";
528 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
533 + linux,default-trigger = "default-on";
534 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
539 + status = "disabled";
543 + pinctrl-names = "default";
544 + pinctrl-0 = <&audio_pins>;
548 + status = "disabled";
552 + status = "disabled";
556 + status = "disabled";
560 + status = "disabled";
564 + status = "disabled";
568 + status = "disabled";
572 + status = "disabled";
576 + status = "disabled";
580 + status = "disabled";
584 + status = "disabled";
589 + act_led_gpio = <&act_led>,"gpios:4";
590 + act_led_activelow = <&act_led>,"gpios:8";
591 + act_led_trigger = <&act_led>,"linux,default-trigger";
593 + pwr_led_gpio = <&pwr_led>,"gpios:4";
594 + pwr_led_activelow = <&pwr_led>,"gpios:8";
595 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
597 + eth_led0 = <&phy1>,"led-modes:0";
598 + eth_led1 = <&phy1>,"led-modes:4";
600 + ant1 = <&ant1>,"output-high?=on",
601 + <&ant1>, "output-low?=off",
602 + <&ant2>, "output-high?=off",
603 + <&ant2>, "output-low?=on";
604 + ant2 = <&ant1>,"output-high?=off",
605 + <&ant1>, "output-low?=on",
606 + <&ant2>, "output-high?=on",
607 + <&ant2>, "output-low?=off";
608 + noant = <&ant1>,"output-high?=off",
609 + <&ant1>, "output-low?=on",
610 + <&ant2>, "output-high?=off",
611 + <&ant2>, "output-low?=on";
613 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
614 + <&spi0>, "dmas:8=", <&dma40>;
617 --- a/arch/arm/boot/dts/overlays/README
618 +++ b/arch/arm/boot/dts/overlays/README
619 @@ -92,6 +92,12 @@ Name: <The base DTB>
620 Info: Configures the base Raspberry Pi hardware
621 Load: <loaded automatically>
623 + ant1 Select antenna 1 (default). CM4 only.
625 + ant2 Select antenna 2. CM4 only.
627 + noant Disable both antennas. CM4 only.
629 audio Set to "on" to enable the onboard ALSA audio
630 interface (default "off")