1 From 52f0d07b546d1fd84aace07d69f8cf751ce8a3ab Mon Sep 17 00:00:00 2001
2 From: Florian Meier <florian.meier@koalo.de>
3 Date: Fri, 22 Nov 2013 14:22:53 +0100
4 Subject: [PATCH] dmaengine: Add support for BCM2708
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Add support for DMA controller of BCM2708 as used in the Raspberry Pi.
10 Currently it only supports cyclic DMA.
12 Signed-off-by: Florian Meier <florian.meier@koalo.de>
14 dmaengine: expand functionality by supporting scatter/gather transfers sdhci-bcm2708 and dma.c: fix for LITE channels
16 DMA: fix cyclic LITE length overflow bug
18 dmaengine: bcm2708: Remove chancnt affectations
20 Mirror bcm2835-dma.c commit 9eba5536a7434c69d8c185d4bd1c70734d92287d:
21 chancnt is already filled by dma_async_device_register, which uses the channel
22 list to know how much channels there is.
24 Since it's already filled, we can safely remove it from the drivers' probe
27 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
29 dmaengine: bcm2708: overwrite dreq only if it is not set
31 dreq is set when the DMA channel is fetched from Device Tree.
32 slave_id is set using dmaengine_slave_config().
33 Only overwrite dreq with slave_id if it is not set.
35 dreq/slave_id in the cyclic DMA case is not touched, because I don't
36 have hardware to test with.
38 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
40 dmaengine: bcm2708: do device registration in the board file
42 Don't register the device in the driver. Do it in the board file.
44 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
46 dmaengine: bcm2708: don't restrict DT support to ARCH_BCM2835
48 Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
49 Add Device Tree support to the non ARCH_BCM2835 case.
50 Use the same driver name regardless of architecture.
52 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
54 BCM270x_DT: add bcm2835-dma entry
56 Add Device Tree entry for bcm2835-dma.
57 The entry doesn't contain any resources since they are handled
58 by the arch/arm/mach-bcm270x/dma.c driver.
59 In non-DT mode, don't add the device in the board file.
61 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
63 bcm2708-dmaengine: Add debug options
65 BCM270x: Add memory and irq resources to dmaengine device and DT
67 Prepare for merging of the legacy DMA API arch driver dma.c
68 with bcm2708-dmaengine by adding memory and irq resources both
69 to platform file device and Device Tree node.
70 Don't use BCM_DMAMAN_DRIVER_NAME so we don't have to include mach/dma.h
72 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
74 dmaengine: bcm2708: Merge with arch dma.c driver and disable dma.c
76 Merge the legacy DMA API driver with bcm2708-dmaengine.
77 This is done so we can use bcm2708_fb on ARCH_BCM2835 (mailbox
78 driver is also needed).
80 Changes to the dma.c code:
82 - Cutdown some comments to one line.
83 - Add mutex to vc_dmaman and use this, since the dev lock is locked
84 during probing of the engine part.
85 - Add global g_dmaman variable since drvdata is used by the engine part.
86 - Restructure for readability:
87 vc_dmaman_chan_alloc()
90 - Restructure bcm_dma_chan_alloc() to simplify error handling.
91 - Use device irq resources instead of hardcoded bcm_dma_irqs table.
92 - Remove dev_dmaman_register() and code it directly.
93 - Remove dev_dmaman_deregister() and code it directly.
94 - Simplify bcm_dmaman_probe() using devm_* functions.
95 - Get dmachans from DT if available.
96 - Keep 'dma.dmachans' module argument name for backwards compatibility.
98 Make it available on ARCH_BCM2835 as well.
100 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
102 dmaengine: bcm2708: set residue_granularity field
104 bcm2708-dmaengine supports residue reporting at burst level
105 but didn't report this via the residue_granularity field.
107 Without this field set properly we get playback issues with I2S cards.
109 dmaengine: bcm2708-dmaengine: Fix memory leak when stopping a running transfer
111 bcm2708-dmaengine: Use more DMA channels (but not 12)
113 1) Only the bcm2708_fb drivers uses the legacy DMA API, and
114 it requires a BULK-capable channel, so all other types
115 (FAST, NORMAL and LITE) can be made available to the regular
118 2) DMA channels 11-14 share an interrupt. The driver can't
119 handle this, so don't use channels 12-14 (12 was used, probably
120 because it appears to have an interrupt, but in reality that
121 interrupt is for activity on ANY channel). This may explain
122 a lockup encountered when running out of DMA channels.
124 The combined effect of this patch is to leave 7 DMA channels
125 available + channel 0 for bcm2708_fb via the legacy API.
127 See: https://github.com/raspberrypi/linux/issues/1110
128 https://github.com/raspberrypi/linux/issues/1108
130 dmaengine: bcm2708: Make legacy API available for bcm2835-dma
132 bcm2708_fb uses the legacy DMA API, so in order to start using
133 bcm2835-dma, bcm2835-dma has to support the legacy API. Make this
134 possible by exporting bcm_dmaman_probe() and bcm_dmaman_remove().
136 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
138 dmaengine: bcm2708: Change DT compatible string
140 Both bcm2835-dma and bcm2708-dmaengine have the same compatible string.
141 So change compatible to "brcm,bcm2708-dma".
143 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
145 dmaengine: bcm2708: Remove driver but keep legacy API
147 Dropping non-DT support means we don't need this driver,
148 but we still need the legacy DMA API.
150 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
152 bcm2708-dmaengine - Fix arm64 portability/build issues
154 dma-bcm2708: Fix module compilation of CONFIG_DMA_BCM2708
156 bcm2708-dmaengine.c defines functions like bcm_dma_start which are
157 defined as well in dma-bcm2708.h as inline versions when
158 CONFIG_DMA_BCM2708 is not defined. This works fine when
159 CONFIG_DMA_BCM2708 is built in, but when it is selected as module build
160 fails with redefinition errors because in the build system when
161 CONFIG_DMA_BCM2708 is selected as module, the macro becomes
162 CONFIG_DMA_BCM2708_MODULE.
164 This patch makes the header use CONFIG_DMA_BCM2708_MODULE too when
167 Fixes https://github.com/raspberrypi/linux/issues/2056
169 Signed-off-by: Andrei Gherzan <andrei@gherzan.com>
171 bcm2708-dmaengine: Use platform_get_irq
173 The platform driver framework no longer creates IRQ resources for
174 platform devices because they are expected to use platform_get_irq.
175 This causes the bcm2808_fb acceleration to fail.
177 Fix the problem by calling platform_get_irq as intended.
179 See: https://github.com/raspberrypi/linux/issues/5131
181 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
183 drivers/dma/Kconfig | 6 +-
184 drivers/dma/Makefile | 1 +
185 drivers/dma/bcm2708-dmaengine.c | 281 ++++++++++++++++++++++
186 include/linux/platform_data/dma-bcm2708.h | 143 +++++++++++
187 4 files changed, 430 insertions(+), 1 deletion(-)
188 create mode 100644 drivers/dma/bcm2708-dmaengine.c
189 create mode 100644 include/linux/platform_data/dma-bcm2708.h
191 --- a/drivers/dma/Kconfig
192 +++ b/drivers/dma/Kconfig
193 @@ -135,7 +135,7 @@ config BCM_SBA_RAID
196 tristate "BCM2835 DMA engine support"
197 - depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
198 + depends on ARCH_BCM2835
200 select DMA_VIRTUAL_CHANNELS
202 @@ -703,6 +703,10 @@ config UNIPHIER_XDMAC
203 UniPhier platform. This DMA controller can transfer data from
204 memory to memory, memory to peripheral and peripheral to memory.
207 + tristate "BCM2708 DMA legacy API support"
208 + depends on DMA_BCM2835
211 tristate "APM X-Gene DMA support"
212 depends on ARCH_XGENE || COMPILE_TEST
213 --- a/drivers/dma/Makefile
214 +++ b/drivers/dma/Makefile
215 @@ -22,6 +22,7 @@ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
216 obj-$(CONFIG_AT_XDMAC) += at_xdmac.o
217 obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o
218 obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o
219 +obj-$(CONFIG_DMA_BCM2708) += bcm2708-dmaengine.o
220 obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
221 obj-$(CONFIG_DMA_JZ4780) += dma-jz4780.o
222 obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
224 +++ b/drivers/dma/bcm2708-dmaengine.c
227 + * BCM2708 legacy DMA API
229 + * This program is free software; you can redistribute it and/or modify
230 + * it under the terms of the GNU General Public License as published by
231 + * the Free Software Foundation; either version 2 of the License, or
232 + * (at your option) any later version.
234 + * This program is distributed in the hope that it will be useful,
235 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
236 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
237 + * GNU General Public License for more details.
240 +#include <linux/init.h>
241 +#include <linux/interrupt.h>
242 +#include <linux/list.h>
243 +#include <linux/module.h>
244 +#include <linux/platform_data/dma-bcm2708.h>
245 +#include <linux/platform_device.h>
246 +#include <linux/slab.h>
247 +#include <linux/io.h>
248 +#include <linux/spinlock.h>
250 +#include "virt-dma.h"
252 +#define CACHE_LINE_MASK 31
253 +#define DEFAULT_DMACHAN_BITMAP 0x10 /* channel 4 only */
255 +/* valid only for channels 0 - 14, 15 has its own base address */
256 +#define BCM2708_DMA_CHAN(n) ((n) << 8) /* base address */
257 +#define BCM2708_DMA_CHANIO(dma_base, n) \
258 + ((void __iomem *)((char *)(dma_base) + BCM2708_DMA_CHAN(n)))
261 + void __iomem *dma_base;
262 + u32 chan_available; /* bitmap of available channels */
263 + u32 has_feature[BCM_DMA_FEATURE_COUNT]; /* bitmap of feature presence */
267 +static struct device *dmaman_dev; /* we assume there's only one! */
268 +static struct vc_dmaman *g_dmaman; /* DMA manager */
270 +/* DMA Auxiliary Functions */
272 +/* A DMA buffer on an arbitrary boundary may separate a cache line into a
273 + section inside the DMA buffer and another section outside it.
274 + Even if we flush DMA buffers from the cache there is always the chance that
275 + during a DMA someone will access the part of a cache line that is outside
276 + the DMA buffer - which will then bring in unwelcome data.
277 + Without being able to dictate our own buffer pools we must insist that
278 + DMA buffers consist of a whole number of cache lines.
280 +extern int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len)
284 + for (i = 0; i < sg_len; i++) {
285 + if (sg_ptr[i].offset & CACHE_LINE_MASK ||
286 + sg_ptr[i].length & CACHE_LINE_MASK)
292 +EXPORT_SYMBOL_GPL(bcm_sg_suitable_for_dma);
294 +extern void bcm_dma_start(void __iomem *dma_chan_base,
295 + dma_addr_t control_block)
297 + dsb(sy); /* ARM data synchronization (push) operation */
299 + writel(control_block, dma_chan_base + BCM2708_DMA_ADDR);
300 + writel(BCM2708_DMA_ACTIVE, dma_chan_base + BCM2708_DMA_CS);
302 +EXPORT_SYMBOL_GPL(bcm_dma_start);
304 +extern void bcm_dma_wait_idle(void __iomem *dma_chan_base)
308 + /* ugly busy wait only option for now */
309 + while (readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE)
312 +EXPORT_SYMBOL_GPL(bcm_dma_wait_idle);
314 +extern bool bcm_dma_is_busy(void __iomem *dma_chan_base)
318 + return readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE;
320 +EXPORT_SYMBOL_GPL(bcm_dma_is_busy);
322 +/* Complete an ongoing DMA (assuming its results are to be ignored)
323 + Does nothing if there is no DMA in progress.
324 + This routine waits for the current AXI transfer to complete before
325 + terminating the current DMA. If the current transfer is hung on a DREQ used
326 + by an uncooperative peripheral the AXI transfer may never complete. In this
327 + case the routine times out and return a non-zero error code.
328 + Use of this routine doesn't guarantee that the ongoing or aborted DMA
329 + does not produce an interrupt.
331 +extern int bcm_dma_abort(void __iomem *dma_chan_base)
333 + unsigned long int cs;
336 + cs = readl(dma_chan_base + BCM2708_DMA_CS);
338 + if (BCM2708_DMA_ACTIVE & cs) {
339 + long int timeout = 10000;
341 + /* write 0 to the active bit - pause the DMA */
342 + writel(0, dma_chan_base + BCM2708_DMA_CS);
344 + /* wait for any current AXI transfer to complete */
345 + while (0 != (cs & BCM2708_DMA_ISPAUSED) && --timeout >= 0)
346 + cs = readl(dma_chan_base + BCM2708_DMA_CS);
348 + if (0 != (cs & BCM2708_DMA_ISPAUSED)) {
349 + /* we'll un-pause when we set of our next DMA */
352 + } else if (BCM2708_DMA_ACTIVE & cs) {
353 + /* terminate the control block chain */
354 + writel(0, dma_chan_base + BCM2708_DMA_NEXTCB);
356 + /* abort the whole DMA */
357 + writel(BCM2708_DMA_ABORT | BCM2708_DMA_ACTIVE,
358 + dma_chan_base + BCM2708_DMA_CS);
364 +EXPORT_SYMBOL_GPL(bcm_dma_abort);
366 + /* DMA Manager Device Methods */
368 +static void vc_dmaman_init(struct vc_dmaman *dmaman, void __iomem *dma_base,
369 + u32 chans_available)
371 + dmaman->dma_base = dma_base;
372 + dmaman->chan_available = chans_available;
373 + dmaman->has_feature[BCM_DMA_FEATURE_FAST_ORD] = 0x0c; /* 2 & 3 */
374 + dmaman->has_feature[BCM_DMA_FEATURE_BULK_ORD] = 0x01; /* 0 */
375 + dmaman->has_feature[BCM_DMA_FEATURE_NORMAL_ORD] = 0xfe; /* 1 to 7 */
376 + dmaman->has_feature[BCM_DMA_FEATURE_LITE_ORD] = 0x7f00; /* 8 to 14 */
379 +static int vc_dmaman_chan_alloc(struct vc_dmaman *dmaman,
380 + unsigned required_feature_set)
386 + chans = dmaman->chan_available;
387 + for (feature = 0; feature < BCM_DMA_FEATURE_COUNT; feature++)
388 + /* select the subset of available channels with the desired
390 + if (required_feature_set & (1 << feature))
391 + chans &= dmaman->has_feature[feature];
396 + /* return the ordinal of the first channel in the bitmap */
397 + while (chans != 0 && (chans & 1) == 0) {
401 + /* claim the channel */
402 + dmaman->chan_available &= ~(1 << chan);
407 +static int vc_dmaman_chan_free(struct vc_dmaman *dmaman, int chan)
412 + if ((1 << chan) & dmaman->chan_available)
415 + dmaman->chan_available |= (1 << chan);
420 +/* DMA Manager Monitor */
422 +extern int bcm_dma_chan_alloc(unsigned required_feature_set,
423 + void __iomem **out_dma_base, int *out_dma_irq)
425 + struct vc_dmaman *dmaman = g_dmaman;
426 + struct platform_device *pdev = to_platform_device(dmaman_dev);
433 + mutex_lock(&dmaman->lock);
434 + chan = vc_dmaman_chan_alloc(dmaman, required_feature_set);
438 + irq = platform_get_irq(pdev, (unsigned int)chan);
440 + dev_err(dmaman_dev, "failed to get irq for DMA channel %d\n",
442 + vc_dmaman_chan_free(dmaman, chan);
447 + *out_dma_base = BCM2708_DMA_CHANIO(dmaman->dma_base, chan);
448 + *out_dma_irq = irq;
449 + dev_dbg(dmaman_dev,
450 + "Legacy API allocated channel=%d, base=%p, irq=%i\n",
451 + chan, *out_dma_base, *out_dma_irq);
454 + mutex_unlock(&dmaman->lock);
458 +EXPORT_SYMBOL_GPL(bcm_dma_chan_alloc);
460 +extern int bcm_dma_chan_free(int channel)
462 + struct vc_dmaman *dmaman = g_dmaman;
468 + mutex_lock(&dmaman->lock);
469 + rc = vc_dmaman_chan_free(dmaman, channel);
470 + mutex_unlock(&dmaman->lock);
474 +EXPORT_SYMBOL_GPL(bcm_dma_chan_free);
476 +int bcm_dmaman_probe(struct platform_device *pdev, void __iomem *base,
477 + u32 chans_available)
479 + struct device *dev = &pdev->dev;
480 + struct vc_dmaman *dmaman;
482 + dmaman = devm_kzalloc(dev, sizeof(*dmaman), GFP_KERNEL);
486 + mutex_init(&dmaman->lock);
487 + vc_dmaman_init(dmaman, base, chans_available);
491 + dev_info(dev, "DMA legacy API manager, dmachans=0x%x\n",
496 +EXPORT_SYMBOL(bcm_dmaman_probe);
498 +int bcm_dmaman_remove(struct platform_device *pdev)
504 +EXPORT_SYMBOL(bcm_dmaman_remove);
506 +MODULE_LICENSE("GPL");
508 +++ b/include/linux/platform_data/dma-bcm2708.h
511 + * Copyright (C) 2010 Broadcom
513 + * This program is free software; you can redistribute it and/or modify
514 + * it under the terms of the GNU General Public License version 2 as
515 + * published by the Free Software Foundation.
518 +#ifndef _PLAT_BCM2708_DMA_H
519 +#define _PLAT_BCM2708_DMA_H
521 +/* DMA CS Control and Status bits */
522 +#define BCM2708_DMA_ACTIVE BIT(0)
523 +#define BCM2708_DMA_INT BIT(2)
524 +#define BCM2708_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
525 +#define BCM2708_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
526 +#define BCM2708_DMA_ERR BIT(8)
527 +#define BCM2708_DMA_ABORT BIT(30) /* stop current CB, go to next, WO */
528 +#define BCM2708_DMA_RESET BIT(31) /* WO, self clearing */
530 +/* DMA control block "info" field bits */
531 +#define BCM2708_DMA_INT_EN BIT(0)
532 +#define BCM2708_DMA_TDMODE BIT(1)
533 +#define BCM2708_DMA_WAIT_RESP BIT(3)
534 +#define BCM2708_DMA_D_INC BIT(4)
535 +#define BCM2708_DMA_D_WIDTH BIT(5)
536 +#define BCM2708_DMA_D_DREQ BIT(6)
537 +#define BCM2708_DMA_S_INC BIT(8)
538 +#define BCM2708_DMA_S_WIDTH BIT(9)
539 +#define BCM2708_DMA_S_DREQ BIT(10)
541 +#define BCM2708_DMA_BURST(x) (((x) & 0xf) << 12)
542 +#define BCM2708_DMA_PER_MAP(x) ((x) << 16)
543 +#define BCM2708_DMA_WAITS(x) (((x) & 0x1f) << 21)
545 +#define BCM2708_DMA_DREQ_EMMC 11
546 +#define BCM2708_DMA_DREQ_SDHOST 13
548 +#define BCM2708_DMA_CS 0x00 /* Control and Status */
549 +#define BCM2708_DMA_ADDR 0x04
550 +/* the current control block appears in the following registers - read only */
551 +#define BCM2708_DMA_INFO 0x08
552 +#define BCM2708_DMA_SOURCE_AD 0x0c
553 +#define BCM2708_DMA_DEST_AD 0x10
554 +#define BCM2708_DMA_NEXTCB 0x1C
555 +#define BCM2708_DMA_DEBUG 0x20
557 +#define BCM2708_DMA4_CS (BCM2708_DMA_CHAN(4) + BCM2708_DMA_CS)
558 +#define BCM2708_DMA4_ADDR (BCM2708_DMA_CHAN(4) + BCM2708_DMA_ADDR)
560 +#define BCM2708_DMA_TDMODE_LEN(w, h) ((h) << 16 | (w))
562 +/* When listing features we can ask for when allocating DMA channels give
563 + those with higher priority smaller ordinal numbers */
564 +#define BCM_DMA_FEATURE_FAST_ORD 0
565 +#define BCM_DMA_FEATURE_BULK_ORD 1
566 +#define BCM_DMA_FEATURE_NORMAL_ORD 2
567 +#define BCM_DMA_FEATURE_LITE_ORD 3
568 +#define BCM_DMA_FEATURE_FAST BIT(BCM_DMA_FEATURE_FAST_ORD)
569 +#define BCM_DMA_FEATURE_BULK BIT(BCM_DMA_FEATURE_BULK_ORD)
570 +#define BCM_DMA_FEATURE_NORMAL BIT(BCM_DMA_FEATURE_NORMAL_ORD)
571 +#define BCM_DMA_FEATURE_LITE BIT(BCM_DMA_FEATURE_LITE_ORD)
572 +#define BCM_DMA_FEATURE_COUNT 4
574 +struct bcm2708_dma_cb {
585 +struct platform_device;
587 +#if defined(CONFIG_DMA_BCM2708) || defined(CONFIG_DMA_BCM2708_MODULE)
589 +int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len);
590 +void bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block);
591 +void bcm_dma_wait_idle(void __iomem *dma_chan_base);
592 +bool bcm_dma_is_busy(void __iomem *dma_chan_base);
593 +int bcm_dma_abort(void __iomem *dma_chan_base);
595 +/* return channel no or -ve error */
596 +int bcm_dma_chan_alloc(unsigned preferred_feature_set,
597 + void __iomem **out_dma_base, int *out_dma_irq);
598 +int bcm_dma_chan_free(int channel);
600 +int bcm_dmaman_probe(struct platform_device *pdev, void __iomem *base,
601 + u32 chans_available);
602 +int bcm_dmaman_remove(struct platform_device *pdev);
604 +#else /* CONFIG_DMA_BCM2708 */
606 +static inline int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr,
612 +static inline void bcm_dma_start(void __iomem *dma_chan_base,
613 + dma_addr_t control_block) { }
615 +static inline void bcm_dma_wait_idle(void __iomem *dma_chan_base) { }
617 +static inline bool bcm_dma_is_busy(void __iomem *dma_chan_base)
622 +static inline int bcm_dma_abort(void __iomem *dma_chan_base)
627 +static inline int bcm_dma_chan_alloc(unsigned preferred_feature_set,
628 + void __iomem **out_dma_base,
634 +static inline int bcm_dma_chan_free(int channel)
639 +static inline int bcm_dmaman_probe(struct platform_device *pdev,
640 + void __iomem *base, u32 chans_available)
645 +static inline int bcm_dmaman_remove(struct platform_device *pdev)
650 +#endif /* CONFIG_DMA_BCM2708 || CONFIG_DMA_BCM2708_MODULE */
652 +#endif /* _PLAT_BCM2708_DMA_H */