1 From 1a08cc86d5da8bb08747277d8f46040b0fb0da3e Mon Sep 17 00:00:00 2001
2 From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
3 Date: Tue, 23 Aug 2022 03:58:22 +0300
4 Subject: [PATCH] media: i2c: IMX296 camera sensor driver
6 The IMX296LLR is a monochrome 1.60MP CMOS sensor from Sony. The driver
7 supports cropping and binning (but not both at the same time due to
8 hardware limitations) and exposure, gain, vertical blanking and test
11 Preliminary support is also included for the color IMX296LQR sensor.
13 Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 [Sakari Ailus: Make driver's remove function return void]
15 Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
18 drivers/media/i2c/Kconfig | 13 +
19 drivers/media/i2c/Makefile | 1 +
20 drivers/media/i2c/imx296.c | 1172 ++++++++++++++++++++++++++++++++++++
21 4 files changed, 1187 insertions(+)
22 create mode 100644 drivers/media/i2c/imx296.c
26 @@ -19281,6 +19281,7 @@ L: linux-media@vger.kernel.org
28 T: git git://linuxtv.org/media_tree.git
29 F: Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml
30 +F: drivers/media/i2c/imx296.c
32 SONY IMX319 SENSOR DRIVER
33 M: Bingbu Cao <bingbu.cao@intel.com>
34 --- a/drivers/media/i2c/Kconfig
35 +++ b/drivers/media/i2c/Kconfig
36 @@ -191,6 +191,19 @@ config VIDEO_IMX290
37 To compile this driver as a module, choose M here: the
38 module will be called imx290.
41 + tristate "Sony IMX296 sensor support"
42 + depends on I2C && VIDEO_DEV
43 + select MEDIA_CONTROLLER
45 + select VIDEO_V4L2_SUBDEV_API
47 + This is a Video4Linux2 sensor driver for the Sony
50 + To compile this driver as a module, choose M here: the
51 + module will be called imx296.
54 tristate "Sony IMX319 sensor support"
55 depends on I2C && VIDEO_DEV
56 --- a/drivers/media/i2c/Makefile
57 +++ b/drivers/media/i2c/Makefile
58 @@ -46,6 +46,7 @@ obj-$(CONFIG_VIDEO_IMX219) += imx219.o
59 obj-$(CONFIG_VIDEO_IMX258) += imx258.o
60 obj-$(CONFIG_VIDEO_IMX274) += imx274.o
61 obj-$(CONFIG_VIDEO_IMX290) += imx290.o
62 +obj-$(CONFIG_VIDEO_IMX296) += imx296.o
63 obj-$(CONFIG_VIDEO_IMX319) += imx319.o
64 obj-$(CONFIG_VIDEO_IMX334) += imx334.o
65 obj-$(CONFIG_VIDEO_IMX335) += imx335.o
67 +++ b/drivers/media/i2c/imx296.c
69 +// SPDX-License-Identifier: GPL-2.0
71 + * Driver for IMX296 CMOS Image Sensor from Sony
73 + * Copyright 2019 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
76 +#include <linux/clk.h>
77 +#include <linux/gpio/consumer.h>
78 +#include <linux/i2c.h>
79 +#include <linux/module.h>
80 +#include <linux/of_device.h>
81 +#include <linux/pm_runtime.h>
82 +#include <linux/regmap.h>
83 +#include <linux/regulator/consumer.h>
84 +#include <linux/slab.h>
85 +#include <linux/videodev2.h>
87 +#include <media/v4l2-ctrls.h>
88 +#include <media/v4l2-fwnode.h>
89 +#include <media/v4l2-subdev.h>
91 +#define IMX296_PIXEL_ARRAY_WIDTH 1456
92 +#define IMX296_PIXEL_ARRAY_HEIGHT 1088
94 +#define IMX296_REG_8BIT(n) ((1 << 16) | (n))
95 +#define IMX296_REG_16BIT(n) ((2 << 16) | (n))
96 +#define IMX296_REG_24BIT(n) ((3 << 16) | (n))
97 +#define IMX296_REG_SIZE_SHIFT 16
98 +#define IMX296_REG_ADDR_MASK 0xffff
100 +#define IMX296_CTRL00 IMX296_REG_8BIT(0x3000)
101 +#define IMX296_CTRL00_STANDBY BIT(0)
102 +#define IMX296_CTRL08 IMX296_REG_8BIT(0x3008)
103 +#define IMX296_CTRL08_REGHOLD BIT(0)
104 +#define IMX296_CTRL0A IMX296_REG_8BIT(0x300a)
105 +#define IMX296_CTRL0A_XMSTA BIT(0)
106 +#define IMX296_CTRL0B IMX296_REG_8BIT(0x300b)
107 +#define IMX296_CTRL0B_TRIGEN BIT(0)
108 +#define IMX296_CTRL0D IMX296_REG_8BIT(0x300d)
109 +#define IMX296_CTRL0D_WINMODE_ALL (0 << 0)
110 +#define IMX296_CTRL0D_WINMODE_FD_BINNING (2 << 0)
111 +#define IMX296_CTRL0D_HADD_ON_BINNING BIT(5)
112 +#define IMX296_CTRL0D_SAT_CNT BIT(6)
113 +#define IMX296_CTRL0E IMX296_REG_8BIT(0x300e)
114 +#define IMX296_CTRL0E_VREVERSE BIT(0)
115 +#define IMX296_CTRL0E_HREVERSE BIT(1)
116 +#define IMX296_VMAX IMX296_REG_24BIT(0x3010)
117 +#define IMX296_HMAX IMX296_REG_16BIT(0x3014)
118 +#define IMX296_TMDCTRL IMX296_REG_8BIT(0x301d)
119 +#define IMX296_TMDCTRL_LATCH BIT(0)
120 +#define IMX296_TMDOUT IMX296_REG_16BIT(0x301e)
121 +#define IMX296_TMDOUT_MASK 0x3ff
122 +#define IMX296_WDSEL IMX296_REG_8BIT(0x3021)
123 +#define IMX296_WDSEL_NORMAL (0 << 0)
124 +#define IMX296_WDSEL_MULTI_2 (1 << 0)
125 +#define IMX296_WDSEL_MULTI_4 (3 << 0)
126 +#define IMX296_BLKLEVELAUTO IMX296_REG_8BIT(0x3022)
127 +#define IMX296_BLKLEVELAUTO_ON 0x01
128 +#define IMX296_BLKLEVELAUTO_OFF 0xf0
129 +#define IMX296_SST IMX296_REG_8BIT(0x3024)
130 +#define IMX296_SST_EN BIT(0)
131 +#define IMX296_CTRLTOUT IMX296_REG_8BIT(0x3026)
132 +#define IMX296_CTRLTOUT_TOUT1SEL_LOW (0 << 0)
133 +#define IMX296_CTRLTOUT_TOUT1SEL_PULSE (3 << 0)
134 +#define IMX296_CTRLTOUT_TOUT2SEL_LOW (0 << 2)
135 +#define IMX296_CTRLTOUT_TOUT2SEL_PULSE (3 << 2)
136 +#define IMX296_CTRLTRIG IMX296_REG_8BIT(0x3029)
137 +#define IMX296_CTRLTRIG_TOUT1_SEL_LOW (0 << 0)
138 +#define IMX296_CTRLTRIG_TOUT1_SEL_PULSE1 (1 << 0)
139 +#define IMX296_CTRLTRIG_TOUT2_SEL_LOW (0 << 4)
140 +#define IMX296_CTRLTRIG_TOUT2_SEL_PULSE2 (2 << 4)
141 +#define IMX296_SYNCSEL IMX296_REG_8BIT(0x3036)
142 +#define IMX296_SYNCSEL_NORMAL 0xc0
143 +#define IMX296_SYNCSEL_HIZ 0xf0
144 +#define IMX296_PULSE1 IMX296_REG_8BIT(0x306d)
145 +#define IMX296_PULSE1_EN_NOR BIT(0)
146 +#define IMX296_PULSE1_EN_TRIG BIT(1)
147 +#define IMX296_PULSE1_POL_HIGH (0 << 2)
148 +#define IMX296_PULSE1_POL_LOW (1 << 2)
149 +#define IMX296_PULSE1_UP IMX296_REG_24BIT(0x3070)
150 +#define IMX296_PULSE1_DN IMX296_REG_24BIT(0x3074)
151 +#define IMX296_PULSE2 IMX296_REG_8BIT(0x3079)
152 +#define IMX296_PULSE2_EN_NOR BIT(0)
153 +#define IMX296_PULSE2_EN_TRIG BIT(1)
154 +#define IMX296_PULSE2_POL_HIGH (0 << 2)
155 +#define IMX296_PULSE2_POL_LOW (1 << 2)
156 +#define IMX296_PULSE2_UP IMX296_REG_24BIT(0x307c)
157 +#define IMX296_PULSE2_DN IMX296_REG_24BIT(0x3080)
158 +#define IMX296_INCKSEL(n) IMX296_REG_8BIT(0x3089 + (n))
159 +#define IMX296_SHS1 IMX296_REG_24BIT(0x308d)
160 +#define IMX296_SHS2 IMX296_REG_24BIT(0x3090)
161 +#define IMX296_SHS3 IMX296_REG_24BIT(0x3094)
162 +#define IMX296_SHS4 IMX296_REG_24BIT(0x3098)
163 +#define IMX296_VBLANKLP IMX296_REG_8BIT(0x309c)
164 +#define IMX296_VBLANKLP_NORMAL 0x04
165 +#define IMX296_VBLANKLP_LOW_POWER 0x2c
166 +#define IMX296_EXP_CNT IMX296_REG_8BIT(0x30a3)
167 +#define IMX296_EXP_CNT_RESET BIT(0)
168 +#define IMX296_EXP_MAX IMX296_REG_16BIT(0x30a6)
169 +#define IMX296_VINT IMX296_REG_8BIT(0x30aa)
170 +#define IMX296_VINT_EN BIT(0)
171 +#define IMX296_LOWLAGTRG IMX296_REG_8BIT(0x30ae)
172 +#define IMX296_LOWLAGTRG_FAST BIT(0)
173 +#define IMX296_I2CCTRL IMX296_REG_8BIT(0x30ef)
174 +#define IMX296_I2CCTRL_I2CACKEN BIT(0)
176 +#define IMX296_SENSOR_INFO IMX296_REG_16BIT(0x3148)
177 +#define IMX296_SENSOR_INFO_MONO BIT(15)
178 +#define IMX296_SENSOR_INFO_IMX296LQ 0x4a00
179 +#define IMX296_SENSOR_INFO_IMX296LL 0xca00
180 +#define IMX296_S_SHSA IMX296_REG_16BIT(0x31ca)
181 +#define IMX296_S_SHSB IMX296_REG_16BIT(0x31d2)
183 + * Registers 0x31c8 to 0x31cd, 0x31d0 to 0x31d5, 0x31e2, 0x31e3, 0x31ea and
184 + * 0x31eb are related to exposure mode but otherwise not documented.
187 +#define IMX296_GAINCTRL IMX296_REG_8BIT(0x3200)
188 +#define IMX296_GAINCTRL_WD_GAIN_MODE_NORMAL 0x01
189 +#define IMX296_GAINCTRL_WD_GAIN_MODE_MULTI 0x41
190 +#define IMX296_GAIN IMX296_REG_16BIT(0x3204)
191 +#define IMX296_GAIN_MIN 0
192 +#define IMX296_GAIN_MAX 480
193 +#define IMX296_GAIN1 IMX296_REG_16BIT(0x3208)
194 +#define IMX296_GAIN2 IMX296_REG_16BIT(0x320c)
195 +#define IMX296_GAIN3 IMX296_REG_16BIT(0x3210)
196 +#define IMX296_GAINDLY IMX296_REG_8BIT(0x3212)
197 +#define IMX296_GAINDLY_NONE 0x08
198 +#define IMX296_GAINDLY_1FRAME 0x09
199 +#define IMX296_PGCTRL IMX296_REG_8BIT(0x3238)
200 +#define IMX296_PGCTRL_REGEN BIT(0)
201 +#define IMX296_PGCTRL_THRU BIT(1)
202 +#define IMX296_PGCTRL_CLKEN BIT(2)
203 +#define IMX296_PGCTRL_MODE(n) ((n) << 3)
204 +#define IMX296_PGHPOS IMX296_REG_16BIT(0x3239)
205 +#define IMX296_PGVPOS IMX296_REG_16BIT(0x323c)
206 +#define IMX296_PGHPSTEP IMX296_REG_8BIT(0x323e)
207 +#define IMX296_PGVPSTEP IMX296_REG_8BIT(0x323f)
208 +#define IMX296_PGHPNUM IMX296_REG_8BIT(0x3240)
209 +#define IMX296_PGVPNUM IMX296_REG_8BIT(0x3241)
210 +#define IMX296_PGDATA1 IMX296_REG_16BIT(0x3244)
211 +#define IMX296_PGDATA2 IMX296_REG_16BIT(0x3246)
212 +#define IMX296_PGHGSTEP IMX296_REG_8BIT(0x3249)
213 +#define IMX296_BLKLEVEL IMX296_REG_16BIT(0x3254)
215 +#define IMX296_FID0_ROI IMX296_REG_8BIT(0x3300)
216 +#define IMX296_FID0_ROIH1ON BIT(0)
217 +#define IMX296_FID0_ROIV1ON BIT(1)
218 +#define IMX296_FID0_ROIPH1 IMX296_REG_16BIT(0x3310)
219 +#define IMX296_FID0_ROIPV1 IMX296_REG_16BIT(0x3312)
220 +#define IMX296_FID0_ROIWH1 IMX296_REG_16BIT(0x3314)
221 +#define IMX296_FID0_ROIWH1_MIN 80
222 +#define IMX296_FID0_ROIWV1 IMX296_REG_16BIT(0x3316)
223 +#define IMX296_FID0_ROIWV1_MIN 4
225 +#define IMX296_CM_HSST_STARTTMG IMX296_REG_16BIT(0x4018)
226 +#define IMX296_CM_HSST_ENDTMG IMX296_REG_16BIT(0x401a)
227 +#define IMX296_DA_HSST_STARTTMG IMX296_REG_16BIT(0x404d)
228 +#define IMX296_DA_HSST_ENDTMG IMX296_REG_16BIT(0x4050)
229 +#define IMX296_LM_HSST_STARTTMG IMX296_REG_16BIT(0x4094)
230 +#define IMX296_LM_HSST_ENDTMG IMX296_REG_16BIT(0x4096)
231 +#define IMX296_SST_SIEASTA1_SET IMX296_REG_8BIT(0x40c9)
232 +#define IMX296_SST_SIEASTA1PRE_1U IMX296_REG_16BIT(0x40cc)
233 +#define IMX296_SST_SIEASTA1PRE_1D IMX296_REG_16BIT(0x40ce)
234 +#define IMX296_SST_SIEASTA1PRE_2U IMX296_REG_16BIT(0x40d0)
235 +#define IMX296_SST_SIEASTA1PRE_2D IMX296_REG_16BIT(0x40d2)
236 +#define IMX296_HSST IMX296_REG_8BIT(0x40dc)
237 +#define IMX296_HSST_EN BIT(2)
239 +#define IMX296_CKREQSEL IMX296_REG_8BIT(0x4101)
240 +#define IMX296_CKREQSEL_HS BIT(2)
241 +#define IMX296_GTTABLENUM IMX296_REG_8BIT(0x4114)
242 +#define IMX296_CTRL418C IMX296_REG_8BIT(0x418c)
244 +struct imx296_clk_params {
250 +static const struct imx296_clk_params imx296_clk_params[] = {
251 + { 37125000, { 0x80, 0x0b, 0x80, 0x08 }, 116 },
252 + { 54000000, { 0xb0, 0x0f, 0xb0, 0x0c }, 168 },
253 + { 74250000, { 0x80, 0x0f, 0x80, 0x0c }, 232 },
256 +static const char * const imx296_supply_names[] = {
263 + struct device *dev;
265 + struct regulator_bulk_data supplies[ARRAY_SIZE(imx296_supply_names)];
266 + struct gpio_desc *reset;
267 + struct regmap *regmap;
269 + const struct imx296_clk_params *clk_params;
274 + struct v4l2_subdev subdev;
275 + struct media_pad pad;
277 + struct v4l2_ctrl_handler ctrls;
278 + struct v4l2_ctrl *hblank;
279 + struct v4l2_ctrl *vblank;
282 +static inline struct imx296 *to_imx296(struct v4l2_subdev *sd)
284 + return container_of(sd, struct imx296, subdev);
287 +static int imx296_read(struct imx296 *sensor, u32 addr)
289 + u8 data[3] = { 0, 0, 0 };
292 + ret = regmap_raw_read(sensor->regmap, addr & IMX296_REG_ADDR_MASK, data,
293 + (addr >> IMX296_REG_SIZE_SHIFT) & 3);
297 + return (data[2] << 16) | (data[1] << 8) | data[0];
300 +static int imx296_write(struct imx296 *sensor, u32 addr, u32 value, int *err)
302 + u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 };
308 + ret = regmap_raw_write(sensor->regmap, addr & IMX296_REG_ADDR_MASK,
309 + data, (addr >> IMX296_REG_SIZE_SHIFT) & 3);
311 + dev_err(sensor->dev, "%u-bit write to 0x%04x failed: %d\n",
312 + ((addr >> IMX296_REG_SIZE_SHIFT) & 3) * 8,
313 + addr & IMX296_REG_ADDR_MASK, ret);
321 +static int imx296_power_on(struct imx296 *sensor)
325 + ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies),
332 + ret = gpiod_direction_output(sensor->reset, 0);
338 + ret = clk_prepare_enable(sensor->clk);
343 + * The documentation doesn't explicitly say how much time is required
344 + * after providing a clock and before starting I2C communication. It
345 + * mentions a delay of 20µs in 4-wire mode, but tests showed that a
346 + * delay of 100µs resulted in I2C communication failures, while 500µs
347 + * seems to be enough. Be conservative.
349 + usleep_range(1000, 2000);
354 + gpiod_direction_output(sensor->reset, 1);
356 + regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
360 +static void imx296_power_off(struct imx296 *sensor)
362 + clk_disable_unprepare(sensor->clk);
363 + gpiod_direction_output(sensor->reset, 1);
364 + regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
367 +/* -----------------------------------------------------------------------------
371 +static const char * const imx296_test_pattern_menu[] = {
384 +static int imx296_s_ctrl(struct v4l2_ctrl *ctrl)
386 + struct imx296 *sensor = container_of(ctrl->handler, struct imx296, ctrls);
387 + const struct v4l2_mbus_framefmt *format;
388 + struct v4l2_subdev_state *state;
392 + if (!sensor->streaming)
395 + state = v4l2_subdev_get_locked_active_state(&sensor->subdev);
396 + format = v4l2_subdev_get_pad_format(&sensor->subdev, state, 0);
398 + switch (ctrl->id) {
399 + case V4L2_CID_EXPOSURE:
400 + /* Clamp the exposure value to VMAX. */
401 + vmax = format->height + sensor->vblank->cur.val;
402 + ctrl->val = min_t(int, ctrl->val, vmax);
403 + imx296_write(sensor, IMX296_SHS1, vmax - ctrl->val, &ret);
406 + case V4L2_CID_ANALOGUE_GAIN:
407 + imx296_write(sensor, IMX296_GAIN, ctrl->val, &ret);
410 + case V4L2_CID_VBLANK:
411 + imx296_write(sensor, IMX296_VMAX, format->height + ctrl->val,
415 + case V4L2_CID_TEST_PATTERN:
417 + imx296_write(sensor, IMX296_PGHPOS, 8, &ret);
418 + imx296_write(sensor, IMX296_PGVPOS, 8, &ret);
419 + imx296_write(sensor, IMX296_PGHPSTEP, 8, &ret);
420 + imx296_write(sensor, IMX296_PGVPSTEP, 8, &ret);
421 + imx296_write(sensor, IMX296_PGHPNUM, 100, &ret);
422 + imx296_write(sensor, IMX296_PGVPNUM, 100, &ret);
423 + imx296_write(sensor, IMX296_PGDATA1, 0x300, &ret);
424 + imx296_write(sensor, IMX296_PGDATA2, 0x100, &ret);
425 + imx296_write(sensor, IMX296_PGHGSTEP, 0, &ret);
426 + imx296_write(sensor, IMX296_BLKLEVEL, 0, &ret);
427 + imx296_write(sensor, IMX296_BLKLEVELAUTO,
428 + IMX296_BLKLEVELAUTO_OFF, &ret);
429 + imx296_write(sensor, IMX296_PGCTRL,
430 + IMX296_PGCTRL_REGEN |
431 + IMX296_PGCTRL_CLKEN |
432 + IMX296_PGCTRL_MODE(ctrl->val - 1), &ret);
434 + imx296_write(sensor, IMX296_PGCTRL,
435 + IMX296_PGCTRL_CLKEN, &ret);
436 + imx296_write(sensor, IMX296_BLKLEVEL, 0x3c, &ret);
437 + imx296_write(sensor, IMX296_BLKLEVELAUTO,
438 + IMX296_BLKLEVELAUTO_ON, &ret);
450 +static const struct v4l2_ctrl_ops imx296_ctrl_ops = {
451 + .s_ctrl = imx296_s_ctrl,
454 +static int imx296_ctrls_init(struct imx296 *sensor)
456 + struct v4l2_fwnode_device_properties props;
457 + unsigned int hblank;
460 + ret = v4l2_fwnode_device_parse(sensor->dev, &props);
464 + v4l2_ctrl_handler_init(&sensor->ctrls, 9);
466 + v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
467 + V4L2_CID_EXPOSURE, 1, 1048575, 1, 1104);
468 + v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
469 + V4L2_CID_ANALOGUE_GAIN, IMX296_GAIN_MIN,
470 + IMX296_GAIN_MAX, 1, IMX296_GAIN_MIN);
473 + * Horizontal blanking is controlled through the HMAX register, which
474 + * contains a line length in INCK clock units. The INCK frequency is
475 + * fixed to 74.25 MHz. The HMAX value is currently fixed to 1100,
476 + * convert it to a number of pixels based on the nominal pixel rate.
478 + hblank = 1100 * 1188000000ULL / 10 / 74250000
479 + - IMX296_PIXEL_ARRAY_WIDTH;
480 + sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
481 + V4L2_CID_HBLANK, hblank, hblank, 1,
483 + if (sensor->hblank)
484 + sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
486 + sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
487 + V4L2_CID_VBLANK, 30,
488 + 1048575 - IMX296_PIXEL_ARRAY_HEIGHT,
491 + * The sensor calculates the MIPI timings internally to achieve a bit
492 + * rate between 1122 and 1198 Mbps. The exact value is unfortunately not
493 + * reported, at least according to the documentation. Report a nominal
494 + * rate of 1188 Mbps as that is used by the datasheet in multiple
497 + v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE,
498 + 1122000000 / 10, 1198000000 / 10, 1, 1188000000 / 10);
499 + v4l2_ctrl_new_std_menu_items(&sensor->ctrls, &imx296_ctrl_ops,
500 + V4L2_CID_TEST_PATTERN,
501 + ARRAY_SIZE(imx296_test_pattern_menu) - 1,
502 + 0, 0, imx296_test_pattern_menu);
504 + v4l2_ctrl_new_fwnode_properties(&sensor->ctrls, &imx296_ctrl_ops,
507 + if (sensor->ctrls.error) {
508 + dev_err(sensor->dev, "failed to add controls (%d)\n",
509 + sensor->ctrls.error);
510 + v4l2_ctrl_handler_free(&sensor->ctrls);
511 + return sensor->ctrls.error;
514 + sensor->subdev.ctrl_handler = &sensor->ctrls;
519 +/* -----------------------------------------------------------------------------
520 + * V4L2 Subdev Operations
524 + * This table is extracted from vendor data that is entirely undocumented. The
525 + * first register write is required to activate the CSI-2 output. The other
526 + * entries may or may not be optional?
528 +static const struct {
530 + unsigned int value;
531 +} imx296_init_table[] = {
532 + { IMX296_REG_8BIT(0x3005), 0xf0 },
533 + { IMX296_REG_8BIT(0x309e), 0x04 },
534 + { IMX296_REG_8BIT(0x30a0), 0x04 },
535 + { IMX296_REG_8BIT(0x30a1), 0x3c },
536 + { IMX296_REG_8BIT(0x30a4), 0x5f },
537 + { IMX296_REG_8BIT(0x30a8), 0x91 },
538 + { IMX296_REG_8BIT(0x30ac), 0x28 },
539 + { IMX296_REG_8BIT(0x30af), 0x09 },
540 + { IMX296_REG_8BIT(0x30df), 0x00 },
541 + { IMX296_REG_8BIT(0x3165), 0x00 },
542 + { IMX296_REG_8BIT(0x3169), 0x10 },
543 + { IMX296_REG_8BIT(0x316a), 0x02 },
544 + { IMX296_REG_8BIT(0x31c8), 0xf3 }, /* Exposure-related */
545 + { IMX296_REG_8BIT(0x31d0), 0xf4 }, /* Exposure-related */
546 + { IMX296_REG_8BIT(0x321a), 0x00 },
547 + { IMX296_REG_8BIT(0x3226), 0x02 },
548 + { IMX296_REG_8BIT(0x3256), 0x01 },
549 + { IMX296_REG_8BIT(0x3541), 0x72 },
550 + { IMX296_REG_8BIT(0x3516), 0x77 },
551 + { IMX296_REG_8BIT(0x350b), 0x7f },
552 + { IMX296_REG_8BIT(0x3758), 0xa3 },
553 + { IMX296_REG_8BIT(0x3759), 0x00 },
554 + { IMX296_REG_8BIT(0x375a), 0x85 },
555 + { IMX296_REG_8BIT(0x375b), 0x00 },
556 + { IMX296_REG_8BIT(0x3832), 0xf5 },
557 + { IMX296_REG_8BIT(0x3833), 0x00 },
558 + { IMX296_REG_8BIT(0x38a2), 0xf6 },
559 + { IMX296_REG_8BIT(0x38a3), 0x00 },
560 + { IMX296_REG_8BIT(0x3a00), 0x80 },
561 + { IMX296_REG_8BIT(0x3d48), 0xa3 },
562 + { IMX296_REG_8BIT(0x3d49), 0x00 },
563 + { IMX296_REG_8BIT(0x3d4a), 0x85 },
564 + { IMX296_REG_8BIT(0x3d4b), 0x00 },
565 + { IMX296_REG_8BIT(0x400e), 0x58 },
566 + { IMX296_REG_8BIT(0x4014), 0x1c },
567 + { IMX296_REG_8BIT(0x4041), 0x2a },
568 + { IMX296_REG_8BIT(0x40a2), 0x06 },
569 + { IMX296_REG_8BIT(0x40c1), 0xf6 },
570 + { IMX296_REG_8BIT(0x40c7), 0x0f },
571 + { IMX296_REG_8BIT(0x40c8), 0x00 },
572 + { IMX296_REG_8BIT(0x4174), 0x00 },
575 +static int imx296_setup(struct imx296 *sensor, struct v4l2_subdev_state *state)
577 + const struct v4l2_mbus_framefmt *format;
578 + const struct v4l2_rect *crop;
582 + format = v4l2_subdev_get_pad_format(&sensor->subdev, state, 0);
583 + crop = v4l2_subdev_get_pad_crop(&sensor->subdev, state, 0);
585 + for (i = 0; i < ARRAY_SIZE(imx296_init_table); ++i)
586 + imx296_write(sensor, imx296_init_table[i].reg,
587 + imx296_init_table[i].value, &ret);
589 + if (crop->width != IMX296_PIXEL_ARRAY_WIDTH ||
590 + crop->height != IMX296_PIXEL_ARRAY_HEIGHT) {
591 + imx296_write(sensor, IMX296_FID0_ROI,
592 + IMX296_FID0_ROIH1ON | IMX296_FID0_ROIV1ON, &ret);
593 + imx296_write(sensor, IMX296_FID0_ROIPH1, crop->left, &ret);
594 + imx296_write(sensor, IMX296_FID0_ROIPV1, crop->top, &ret);
595 + imx296_write(sensor, IMX296_FID0_ROIWH1, crop->width, &ret);
596 + imx296_write(sensor, IMX296_FID0_ROIWV1, crop->height, &ret);
598 + imx296_write(sensor, IMX296_FID0_ROI, 0, &ret);
601 + imx296_write(sensor, IMX296_CTRL0D,
602 + (crop->width != format->width ?
603 + IMX296_CTRL0D_HADD_ON_BINNING : 0) |
604 + (crop->height != format->height ?
605 + IMX296_CTRL0D_WINMODE_FD_BINNING : 0),
609 + * HMAX and VMAX configure horizontal and vertical blanking by
610 + * specifying the total line time and frame time respectively. The line
611 + * time is specified in operational clock units (which appears to be the
612 + * output of an internal PLL, fixed at 74.25 MHz regardless of the
613 + * exernal clock frequency), while the frame time is specified as a
616 + * In the vertical direction the sensor outputs the following:
618 + * - one line for the FS packet
619 + * - two lines of embedded data (DT 0x12)
620 + * - six null lines (DT 0x10)
621 + * - four lines of vertical effective optical black (DT 0x37)
622 + * - 8 to 1088 lines of active image data (RAW10, DT 0x2b)
623 + * - one line for the FE packet
624 + * - 16 or more lines of vertical blanking
626 + imx296_write(sensor, IMX296_HMAX, 1100, &ret);
627 + imx296_write(sensor, IMX296_VMAX,
628 + format->height + sensor->vblank->cur.val, &ret);
630 + for (i = 0; i < ARRAY_SIZE(sensor->clk_params->incksel); ++i)
631 + imx296_write(sensor, IMX296_INCKSEL(i),
632 + sensor->clk_params->incksel[i], &ret);
633 + imx296_write(sensor, IMX296_GTTABLENUM, 0xc5, &ret);
634 + imx296_write(sensor, IMX296_CTRL418C, sensor->clk_params->ctrl418c,
637 + imx296_write(sensor, IMX296_GAINDLY, IMX296_GAINDLY_NONE, &ret);
638 + imx296_write(sensor, IMX296_BLKLEVEL, 0x03c, &ret);
643 +static int imx296_stream_on(struct imx296 *sensor)
647 + imx296_write(sensor, IMX296_CTRL00, 0, &ret);
648 + usleep_range(2000, 5000);
649 + imx296_write(sensor, IMX296_CTRL0A, 0, &ret);
654 +static int imx296_stream_off(struct imx296 *sensor)
658 + imx296_write(sensor, IMX296_CTRL0A, IMX296_CTRL0A_XMSTA, &ret);
659 + imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, &ret);
664 +static int imx296_s_stream(struct v4l2_subdev *sd, int enable)
666 + struct imx296 *sensor = to_imx296(sd);
667 + struct v4l2_subdev_state *state;
670 + state = v4l2_subdev_lock_and_get_active_state(sd);
673 + ret = imx296_stream_off(sensor);
675 + pm_runtime_mark_last_busy(sensor->dev);
676 + pm_runtime_put_autosuspend(sensor->dev);
678 + sensor->streaming = false;
683 + ret = pm_runtime_resume_and_get(sensor->dev);
687 + ret = imx296_setup(sensor, state);
692 + * Set streaming to true to ensure __v4l2_ctrl_handler_setup() will set
693 + * the controls. The flag is reset to false further down if an error
696 + sensor->streaming = true;
698 + ret = __v4l2_ctrl_handler_setup(&sensor->ctrls);
702 + ret = imx296_stream_on(sensor);
707 + v4l2_subdev_unlock_state(state);
713 + * In case of error, turn the power off synchronously as the device
714 + * likely has no other chance to recover.
716 + pm_runtime_put_sync(sensor->dev);
717 + sensor->streaming = false;
722 +static int imx296_enum_mbus_code(struct v4l2_subdev *sd,
723 + struct v4l2_subdev_state *state,
724 + struct v4l2_subdev_mbus_code_enum *code)
726 + struct imx296 *sensor = to_imx296(sd);
728 + if (code->index != 0)
731 + code->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
732 + : MEDIA_BUS_FMT_SBGGR10_1X10;
737 +static int imx296_enum_frame_size(struct v4l2_subdev *sd,
738 + struct v4l2_subdev_state *state,
739 + struct v4l2_subdev_frame_size_enum *fse)
741 + const struct v4l2_mbus_framefmt *format;
743 + format = v4l2_subdev_get_pad_format(sd, state, fse->pad);
745 + if (fse->index >= 2 || fse->code != format->code)
748 + fse->min_width = IMX296_PIXEL_ARRAY_WIDTH / (fse->index + 1);
749 + fse->max_width = fse->min_width;
750 + fse->min_height = IMX296_PIXEL_ARRAY_HEIGHT / (fse->index + 1);
751 + fse->max_height = fse->min_height;
756 +static int imx296_get_format(struct v4l2_subdev *sd,
757 + struct v4l2_subdev_state *state,
758 + struct v4l2_subdev_format *fmt)
760 + fmt->format = *v4l2_subdev_get_pad_format(sd, state, fmt->pad);
765 +static int imx296_set_format(struct v4l2_subdev *sd,
766 + struct v4l2_subdev_state *state,
767 + struct v4l2_subdev_format *fmt)
769 + struct imx296 *sensor = to_imx296(sd);
770 + struct v4l2_mbus_framefmt *format;
771 + struct v4l2_rect *crop;
773 + crop = v4l2_subdev_get_pad_crop(sd, state, fmt->pad);
774 + format = v4l2_subdev_get_pad_format(sd, state, fmt->pad);
777 + * Binning is only allowed when cropping is disabled according to the
778 + * documentation. This should be double-checked.
780 + if (crop->width == IMX296_PIXEL_ARRAY_WIDTH &&
781 + crop->height == IMX296_PIXEL_ARRAY_HEIGHT) {
782 + unsigned int width;
783 + unsigned int height;
784 + unsigned int hratio;
785 + unsigned int vratio;
787 + /* Clamp the width and height to avoid dividing by zero. */
788 + width = clamp_t(unsigned int, fmt->format.width,
789 + crop->width / 2, crop->width);
790 + height = clamp_t(unsigned int, fmt->format.height,
791 + crop->height / 2, crop->height);
793 + hratio = DIV_ROUND_CLOSEST(crop->width, width);
794 + vratio = DIV_ROUND_CLOSEST(crop->height, height);
796 + format->width = crop->width / hratio;
797 + format->height = crop->height / vratio;
799 + format->width = crop->width;
800 + format->height = crop->height;
803 + format->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
804 + : MEDIA_BUS_FMT_SBGGR10_1X10;
805 + format->field = V4L2_FIELD_NONE;
806 + format->colorspace = V4L2_COLORSPACE_RAW;
807 + format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
808 + format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
809 + format->xfer_func = V4L2_XFER_FUNC_NONE;
811 + fmt->format = *format;
816 +static int imx296_get_selection(struct v4l2_subdev *sd,
817 + struct v4l2_subdev_state *state,
818 + struct v4l2_subdev_selection *sel)
820 + switch (sel->target) {
821 + case V4L2_SEL_TGT_CROP:
822 + sel->r = *v4l2_subdev_get_pad_crop(sd, state, sel->pad);
825 + case V4L2_SEL_TGT_CROP_DEFAULT:
826 + case V4L2_SEL_TGT_CROP_BOUNDS:
827 + case V4L2_SEL_TGT_NATIVE_SIZE:
830 + sel->r.width = IMX296_PIXEL_ARRAY_WIDTH;
831 + sel->r.height = IMX296_PIXEL_ARRAY_HEIGHT;
841 +static int imx296_set_selection(struct v4l2_subdev *sd,
842 + struct v4l2_subdev_state *state,
843 + struct v4l2_subdev_selection *sel)
845 + struct v4l2_mbus_framefmt *format;
846 + struct v4l2_rect *crop;
847 + struct v4l2_rect rect;
849 + if (sel->target != V4L2_SEL_TGT_CROP)
853 + * Clamp the crop rectangle boundaries and align them to a multiple of 4
854 + * pixels to satisfy hardware requirements.
856 + rect.left = clamp(ALIGN(sel->r.left, 4), 0,
857 + IMX296_PIXEL_ARRAY_WIDTH - IMX296_FID0_ROIWH1_MIN);
858 + rect.top = clamp(ALIGN(sel->r.top, 4), 0,
859 + IMX296_PIXEL_ARRAY_HEIGHT - IMX296_FID0_ROIWV1_MIN);
860 + rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 4),
861 + IMX296_FID0_ROIWH1_MIN, IMX296_PIXEL_ARRAY_WIDTH);
862 + rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 4),
863 + IMX296_FID0_ROIWV1_MIN, IMX296_PIXEL_ARRAY_HEIGHT);
865 + rect.width = min_t(unsigned int, rect.width,
866 + IMX296_PIXEL_ARRAY_WIDTH - rect.left);
867 + rect.height = min_t(unsigned int, rect.height,
868 + IMX296_PIXEL_ARRAY_HEIGHT - rect.top);
870 + crop = v4l2_subdev_get_pad_crop(sd, state, sel->pad);
872 + if (rect.width != crop->width || rect.height != crop->height) {
874 + * Reset the output image size if the crop rectangle size has
877 + format = v4l2_subdev_get_pad_format(sd, state, sel->pad);
878 + format->width = rect.width;
879 + format->height = rect.height;
888 +static int imx296_init_cfg(struct v4l2_subdev *sd,
889 + struct v4l2_subdev_state *state)
891 + struct v4l2_subdev_selection sel = {
892 + .target = V4L2_SEL_TGT_CROP,
893 + .r.width = IMX296_PIXEL_ARRAY_WIDTH,
894 + .r.height = IMX296_PIXEL_ARRAY_HEIGHT,
896 + struct v4l2_subdev_format format = {
898 + .width = IMX296_PIXEL_ARRAY_WIDTH,
899 + .height = IMX296_PIXEL_ARRAY_HEIGHT,
903 + imx296_set_selection(sd, state, &sel);
904 + imx296_set_format(sd, state, &format);
909 +static const struct v4l2_subdev_video_ops imx296_subdev_video_ops = {
910 + .s_stream = imx296_s_stream,
913 +static const struct v4l2_subdev_pad_ops imx296_subdev_pad_ops = {
914 + .enum_mbus_code = imx296_enum_mbus_code,
915 + .enum_frame_size = imx296_enum_frame_size,
916 + .get_fmt = imx296_get_format,
917 + .set_fmt = imx296_set_format,
918 + .get_selection = imx296_get_selection,
919 + .set_selection = imx296_set_selection,
920 + .init_cfg = imx296_init_cfg,
923 +static const struct v4l2_subdev_ops imx296_subdev_ops = {
924 + .video = &imx296_subdev_video_ops,
925 + .pad = &imx296_subdev_pad_ops,
928 +static int imx296_subdev_init(struct imx296 *sensor)
930 + struct i2c_client *client = to_i2c_client(sensor->dev);
933 + v4l2_i2c_subdev_init(&sensor->subdev, client, &imx296_subdev_ops);
935 + ret = imx296_ctrls_init(sensor);
939 + sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
940 + sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
941 + sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
942 + ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
944 + v4l2_ctrl_handler_free(&sensor->ctrls);
948 + sensor->subdev.state_lock = sensor->subdev.ctrl_handler->lock;
950 + v4l2_subdev_init_finalize(&sensor->subdev);
955 +static void imx296_subdev_cleanup(struct imx296 *sensor)
957 + media_entity_cleanup(&sensor->subdev.entity);
958 + v4l2_ctrl_handler_free(&sensor->ctrls);
961 +/* -----------------------------------------------------------------------------
965 +static int __maybe_unused imx296_runtime_resume(struct device *dev)
967 + struct i2c_client *client = to_i2c_client(dev);
968 + struct v4l2_subdev *subdev = i2c_get_clientdata(client);
969 + struct imx296 *sensor = to_imx296(subdev);
971 + return imx296_power_on(sensor);
974 +static int __maybe_unused imx296_runtime_suspend(struct device *dev)
976 + struct i2c_client *client = to_i2c_client(dev);
977 + struct v4l2_subdev *subdev = i2c_get_clientdata(client);
978 + struct imx296 *sensor = to_imx296(subdev);
980 + imx296_power_off(sensor);
985 +static const struct dev_pm_ops imx296_pm_ops = {
986 + SET_RUNTIME_PM_OPS(imx296_runtime_suspend, imx296_runtime_resume, NULL)
989 +/* -----------------------------------------------------------------------------
993 +static int imx296_read_temperature(struct imx296 *sensor, int *temp)
998 + ret = imx296_write(sensor, IMX296_TMDCTRL, IMX296_TMDCTRL_LATCH, NULL);
1002 + tmdout = imx296_read(sensor, IMX296_TMDOUT) & IMX296_TMDOUT_MASK;
1006 + /* T(°C) = 246.312 - 0.304 * TMDOUT */;
1007 + *temp = 246312 - 304 * tmdout;
1009 + return imx296_write(sensor, IMX296_TMDCTRL, 0, NULL);
1012 +static int imx296_identify_model(struct imx296 *sensor)
1014 + unsigned int model;
1018 + model = (uintptr_t)of_device_get_match_data(sensor->dev);
1020 + dev_dbg(sensor->dev,
1021 + "sensor model auto-detection disabled, forcing 0x%04x\n",
1023 + sensor->mono = model & IMX296_SENSOR_INFO_MONO;
1028 + * While most registers can be read when the sensor is in standby, this
1029 + * is not the case of the sensor info register :-(
1031 + ret = imx296_write(sensor, IMX296_CTRL00, 0, NULL);
1033 + dev_err(sensor->dev,
1034 + "failed to get sensor out of standby (%d)\n", ret);
1038 + ret = imx296_read(sensor, IMX296_SENSOR_INFO);
1040 + dev_err(sensor->dev, "failed to read sensor information (%d)\n",
1045 + model = (ret >> 6) & 0x1ff;
1049 + sensor->mono = ret & IMX296_SENSOR_INFO_MONO;
1052 + * The IMX297 seems to share features with the IMX296, it may be
1053 + * possible to support it in the same driver.
1057 + dev_err(sensor->dev, "invalid device model 0x%04x\n", ret);
1062 + ret = imx296_read_temperature(sensor, &temp);
1066 + dev_info(sensor->dev, "found IMX%u%s (%u.%uC)\n", model,
1067 + sensor->mono ? "LL" : "LQ", temp / 1000, (temp / 100) % 10);
1070 + imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, NULL);
1074 +static const struct regmap_config imx296_regmap_config = {
1078 + .wr_table = &(const struct regmap_access_table) {
1079 + .no_ranges = (const struct regmap_range[]) {
1081 + .range_min = IMX296_SENSOR_INFO & 0xffff,
1082 + .range_max = (IMX296_SENSOR_INFO & 0xffff) + 1,
1089 +static int imx296_probe(struct i2c_client *client)
1091 + struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1092 + unsigned long clk_rate;
1093 + struct imx296 *sensor;
1097 + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1098 + dev_warn(&adapter->dev,
1099 + "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1103 + sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
1107 + sensor->dev = &client->dev;
1109 + /* Acquire resources. */
1110 + for (i = 0; i < ARRAY_SIZE(sensor->supplies); ++i)
1111 + sensor->supplies[i].supply = imx296_supply_names[i];
1113 + ret = devm_regulator_bulk_get(sensor->dev, ARRAY_SIZE(sensor->supplies),
1114 + sensor->supplies);
1116 + dev_err_probe(sensor->dev, ret, "failed to get supplies\n");
1120 + sensor->reset = devm_gpiod_get_optional(sensor->dev, "reset",
1122 + if (IS_ERR(sensor->reset))
1123 + return dev_err_probe(sensor->dev, PTR_ERR(sensor->reset),
1124 + "failed to get reset GPIO\n");
1126 + sensor->clk = devm_clk_get(sensor->dev, "inck");
1127 + if (IS_ERR(sensor->clk))
1128 + return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk),
1129 + "failed to get clock\n");
1131 + clk_rate = clk_get_rate(sensor->clk);
1132 + for (i = 0; i < ARRAY_SIZE(imx296_clk_params); ++i) {
1133 + if (clk_rate == imx296_clk_params[i].freq) {
1134 + sensor->clk_params = &imx296_clk_params[i];
1139 + if (!sensor->clk_params) {
1140 + dev_err(sensor->dev, "unsupported clock rate %lu\n", clk_rate);
1144 + sensor->regmap = devm_regmap_init_i2c(client, &imx296_regmap_config);
1145 + if (IS_ERR(sensor->regmap))
1146 + return PTR_ERR(sensor->regmap);
1149 + * Enable power management. The driver supports runtime PM, but needs to
1150 + * work when runtime PM is disabled in the kernel. To that end, power
1151 + * the sensor on manually here, identify it, and fully initialize it.
1153 + ret = imx296_power_on(sensor);
1157 + ret = imx296_identify_model(sensor);
1161 + /* Initialize the V4L2 subdev. */
1162 + ret = imx296_subdev_init(sensor);
1167 + * Enable runtime PM. As the device has been powered manually, mark it
1168 + * as active, and increase the usage count without resuming the device.
1170 + pm_runtime_set_active(sensor->dev);
1171 + pm_runtime_get_noresume(sensor->dev);
1172 + pm_runtime_enable(sensor->dev);
1174 + /* Register the V4L2 subdev. */
1175 + ret = v4l2_async_register_subdev(&sensor->subdev);
1180 + * Finally, enable autosuspend and decrease the usage count. The device
1181 + * will get suspended after the autosuspend delay, turning the power
1184 + pm_runtime_set_autosuspend_delay(sensor->dev, 1000);
1185 + pm_runtime_use_autosuspend(sensor->dev);
1186 + pm_runtime_put_autosuspend(sensor->dev);
1191 + pm_runtime_disable(sensor->dev);
1192 + pm_runtime_put_noidle(sensor->dev);
1193 + imx296_subdev_cleanup(sensor);
1195 + imx296_power_off(sensor);
1199 +static void imx296_remove(struct i2c_client *client)
1201 + struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1202 + struct imx296 *sensor = to_imx296(subdev);
1204 + v4l2_async_unregister_subdev(subdev);
1206 + imx296_subdev_cleanup(sensor);
1209 + * Disable runtime PM. In case runtime PM is disabled in the kernel,
1210 + * make sure to turn power off manually.
1212 + pm_runtime_disable(sensor->dev);
1213 + if (!pm_runtime_status_suspended(sensor->dev))
1214 + imx296_power_off(sensor);
1215 + pm_runtime_set_suspended(sensor->dev);
1218 +static const struct of_device_id imx296_of_match[] = {
1219 + { .compatible = "sony,imx296", .data = NULL },
1220 + { .compatible = "sony,imx296ll", .data = (void *)IMX296_SENSOR_INFO_IMX296LL },
1221 + { .compatible = "sony,imx296lq", .data = (void *)IMX296_SENSOR_INFO_IMX296LQ },
1222 + { /* sentinel */ },
1224 +MODULE_DEVICE_TABLE(of, imx296_of_match);
1226 +static struct i2c_driver imx296_i2c_driver = {
1228 + .of_match_table = imx296_of_match,
1230 + .pm = &imx296_pm_ops
1232 + .probe_new = imx296_probe,
1233 + .remove = imx296_remove,
1236 +module_i2c_driver(imx296_i2c_driver);
1238 +MODULE_DESCRIPTION("Sony IMX296 Camera driver");
1239 +MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1240 +MODULE_LICENSE("GPL");