1 From 4ebd8283403daf5507e5aafb42fe3e4c7612eb14 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Wed, 22 Mar 2023 09:51:51 +0100
4 Subject: [PATCH] drm/vc4: hvs: More logging for dlist generation
6 DLIST generation can get pretty tricky and there's not a lot of debug in
7 the driver to help. Let's add a few more to track the generated DLIST
10 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
12 drivers/gpu/drm/vc4/vc4_hvs.c | 15 +++++++++++++--
13 1 file changed, 13 insertions(+), 2 deletions(-)
15 --- a/drivers/gpu/drm/vc4/vc4_hvs.c
16 +++ b/drivers/gpu/drm/vc4/vc4_hvs.c
17 @@ -826,11 +826,22 @@ int vc4_hvs_atomic_check(struct drm_crtc
18 if (hweight32(crtc_state->connector_mask) > 1)
21 - drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state)
22 - dlist_count += vc4_plane_dlist_size(plane_state);
23 + drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
24 + u32 plane_dlist_count = vc4_plane_dlist_size(plane_state);
26 + drm_dbg_driver(dev, "[CRTC:%d:%s] Found [PLANE:%d:%s] with DLIST size: %u\n",
27 + crtc->base.id, crtc->name,
28 + plane->base.id, plane->name,
31 + dlist_count += plane_dlist_count;
34 dlist_count++; /* Account for SCALER_CTL0_END. */
36 + drm_dbg_driver(dev, "[CRTC:%d:%s] Allocating DLIST block with size: %u\n",
37 + crtc->base.id, crtc->name, dlist_count);
39 alloc = vc4_hvs_alloc_dlist_entry(vc4->hvs, vc4_state->assigned_channel, dlist_count);
41 return PTR_ERR(alloc);