1 bcm53xx: initial support for the BCM5301/BCM470X SoC
4 This patch adds support for the BCM5301/BCM470X SoCs with an ARM CPU.
5 Currently just booting to a shell is working and nothing else, no
6 Ethernet, wifi, flash, ...
8 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
10 arch/arm/Kconfig | 2 +
11 arch/arm/Kconfig.debug | 5 ++
12 arch/arm/Makefile | 1 +
13 arch/arm/boot/dts/Makefile | 1 +
14 arch/arm/boot/dts/bcm5301-netgear-r6250.dts | 20 +++++++
15 arch/arm/boot/dts/bcm5301.dtsi | 83 +++++++++++++++++++++++++++
16 arch/arm/include/debug/bcm53xx.S | 19 ++++++
17 arch/arm/mach-bcm53xx/Kconfig | 15 +++++
18 arch/arm/mach-bcm53xx/Makefile | 1 +
19 arch/arm/mach-bcm53xx/bcm53xx.c | 69 ++++++++++++++++++++++
20 10 files changed, 216 insertions(+)
21 create mode 100644 arch/arm/boot/dts/bcm5301-netgear-r6250.dts
22 create mode 100644 arch/arm/boot/dts/bcm5301.dtsi
23 create mode 100644 arch/arm/include/debug/bcm53xx.S
24 create mode 100644 arch/arm/mach-bcm53xx/Kconfig
25 create mode 100644 arch/arm/mach-bcm53xx/Makefile
26 create mode 100644 arch/arm/mach-bcm53xx/bcm53xx.c
28 --- a/arch/arm/Kconfig
29 +++ b/arch/arm/Kconfig
30 @@ -922,6 +922,8 @@ source "arch/arm/mach-bcm/Kconfig"
32 source "arch/arm/mach-bcm2835/Kconfig"
34 +source "arch/arm/mach-bcm53xx/Kconfig"
36 source "arch/arm/mach-clps711x/Kconfig"
38 source "arch/arm/mach-cns3xxx/Kconfig"
39 --- a/arch/arm/Kconfig.debug
40 +++ b/arch/arm/Kconfig.debug
41 @@ -93,6 +93,10 @@ choice
42 bool "Kernel low-level debugging on BCM2835 PL011 UART"
43 depends on ARCH_BCM2835
45 + config DEBUG_BCM_5301X
46 + bool "Kernel low-level debugging on BCM53XX UART1"
47 + depends on ARCH_BCM_5301X
49 config DEBUG_CLPS711X_UART1
50 bool "Kernel low-level debugging messages via UART1"
51 depends on ARCH_CLPS711X
52 @@ -620,6 +624,7 @@ endchoice
53 config DEBUG_LL_INCLUDE
55 default "debug/bcm2835.S" if DEBUG_BCM2835
56 + default "debug/bcm53xx.S" if DEBUG_BCM_5301X
57 default "debug/cns3xxx.S" if DEBUG_CNS3XXX
58 default "debug/exynos.S" if DEBUG_EXYNOS_UART
59 default "debug/highbank.S" if DEBUG_HIGHBANK_UART
60 --- a/arch/arm/Makefile
61 +++ b/arch/arm/Makefile
62 @@ -145,6 +145,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020
63 machine-$(CONFIG_ARCH_AT91) += at91
64 machine-$(CONFIG_ARCH_BCM) += bcm
65 machine-$(CONFIG_ARCH_BCM2835) += bcm2835
66 +machine-$(CONFIG_ARCH_BCM_5301X) += bcm53xx
67 machine-$(CONFIG_ARCH_CLPS711X) += clps711x
68 machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
69 machine-$(CONFIG_ARCH_DAVINCI) += davinci
70 --- a/arch/arm/boot/dts/Makefile
71 +++ b/arch/arm/boot/dts/Makefile
72 @@ -209,6 +209,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07
75 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
76 +dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
81 +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
84 + * Broadcom BCM470X / BCM5301X arm platform code.
85 + * DTS for Netgear R6250 V1
87 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
89 + * Licensed under the GNU/GPL. See COPYING for details.
94 +#include "bcm4708.dtsi"
97 + compatible = "netgear,r6250v1", "brcm,bcm4708";
98 + model = "Netgear R6250 V1 (BCM4708)";
101 + bootargs = "console=ttyS0,115200";
105 + reg = <0x00000000 0x08000000>;
109 + uart0: serial@0300 {
113 + uart1: serial@0400 {
119 +++ b/arch/arm/boot/dts/bcm4708.dtsi
122 + * Broadcom BCM470X / BCM5301X ARM platform code.
123 + * DTS for BCM4708 SoC.
125 + * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
127 + * Licensed under the GNU/GPL. See COPYING for details.
130 +#include "bcm5301x.dtsi"
133 + compatible = "brcm,bcm4708";
136 + #address-cells = <1>;
140 + device_type = "cpu";
141 + compatible = "arm,cortex-a9";
142 + next-level-cache = <&L2>;
147 + device_type = "cpu";
148 + compatible = "arm,cortex-a9";
149 + next-level-cache = <&L2>;
156 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
159 + * Broadcom BCM470X / BCM5301X ARM platform code.
160 + * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
161 + * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
163 + * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
165 + * Licensed under the GNU/GPL. See COPYING for details.
168 +#include <dt-bindings/interrupt-controller/irq.h>
169 +#include <dt-bindings/interrupt-controller/arm-gic.h>
170 +#include "skeleton.dtsi"
173 + interrupt-parent = <&gic>;
176 + compatible = "simple-bus";
177 + ranges = <0x00000000 0x18000000 0x00001000>;
178 + #address-cells = <1>;
181 + uart0: serial@0300 {
182 + compatible = "ns16550";
183 + reg = <0x0300 0x100>;
184 + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
185 + clock-frequency = <100000000>;
186 + status = "disabled";
189 + uart1: serial@0400 {
190 + compatible = "ns16550";
191 + reg = <0x0400 0x100>;
192 + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
193 + clock-frequency = <100000000>;
194 + status = "disabled";
199 + compatible = "simple-bus";
200 + ranges = <0x00000000 0x19020000 0x00003000>;
201 + #address-cells = <1>;
205 + compatible = "arm,cortex-a9-scu";
206 + reg = <0x0000 0x100>;
210 + compatible = "arm,cortex-a9-global-timer";
211 + reg = <0x0200 0x100>;
212 + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
213 + clocks = <&clk_periph>;
217 + compatible = "arm,cortex-a9-twd-timer";
218 + reg = <0x0600 0x100>;
219 + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
220 + clocks = <&clk_periph>;
223 + gic: interrupt-controller@1000 {
224 + compatible = "arm,cortex-a9-gic";
225 + #interrupt-cells = <3>;
226 + #address-cells = <0>;
227 + interrupt-controller;
228 + reg = <0x1000 0x1000>,
232 + L2: cache-controller@2000 {
233 + compatible = "arm,pl310-cache";
234 + reg = <0x2000 0x1000>;
241 + #address-cells = <1>;
244 + /* As long as we do not have a real clock driver us this
246 + clk_periph: periph {
247 + compatible = "fixed-clock";
248 + #clock-cells = <0>;
249 + clock-frequency = <400000000>;
254 +++ b/arch/arm/include/debug/bcm53xx.S
257 + * Macros used for EARLY_PRINTK, in low-level UART debug console
259 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
261 + * Licensed under the GNU/GPL. See COPYING for details.
264 +#define BCM53XX_UART1_PHYS 0x18000300
265 +#define BCM53XX_UART1_VIRT 0xf1000300
266 +#define BCM53XX_UART1_SH 0
268 + .macro addruart, rp, rv, tmp
269 + ldr \rp, =BCM53XX_UART1_PHYS @ MMU off, Physical
270 + ldr \rv, =BCM53XX_UART1_VIRT @ MMU on, Virtual
273 +#define UART_SHIFT BCM53XX_UART1_SH
274 +#include <asm/hardware/debug-8250.S>
276 +++ b/arch/arm/mach-bcm53xx/Kconfig
278 +config ARCH_BCM_5301X
279 + bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
283 + select HAVE_ARM_SCU if SMP
284 + select HAVE_ARM_TWD if SMP
287 + select GENERIC_CLOCKEVENTS
288 + select ARM_GLOBAL_TIMER
289 + select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
290 + select MIGHT_HAVE_PCI
292 + Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
294 + This is a network SoC line mostly used in home routers and
295 + wifi access points.
296 + This inclused the following SoC: BCM53010, BCM53011, BCM53012,
297 + BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
298 + BCM4708 and BCM4709.
300 + Do not confuse this with the BCM4760 which is a totally
301 + different SoC or with the older BCM47XX and BCM53XX based
302 + network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
304 +++ b/arch/arm/mach-bcm53xx/Makefile
308 +++ b/arch/arm/mach-bcm53xx/bcm53xx.c
311 + * Broadcom BCM470X / BCM5301X ARM platform code.
313 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
315 + * Licensed under the GNU/GPL. See COPYING for details.
317 +#include <linux/of_platform.h>
318 +#include <linux/clocksource.h>
319 +#include <linux/clk-provider.h>
320 +#include <asm/hardware/cache-l2x0.h>
322 +#include <asm/mach/arch.h>
323 +#include <asm/siginfo.h>
324 +#include <asm/signal.h>
327 +static bool first_fault = true;
329 +static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
330 + struct pt_regs *regs)
332 + if (fsr == 0x1c06 && first_fault) {
333 + first_fault = false;
336 + * These faults with code 0x1c06 happens for no good reason,
337 + * possibly left over from the CFE boot loader.
339 + pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
342 + /* Returning non-zero causes fault display and panic */
346 + /* Others should cause a fault */
350 +static void __init bcm5301x_init_early(void)
352 + /* Install our hook */
353 + hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
354 + "imprecise external abort");
357 +static void __init bcm5301x_timer_init(void)
360 + clocksource_of_init();
363 +static void __init bcm5301x_dt_init(void)
365 + l2x0_of_init(0, ~0UL);
366 + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
369 +static const char __initconst *bcm5301x_dt_compat[] = {
374 +DT_MACHINE_START(BCM5301X, "BCM5301X")
375 + .init_early = bcm5301x_init_early,
376 + .init_time = bcm5301x_timer_init,
377 + .init_machine = bcm5301x_dt_init,
378 + .dt_compat = bcm5301x_dt_compat,