1 From dec378827c4aaab6c46ecdd5fc2c3b3155d68743 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Wed, 24 Sep 2014 23:50:07 +0200
4 Subject: [PATCH] ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
6 IRQ support for Broadcom's bus-axi driver bcma was merged into John
7 Linville's wireless tree and will show up in 3.19. This patch makes use
8 of this feature in the DTS file for the the BCM5301X SoCs. I left the
9 PCIe controller out, because this still needs some discussion.
11 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
13 arch/arm/boot/dts/bcm5301x.dtsi | 34 ++++++++++++++++++++++++++++++++++
14 1 file changed, 34 insertions(+)
16 --- a/arch/arm/boot/dts/bcm5301x.dtsi
17 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
22 + #interrupt-cells = <1>;
23 + interrupt-map-mask = <0x000fffff 0xffff>;
26 + <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
28 + /* USB 2.0 Controller */
29 + <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
31 + /* USB 3.0 Controller */
32 + <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
34 + /* Ethernet Controller 0 */
35 + <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 + /* Ethernet Controller 1 */
38 + <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
40 + /* Ethernet Controller 2 */
41 + <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
43 + /* Ethernet Controller 3 */
44 + <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
46 + /* NAND Controller */
47 + <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
48 + <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
49 + <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
50 + <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
51 + <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
52 + <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
53 + <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
54 + <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
56 chipcommon: chipcommon@0 {
57 reg = <0x00000000 0x1000>;