target/linux/bcm53xx/patches-4.14/131-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch

   1 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   2 Date: Fri, 9 Nov 2018 09:53:56 +0100
   3 Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 This describes hardware & will allow referencing pin functions. The
   9 first usage is UART1 which allows supporting devices using it.
  10
  11 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  12 ---
  13
  14 --- a/arch/arm/boot/dts/bcm5301x.dtsi
  15 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
  16 @@ -37,6 +37,8 @@
  17                         reg = <0x0400 0x100>;
  18                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  19                         clocks = <&iprocslow>;
  20 +                       pinctrl-names = "default";
  21 +                       pinctrl-0 = <&pinmux_uart1>;
  22                         status = "disabled";
  23                 };
  24         };
  25 @@ -391,6 +393,48 @@
  26                 status = "disabled";
  27         };
  28
  29 +       dmu@1800c000 {
  30 +               compatible = "simple-bus";
  31 +               ranges = <0 0x1800c000 0x1000>;
  32 +               #address-cells = <1>;
  33 +               #size-cells = <1>;
  34 +
  35 +               cru@100 {
  36 +                       compatible = "simple-bus";
  37 +                       reg = <0x100 0x1a4>;
  38 +                       ranges;
  39 +                       #address-cells = <1>;
  40 +                       #size-cells = <1>;
  41 +
  42 +                       pin-controller@1c0 {
  43 +                               compatible = "brcm,bcm4708-pinmux";
  44 +                               reg = <0x1c0 0x24>;
  45 +                               reg-names = "cru_gpio_control";
  46 +
  47 +                               spi-pins {
  48 +                                       groups = "spi_grp";
  49 +                                       function = "spi";
  50 +                               };
  51 +
  52 +                               i2c {
  53 +                                       groups = "i2c_grp";
  54 +                                       function = "i2c";
  55 +                               };
  56 +
  57 +                               pwm {
  58 +                                       groups = "pwm0_grp", "pwm1_grp",
  59 +                                                "pwm2_grp", "pwm3_grp";
  60 +                                       function = "pwm";
  61 +                               };
  62 +
  63 +                               pinmux_uart1: uart1 {
  64 +                                       groups = "uart1_grp";
  65 +                                       function = "uart1";
  66 +                               };
  67 +                       };
  68 +               };
  69 +       };
  70 +
  71         lcpll0: lcpll0@1800c100 {
  72                 #clock-cells = <1>;
  73                 compatible = "brcm,nsp-lcpll0";