bcm63xx: move dts-v1 statement to top-level DTSI files
[openwrt/staging/dedeckeh.git] / target / linux / bcm63xx / dts / bcm6368.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "brcm,bcm6368";
7
8 aliases {
9 nflash = &nflash;
10 pflash = &pflash;
11 pinctrl = &pinctrl;
12 serial0 = &uart0;
13 serial1 = &uart1;
14 spi0 = &lsspi;
15 };
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 cpu@0 {
22 compatible = "brcm,bmips4350", "mips,mips4Kc";
23 device_type = "cpu";
24 reg = <0>;
25 };
26
27 cpu@1 {
28 compatible = "brcm,bmips4350", "mips,mips4Kc";
29 device_type = "cpu";
30 reg = <1>;
31 };
32 };
33
34 cpu_intc: interrupt-controller {
35 #address-cells = <0>;
36 compatible = "mti,cpu-interrupt-controller";
37
38 interrupt-controller;
39 #interrupt-cells = <1>;
40 };
41
42 memory { device_type = "memory"; reg = <0 0>; };
43
44 ubus@10000000 {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48 compatible = "simple-bus";
49 interrupt-parent = <&periph_intc>;
50
51 ext_intc0: interrupt-controller@10000018 {
52 compatible = "brcm,bcm6345-ext-intc";
53 reg = <0x10000018 0x4>;
54
55 interrupt-controller;
56 #interrupt-cells = <2>;
57
58 interrupts = <20>, <21>, <22>, <23>;
59 };
60
61 ext_intc1: interrupt-controller@1000001c {
62 compatible = "brcm,bcm6345-ext-intc";
63 reg = <0x1000001c 0x4>;
64
65 interrupt-controller;
66 #interrupt-cells = <2>;
67
68 interrupts = <24>, <25>;
69 };
70
71 periph_intc: interrupt-controller@10000020 {
72 compatible = "brcm,bcm6345-l1-intc";
73 reg = <0x10000020 0x10>,
74 <0x10000030 0x10>;
75
76 interrupt-controller;
77 #interrupt-cells = <1>;
78
79 interrupt-parent = <&cpu_intc>;
80 interrupts = <2>, <3>;
81 };
82
83 pinctrl: pin-controller@10000080 {
84 compatible = "brcm,bcm6368-pinctrl";
85 reg = <0x10000080 0x8>,
86 <0x10000088 0x8>,
87 <0x10000098 0x4>;
88 reg-names = "dirout", "dat", "mode";
89 brcm,gpiobasemode = <&gpiobasemode>;
90
91 gpio-controller;
92 #gpio-cells = <2>;
93
94 interrupts-extended = <&ext_intc1 0 0>,
95 <&ext_intc1 1 0>,
96 <&ext_intc0 0 0>,
97 <&ext_intc0 1 0>,
98 <&ext_intc0 2 0>,
99 <&ext_intc0 3 0>;
100 interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
101 "gpio36", "gpio37";
102
103 pinctrl_analog_afe_0: analog_afe_0 {
104 function = "analog_afe_0";
105 pins = "gpio0";
106 };
107
108 pinctrl_analog_afe_1: analog_afe_1 {
109 function = "analog_afe_1";
110 pins = "gpio1";
111 };
112
113 pinctrl_sys_irq: sys_irq {
114 function = "sys_irq";
115 pins = "gpio2";
116 };
117
118 pinctrl_serial_led: serial_led {
119 pinctrl_serial_led_data: serial_led_data {
120 function = "serial_led_data";
121 pins = "gpio3";
122 };
123
124 pinctrl_serial_led_clk: serial_led_clk {
125 function = "serial_led_clk";
126 pins = "gpio4";
127 };
128 };
129
130 pinctrl_inet_led: inet_led {
131 function = "inet_led";
132 pins = "gpio5";
133 };
134
135 pinctrl_ephy0_led: ephy0_led {
136 function = "ephy0_led";
137 pins = "gpio6";
138 };
139
140 pinctrl_ephy1_led: ephy1_led {
141 function = "ephy1_led";
142 pins = "gpio7";
143 };
144
145 pinctrl_ephy2_led: ephy2_led {
146 function = "ephy2_led";
147 pins = "gpio8";
148 };
149
150 pinctrl_ephy3_led: ephy3_led {
151 function = "ephy3_led";
152 pins = "gpio9";
153 };
154
155 pinctrl_robosw_led_data: robosw_led_data {
156 function = "robosw_led_data";
157 pins = "gpio10";
158 };
159
160 pinctrl_robosw_led_clk: robosw_led_clk {
161 function = "robosw_led_clk";
162 pins = "gpio11";
163 };
164
165 pinctrl_robosw_led0: robosw_led0 {
166 function = "robosw_led0";
167 pins = "gpio12";
168 };
169
170 pinctrl_robosw_led1: robosw_led1 {
171 function = "robosw_led1";
172 pins = "gpio13";
173 };
174
175 pinctrl_usb_device_led: usb_device_led {
176 function = "usb_device_led";
177 pins = "gpio14";
178 };
179
180 pinctrl_pci: pci {
181 pinctrl_pci_req1: pci_req1 {
182 function = "pci_req1";
183 pins = "gpio16";
184 };
185
186 pinctrl_pci_gnt1: pci_gnt1 {
187 function = "pci_gnt1";
188 pins = "gpio17";
189 };
190
191 pinctrl_pci_intb: pci_intb {
192 function = "pci_intb";
193 pins = "gpio18";
194 };
195
196 pinctrl_pci_req0: pci_req0 {
197 function = "pci_req0";
198 pins = "gpio19";
199 };
200
201 pinctrl_pci_gnt0: pci_gnt0 {
202 function = "pci_gnt0";
203 pins = "gpio20";
204 };
205 };
206
207 pinctrl_pcmcia: pcmcia {
208 pinctrl_pcmcia_cd1: pcmcia_cd1 {
209 function = "pcmcia_cd1";
210 pins = "gpio22";
211 };
212
213 pinctrl_pcmcia_cd2: pcmcia_cd2 {
214 function = "pcmcia_cd2";
215 pins = "gpio23";
216 };
217
218 pinctrl_pcmcia_vs1: pcmcia_vs1 {
219 function = "pcmcia_vs1";
220 pins = "gpio24";
221 };
222
223 pinctrl_pcmcia_vs2: pcmcia_vs2 {
224 function = "pcmcia_vs2";
225 pins = "gpio25";
226 };
227 };
228
229 pinctrl_ebi_cs2: ebi_cs2 {
230 function = "ebi_cs2";
231 pins = "gpio26";
232 };
233
234 pinctrl_ebi_cs3: ebi_cs3 {
235 function = "ebi_cs2";
236 pins = "gpio27";
237 };
238
239 pinctrl_spi_cs2: spi_cs2 {
240 function = "spi_cs2";
241 pins = "gpio28";
242 };
243
244 pinctrl_spi_cs3: spi_cs3 {
245 function = "spi_cs3";
246 pins = "gpio29";
247 };
248
249 pinctrl_spi_cs4: spi_cs4 {
250 function = "spi_cs4";
251 pins = "gpio30";
252 };
253
254 pinctrl_spi_cs5: spi_cs5 {
255 function = "spi_cs5";
256 pins = "gpio31";
257 };
258
259 pinctrl_uart1: uart1 {
260 function = "uart1";
261 group = "uart1_grp";
262 };
263 };
264
265 gpiobasemode: gpiobasemode@100000b8 {
266 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
267 reg = <0x100000b8 0x4>;
268 };
269
270 leds: led-controller@100000d0 {
271 #address-cells = <1>;
272 #size-cells = <0>;
273 compatible = "brcm,bcm6358-leds";
274 reg = <0x100000d0 0x8>;
275 status = "disabled";
276 };
277
278 uart0: serial@10000100 {
279 compatible = "brcm,bcm6345-uart";
280 reg = <0x10000100 0x18>;
281
282 interrupt-parent = <&periph_intc>;
283 interrupts = <2>;
284
285 /* clocks = <&periph_clk>; */
286 /* clock-names = "refclk"; */
287
288 status = "disabled";
289 };
290
291 uart1: serial@10000120 {
292 compatible = "brcm,bcm6345-uart";
293 reg = <0x10000120 0x18>;
294
295 interrupt-parent = <&periph_intc>;
296 interrupts = <3>;
297
298 /* clocks = <&periph_clk>; */
299 /* clock-names = "refclk"; */
300
301 status = "disabled";
302 };
303
304 nflash: nand@10000200 {
305 #address-cells = <1>;
306 #size-cells = <0>;
307 compatible = "brcm,nand-bcm6368",
308 "brcm,brcmnand-v2.1",
309 "brcm,brcmnand";
310 reg = <0x10000200 0x180>,
311 <0x10000600 0x200>,
312 <0x10000070 0x10>;
313 reg-names = "nand",
314 "nand-cache",
315 "nand-int-base";
316
317 interrupt-parent = <&periph_intc>;
318 interrupts = <10>;
319
320 /* clocks = <&clkctl 17>; */
321
322 status = "disabled";
323 };
324
325 lsspi: spi@10000800 {
326 #address-cells = <1>;
327 #size-cells = <0>;
328 compatible = "brcm,bcm6358-spi";
329 reg = <0x10000800 0x70c>;
330 interrupts = <1>;
331 /* clocks = <&clkctl 9>; */
332 };
333 };
334
335 pflash: nor@18000000 {
336 compatible = "cfi-flash";
337 reg = <0x18000000 0x2000000>;
338 bank-width = <2>;
339 #address-cells = <1>;
340 #size-cells = <1>;
341 status = "disabled";
342 };
343 };