1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/reset/bcm6318-reset.h>
12 #include <dt-bindings/soc/bcm6318-pm.h>
17 compatible = "brcm,bcm6318";
26 bootargs = "earlycon";
27 stdout-path = "serial0:115200n8";
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
40 hsspi_osc: hsspi-osc {
41 compatible = "fixed-clock";
45 clock-frequency = <250000000>;
46 clock-output-names = "hsspi_osc";
53 mips-hpt-frequency = <166500000>;
56 compatible = "brcm,bmips3300", "mips,mips4Kc";
62 cpu_intc: interrupt-controller {
64 compatible = "mti,cpu-interrupt-controller";
67 #interrupt-cells = <1>;
71 device_type = "memory";
79 compatible = "simple-bus";
82 periph_clk: clock-controller@10000004 {
83 compatible = "brcm,bcm6318-clocks";
84 reg = <0x10000004 0x4>;
88 ubus_clk: clock-controller@10000008 {
89 compatible = "brcm,bcm6318-ubus-clocks";
90 reg = <0x10000008 0x4>;
94 periph_rst: reset-controller@10000010 {
95 compatible = "brcm,bcm6345-reset";
96 reg = <0x10000010 0x4>;
100 ext_intc: interrupt-controller@10000018 {
101 #address-cells = <1>;
102 compatible = "brcm,bcm6318-ext-intc";
103 reg = <0x10000018 0x4>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
108 interrupt-parent = <&periph_intc>;
109 interrupts = <BCM6318_IRQ_EXT0>,
115 periph_intc: interrupt-controller@10000020 {
116 #address-cells = <1>;
117 compatible = "brcm,bcm6345-l1-intc";
118 reg = <0x10000020 0x20>;
120 interrupt-controller;
121 #interrupt-cells = <1>;
123 interrupt-parent = <&cpu_intc>;
124 interrupts = <2>, <3>;
127 wdt: watchdog@10000068 {
128 compatible = "brcm,bcm7038-wdt";
129 reg = <0x10000068 0xc>;
131 clocks = <&periph_osc>;
136 pll_cntl: syscon@10000074 {
137 compatible = "syscon", "simple-mfd";
138 reg = <0x10000074 0x4>;
142 compatible = "syscon-reboot";
148 gpio_cntl: syscon@10000080 {
149 #address-cells = <1>;
151 compatible = "brcm,bcm6318-gpio-sysctl",
152 "syscon", "simple-mfd";
153 reg = <0x10000080 0x80>;
154 ranges = <0 0x10000080 0x80>;
158 compatible = "brcm,bcm6318-gpio";
159 reg-names = "dirout", "dat";
160 reg = <0x0 0x8>, <0x8 0x8>;
163 gpio-ranges = <&pinctrl 0 0 50>;
167 pinctrl: pinctrl@18 {
168 compatible = "brcm,bcm6318-pinctrl";
169 reg = <0x18 0x10>, <0x54 0x18>;
171 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
172 function = "ephy0_spd_led";
176 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
177 function = "ephy1_spd_led";
181 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
182 function = "ephy2_spd_led";
186 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
187 function = "ephy3_spd_led";
191 pinctrl_ephy0_act_led: ephy0_act_led-pins {
192 function = "ephy0_act_led";
196 pinctrl_ephy1_act_led: ephy1_act_led-pins {
197 function = "ephy1_act_led";
201 pinctrl_ephy2_act_led: ephy2_act_led-pins {
202 function = "ephy2_act_led";
206 pinctrl_ephy3_act_led: ephy3_act_led-pins {
207 function = "ephy3_act_led";
211 pinctrl_serial_led: serial_led-pins {
212 pinctrl_serial_led_data: serial_led_data-pins {
213 function = "serial_led_data";
217 pinctrl_serial_led_clk: serial_led_clk-pins {
218 function = "serial_led_clk";
223 pinctrl_inet_act_led: inet_act_led-pins {
224 function = "inet_act_led";
228 pinctrl_inet_fail_led: inet_fail_led-pins {
229 function = "inet_fail_led";
233 pinctrl_dsl_led: dsl_led-pins {
234 function = "dsl_led";
238 pinctrl_post_fail_led: post_fail_led-pins {
239 function = "post_fail_led";
243 pinctrl_wlan_wps_led: wlan_wps_led-pins {
244 function = "wlan_wps_led";
248 pinctrl_usb_pwron: usb_pwron-pins {
249 function = "usb_pwron";
253 pinctrl_usb_device_led: usb_device_led-pins {
254 function = "usb_device_led";
258 pinctrl_usb_active: usb_active-pins {
259 function = "usb_active";
265 uart0: serial@10000100 {
266 compatible = "brcm,bcm6345-uart";
267 reg = <0x10000100 0x18>;
269 interrupt-parent = <&periph_intc>;
270 interrupts = <BCM6318_IRQ_UART0>;
272 clocks = <&periph_osc>;
273 clock-names = "periph";
278 leds: led-controller@10000200 {
279 #address-cells = <1>;
281 compatible = "brcm,bcm6328-leds";
282 reg = <0x10000200 0x24>;
287 periph_pwr: power-controller@100008e8 {
288 compatible = "brcm,bcm6318-power-controller";
289 reg = <0x100008e8 0x4>;
291 #power-domain-cells = <1>;
294 hsspi: spi@10003000 {
295 #address-cells = <1>;
297 compatible = "brcm,bcm6328-hsspi";
298 reg = <0x10003000 0x600>;
300 interrupt-parent = <&periph_intc>;
301 interrupts = <BCM6318_IRQ_HSSPI>;
303 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
305 clock-names = "hsspi",
308 resets = <&periph_rst BCM6318_RST_SPI>;
314 compatible = "brcm,bcm6318-ehci", "generic-ehci";
315 reg = <0x10005000 0x100>;
319 interrupt-parent = <&periph_intc>;
320 interrupts = <BCM6318_IRQ_EHCI>;
329 compatible = "brcm,bcm6318-ohci", "generic-ohci";
330 reg = <0x10005100 0x100>;
334 interrupt-parent = <&periph_intc>;
335 interrupts = <BCM6318_IRQ_OHCI>;
343 usbh: usb-phy@10005200 {
344 compatible = "brcm,bcm6318-usbh-phy";
345 reg = <0x10005200 0x38>;
349 clocks = <&periph_clk BCM6318_CLK_USBD>,
350 <&ubus_clk BCM6318_UCLK_USB>;
351 clock-names = "usbh",
354 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
355 resets = <&periph_rst BCM6318_RST_USBH>;
360 pcie: pcie@10010000 {
361 compatible = "brcm,bcm6318-pcie";
362 reg = <0x10010000 0x10000>;
363 #address-cells = <3>;
367 bus-range = <0x00 0x01>;
368 ranges = <0x2000000 0 0x10200000 0x10200000 0 0x100000>;
369 linux,pci-probe-only = <1>;
371 interrupt-parent = <&periph_intc>;
372 interrupts = <BCM6318_IRQ_PCIE_RC>;
374 clocks = <&periph_clk BCM6318_CLK_PCIE>,
375 <&periph_clk BCM6318_CLK_PCIE25>,
376 <&ubus_clk BCM6318_UCLK_PCIE>;
377 clock-names = "pcie",
381 resets = <&periph_rst BCM6318_RST_PCIE>,
382 <&periph_rst BCM6318_RST_PCIE_EXT>,
383 <&periph_rst BCM6318_RST_PCIE_CORE>,
384 <&periph_rst BCM6318_RST_PCIE_HARD>;
385 reset-names = "pcie",
390 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_PCIE>;
395 switch0: switch@10080000 {
396 #address-cells = <1>;
398 compatible = "brcm,bcm6318-switch";
399 reg = <0x10080000 0x8000>;
403 #address-cells = <1>;
409 phy-mode = "internal";
410 ethernet = <ðernet>;
420 mdio: mdio@100800b0 {
421 #address-cells = <1>;
423 compatible = "brcm,bcm6368-mdio-mux";
424 reg = <0x100800b0 0x8>;
427 #address-cells = <1>;
431 phy1: ethernet-phy@1 {
432 compatible = "ethernet-phy-ieee802.3-c22";
436 phy2: ethernet-phy@2 {
437 compatible = "ethernet-phy-ieee802.3-c22";
441 phy3: ethernet-phy@3 {
442 compatible = "ethernet-phy-ieee802.3-c22";
446 phy4: ethernet-phy@4 {
447 compatible = "ethernet-phy-ieee802.3-c22";
453 #address-cells = <1>;
459 ethernet: ethernet@10088000 {
460 compatible = "brcm,bcm6318-enetsw";
461 reg = <0x10088000 0x80>,
468 interrupt-parent = <&periph_intc>;
469 interrupts = <BCM6318_IRQ_ENETSW_RX_DMA0>,
470 <BCM6318_IRQ_ENETSW_TX_DMA0>;
471 interrupt-names = "rx",
474 clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
475 <&periph_clk BCM6318_CLK_ROBOSW025>,
476 <&ubus_clk BCM6318_UCLK_ROBOSW>;
478 resets = <&periph_rst BCM6318_RST_ENETSW>,
479 <&periph_rst BCM6318_RST_EPHY>;
481 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_EPHY0>,
482 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY1>,
483 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY2>,
484 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY3>;