bmips: dts: move leds dt-bindings include to SoCs
[openwrt/staging/nbd.git] / target / linux / bmips / dts / bcm6318.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/reset/bcm6318-reset.h>
12 #include <dt-bindings/soc/bcm6318-pm.h>
13
14 / {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "brcm,bcm6318";
18
19 aliases {
20 pinctrl = &pinctrl;
21 serial0 = &uart0;
22 spi1 = &hsspi;
23 };
24
25 chosen {
26 bootargs = "earlycon";
27 stdout-path = "serial0:115200n8";
28 };
29
30 clocks {
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
33
34 #clock-cells = <0>;
35
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
38 };
39
40 hsspi_osc: hsspi-osc {
41 compatible = "fixed-clock";
42
43 #clock-cells = <0>;
44
45 clock-frequency = <250000000>;
46 clock-output-names = "hsspi_osc";
47 };
48 };
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53 mips-hpt-frequency = <166500000>;
54
55 cpu@0 {
56 compatible = "brcm,bmips3300", "mips,mips4Kc";
57 device_type = "cpu";
58 reg = <0>;
59 };
60 };
61
62 cpu_intc: interrupt-controller {
63 #address-cells = <0>;
64 compatible = "mti,cpu-interrupt-controller";
65
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 };
69
70 memory@0 {
71 device_type = "memory";
72 reg = <0 0>;
73 };
74
75 ubus {
76 #address-cells = <1>;
77 #size-cells = <1>;
78
79 compatible = "simple-bus";
80 ranges;
81
82 periph_clk: clock-controller@10000004 {
83 compatible = "brcm,bcm6318-clocks";
84 reg = <0x10000004 0x4>;
85 #clock-cells = <1>;
86 };
87
88 ubus_clk: clock-controller@10000008 {
89 compatible = "brcm,bcm6318-ubus-clocks";
90 reg = <0x10000008 0x4>;
91 #clock-cells = <1>;
92 };
93
94 periph_rst: reset-controller@10000010 {
95 compatible = "brcm,bcm6345-reset";
96 reg = <0x10000010 0x4>;
97 #reset-cells = <1>;
98 };
99
100 ext_intc: interrupt-controller@10000018 {
101 #address-cells = <1>;
102 compatible = "brcm,bcm6318-ext-intc";
103 reg = <0x10000018 0x4>;
104
105 interrupt-controller;
106 #interrupt-cells = <2>;
107
108 interrupt-parent = <&periph_intc>;
109 interrupts = <BCM6318_IRQ_EXT0>,
110 <BCM6318_IRQ_EXT1>,
111 <BCM6318_IRQ_EXT2>,
112 <BCM6318_IRQ_EXT3>;
113 };
114
115 periph_intc: interrupt-controller@10000020 {
116 #address-cells = <1>;
117 compatible = "brcm,bcm6345-l1-intc";
118 reg = <0x10000020 0x20>;
119
120 interrupt-controller;
121 #interrupt-cells = <1>;
122
123 interrupt-parent = <&cpu_intc>;
124 interrupts = <2>, <3>;
125 };
126
127 wdt: watchdog@10000068 {
128 compatible = "brcm,bcm7038-wdt";
129 reg = <0x10000068 0xc>;
130
131 clocks = <&periph_osc>;
132
133 timeout-sec = <30>;
134 };
135
136 pll_cntl: syscon@10000074 {
137 compatible = "syscon", "simple-mfd";
138 reg = <0x10000074 0x4>;
139 native-endian;
140
141 syscon-reboot {
142 compatible = "syscon-reboot";
143 offset = <0>;
144 mask = <0x1>;
145 };
146 };
147
148 gpio_cntl: syscon@10000080 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 compatible = "brcm,bcm6318-gpio-sysctl",
152 "syscon", "simple-mfd";
153 reg = <0x10000080 0x80>;
154 ranges = <0 0x10000080 0x80>;
155 native-endian;
156
157 gpio: gpio@0 {
158 compatible = "brcm,bcm6318-gpio";
159 reg-names = "dirout", "dat";
160 reg = <0x0 0x8>, <0x8 0x8>;
161
162 gpio-controller;
163 gpio-ranges = <&pinctrl 0 0 50>;
164 #gpio-cells = <2>;
165 };
166
167 pinctrl: pinctrl@18 {
168 compatible = "brcm,bcm6318-pinctrl";
169 reg = <0x18 0x10>, <0x54 0x18>;
170
171 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
172 function = "ephy0_spd_led";
173 pins = "gpio0";
174 };
175
176 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
177 function = "ephy1_spd_led";
178 pins = "gpio1";
179 };
180
181 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
182 function = "ephy2_spd_led";
183 pins = "gpio2";
184 };
185
186 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
187 function = "ephy3_spd_led";
188 pins = "gpio3";
189 };
190
191 pinctrl_ephy0_act_led: ephy0_act_led-pins {
192 function = "ephy0_act_led";
193 pins = "gpio4";
194 };
195
196 pinctrl_ephy1_act_led: ephy1_act_led-pins {
197 function = "ephy1_act_led";
198 pins = "gpio5";
199 };
200
201 pinctrl_ephy2_act_led: ephy2_act_led-pins {
202 function = "ephy2_act_led";
203 pins = "gpio6";
204 };
205
206 pinctrl_ephy3_act_led: ephy3_act_led-pins {
207 function = "ephy3_act_led";
208 pins = "gpio7";
209 };
210
211 pinctrl_serial_led: serial_led-pins {
212 pinctrl_serial_led_data: serial_led_data-pins {
213 function = "serial_led_data";
214 pins = "gpio6";
215 };
216
217 pinctrl_serial_led_clk: serial_led_clk-pins {
218 function = "serial_led_clk";
219 pins = "gpio7";
220 };
221 };
222
223 pinctrl_inet_act_led: inet_act_led-pins {
224 function = "inet_act_led";
225 pins = "gpio8";
226 };
227
228 pinctrl_inet_fail_led: inet_fail_led-pins {
229 function = "inet_fail_led";
230 pins = "gpio9";
231 };
232
233 pinctrl_dsl_led: dsl_led-pins {
234 function = "dsl_led";
235 pins = "gpio10";
236 };
237
238 pinctrl_post_fail_led: post_fail_led-pins {
239 function = "post_fail_led";
240 pins = "gpio11";
241 };
242
243 pinctrl_wlan_wps_led: wlan_wps_led-pins {
244 function = "wlan_wps_led";
245 pins = "gpio12";
246 };
247
248 pinctrl_usb_pwron: usb_pwron-pins {
249 function = "usb_pwron";
250 pins = "gpio13";
251 };
252
253 pinctrl_usb_device_led: usb_device_led-pins {
254 function = "usb_device_led";
255 pins = "gpio13";
256 };
257
258 pinctrl_usb_active: usb_active-pins {
259 function = "usb_active";
260 pins = "gpio40";
261 };
262 };
263 };
264
265 uart0: serial@10000100 {
266 compatible = "brcm,bcm6345-uart";
267 reg = <0x10000100 0x18>;
268
269 interrupt-parent = <&periph_intc>;
270 interrupts = <BCM6318_IRQ_UART0>;
271
272 clocks = <&periph_osc>;
273 clock-names = "periph";
274
275 status = "disabled";
276 };
277
278 leds: led-controller@10000200 {
279 #address-cells = <1>;
280 #size-cells = <0>;
281 compatible = "brcm,bcm6328-leds";
282 reg = <0x10000200 0x24>;
283
284 status = "disabled";
285 };
286
287 periph_pwr: power-controller@100008e8 {
288 compatible = "brcm,bcm6318-power-controller";
289 reg = <0x100008e8 0x4>;
290
291 #power-domain-cells = <1>;
292 };
293
294 hsspi: spi@10003000 {
295 #address-cells = <1>;
296 #size-cells = <0>;
297 compatible = "brcm,bcm6328-hsspi";
298 reg = <0x10003000 0x600>;
299
300 interrupt-parent = <&periph_intc>;
301 interrupts = <BCM6318_IRQ_HSSPI>;
302
303 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
304 <&hsspi_osc>;
305 clock-names = "hsspi",
306 "pll";
307
308 resets = <&periph_rst BCM6318_RST_SPI>;
309
310 status = "disabled";
311 };
312
313 ehci: usb@10005000 {
314 compatible = "brcm,bcm6318-ehci", "generic-ehci";
315 reg = <0x10005000 0x100>;
316 big-endian;
317 spurious-oc;
318
319 interrupt-parent = <&periph_intc>;
320 interrupts = <BCM6318_IRQ_EHCI>;
321
322 phys = <&usbh 0>;
323 phy-names = "usb";
324
325 status = "disabled";
326 };
327
328 ohci: usb@10005100 {
329 compatible = "brcm,bcm6318-ohci", "generic-ohci";
330 reg = <0x10005100 0x100>;
331 big-endian;
332 no-big-frame-no;
333
334 interrupt-parent = <&periph_intc>;
335 interrupts = <BCM6318_IRQ_OHCI>;
336
337 phys = <&usbh 0>;
338 phy-names = "usb";
339
340 status = "disabled";
341 };
342
343 usbh: usb-phy@10005200 {
344 compatible = "brcm,bcm6318-usbh-phy";
345 reg = <0x10005200 0x38>;
346
347 #phy-cells = <1>;
348
349 clocks = <&periph_clk BCM6318_CLK_USBD>,
350 <&ubus_clk BCM6318_UCLK_USB>;
351 clock-names = "usbh",
352 "usb_ref";
353
354 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
355 resets = <&periph_rst BCM6318_RST_USBH>;
356
357 status = "disabled";
358 };
359
360 pcie: pcie@10010000 {
361 compatible = "brcm,bcm6318-pcie";
362 reg = <0x10010000 0x10000>;
363 #address-cells = <3>;
364 #size-cells = <2>;
365
366 device_type = "pci";
367 bus-range = <0x00 0x01>;
368 ranges = <0x2000000 0 0x10200000 0x10200000 0 0x100000>;
369 linux,pci-probe-only = <1>;
370
371 interrupt-parent = <&periph_intc>;
372 interrupts = <BCM6318_IRQ_PCIE_RC>;
373
374 clocks = <&periph_clk BCM6318_CLK_PCIE>,
375 <&periph_clk BCM6318_CLK_PCIE25>,
376 <&ubus_clk BCM6318_UCLK_PCIE>;
377 clock-names = "pcie",
378 "pcie25",
379 "pcie-ubus";
380
381 resets = <&periph_rst BCM6318_RST_PCIE>,
382 <&periph_rst BCM6318_RST_PCIE_EXT>,
383 <&periph_rst BCM6318_RST_PCIE_CORE>,
384 <&periph_rst BCM6318_RST_PCIE_HARD>;
385 reset-names = "pcie",
386 "pcie-ext",
387 "pcie-core",
388 "pcie-hard";
389
390 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_PCIE>;
391
392 status = "disabled";
393 };
394
395 switch0: switch@10080000 {
396 #address-cells = <1>;
397 #size-cells = <0>;
398 compatible = "brcm,bcm6318-switch";
399 reg = <0x10080000 0x8000>;
400 big-endian;
401
402 ports {
403 #address-cells = <1>;
404 #size-cells = <0>;
405
406 port@8 {
407 reg = <8>;
408
409 phy-mode = "internal";
410 ethernet = <&ethernet>;
411
412 fixed-link {
413 speed = <1000>;
414 full-duplex;
415 };
416 };
417 };
418 };
419
420 mdio: mdio@100800b0 {
421 #address-cells = <1>;
422 #size-cells = <0>;
423 compatible = "brcm,bcm6368-mdio-mux";
424 reg = <0x100800b0 0x8>;
425
426 mdio_int: mdio@0 {
427 #address-cells = <1>;
428 #size-cells = <0>;
429 reg = <0>;
430
431 phy1: ethernet-phy@1 {
432 compatible = "ethernet-phy-ieee802.3-c22";
433 reg = <1>;
434 };
435
436 phy2: ethernet-phy@2 {
437 compatible = "ethernet-phy-ieee802.3-c22";
438 reg = <2>;
439 };
440
441 phy3: ethernet-phy@3 {
442 compatible = "ethernet-phy-ieee802.3-c22";
443 reg = <3>;
444 };
445
446 phy4: ethernet-phy@4 {
447 compatible = "ethernet-phy-ieee802.3-c22";
448 reg = <4>;
449 };
450 };
451
452 mdio_ext: mdio@1 {
453 #address-cells = <1>;
454 #size-cells = <0>;
455 reg = <1>;
456 };
457 };
458
459 ethernet: ethernet@10088000 {
460 compatible = "brcm,bcm6318-enetsw";
461 reg = <0x10088000 0x80>,
462 <0x10088200 0x80>,
463 <0x10088400 0x80>;
464 reg-names = "dma",
465 "dma-channels",
466 "dma-sram";
467
468 interrupt-parent = <&periph_intc>;
469 interrupts = <BCM6318_IRQ_ENETSW_RX_DMA0>,
470 <BCM6318_IRQ_ENETSW_TX_DMA0>;
471 interrupt-names = "rx",
472 "tx";
473
474 clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
475 <&periph_clk BCM6318_CLK_ROBOSW025>,
476 <&ubus_clk BCM6318_UCLK_ROBOSW>;
477
478 resets = <&periph_rst BCM6318_RST_ENETSW>,
479 <&periph_rst BCM6318_RST_EPHY>;
480
481 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_EPHY0>,
482 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY1>,
483 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY2>,
484 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY3>;
485
486 dma-rx = <0>;
487 dma-tx = <1>;
488
489 status = "disabled";
490 };
491 };
492 };