bmips: dts: move leds dt-bindings include to SoCs
[openwrt/staging/nbd.git] / target / linux / bmips / dts / bcm6328.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6328-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/reset/bcm6328-reset.h>
12 #include <dt-bindings/soc/bcm6328-pm.h>
13
14 / {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "brcm,bcm6328";
18
19 aliases {
20 nflash = &nflash;
21 pinctrl = &pinctrl;
22 serial0 = &uart0;
23 serial1 = &uart1;
24 spi1 = &hsspi;
25 };
26
27 chosen {
28 bootargs = "earlycon";
29 stdout-path = "serial0:115200n8";
30 };
31
32 clocks {
33 periph_osc: periph-osc {
34 compatible = "fixed-clock";
35
36 #clock-cells = <0>;
37
38 clock-frequency = <50000000>;
39 clock-output-names = "periph";
40 };
41
42 hsspi_osc: hsspi-osc {
43 compatible = "fixed-clock";
44
45 #clock-cells = <0>;
46
47 clock-frequency = <133333333>;
48 clock-output-names = "hsspi_osc";
49 };
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55 mips-hpt-frequency = <160000000>;
56
57 cpu@0 {
58 compatible = "brcm,bmips4350", "mips,mips4Kc";
59 device_type = "cpu";
60 reg = <0>;
61 };
62
63 cpu@1 {
64 compatible = "brcm,bmips4350", "mips,mips4Kc";
65 device_type = "cpu";
66 reg = <1>;
67 };
68 };
69
70 cpu_intc: interrupt-controller {
71 #address-cells = <0>;
72 compatible = "mti,cpu-interrupt-controller";
73
74 interrupt-controller;
75 #interrupt-cells = <1>;
76 };
77
78 memory@0 {
79 device_type = "memory";
80 reg = <0 0>;
81 };
82
83 ubus {
84 #address-cells = <1>;
85 #size-cells = <1>;
86
87 compatible = "simple-bus";
88 ranges;
89
90 periph_clk: clock-controller@10000004 {
91 compatible = "brcm,bcm6328-clocks";
92 reg = <0x10000004 0x4>;
93 #clock-cells = <1>;
94 };
95
96 periph_rst: reset-controller@10000010 {
97 compatible = "brcm,bcm6345-reset";
98 reg = <0x10000010 0x4>;
99 #reset-cells = <1>;
100 };
101
102 ext_intc: interrupt-controller@10000018 {
103 #address-cells = <1>;
104 compatible = "brcm,bcm6345-ext-intc";
105 reg = <0x10000018 0x4>;
106
107 interrupt-controller;
108 #interrupt-cells = <2>;
109
110 interrupt-parent = <&periph_intc>;
111 interrupts = <BCM6328_IRQ_EXTO>,
112 <BCM6328_IRQ_EXT1>,
113 <BCM6328_IRQ_EXT2>,
114 <BCM6328_IRQ_EXT3>;
115 };
116
117 periph_intc: interrupt-controller@10000020 {
118 #address-cells = <1>;
119 compatible = "brcm,bcm6345-l1-intc";
120 reg = <0x10000020 0x10>,
121 <0x10000030 0x10>;
122
123 interrupt-controller;
124 #interrupt-cells = <1>;
125
126 interrupt-parent = <&cpu_intc>;
127 interrupts = <2>, <3>;
128 };
129
130 wdt: watchdog@1000005c {
131 compatible = "brcm,bcm7038-wdt";
132 reg = <0x1000005c 0xc>;
133
134 clocks = <&periph_osc>;
135
136 timeout-sec = <30>;
137 };
138
139 pll_cntl: syscon@10000068 {
140 compatible = "syscon", "simple-mfd";
141 reg = <0x10000068 0x4>;
142 native-endian;
143
144 syscon-reboot {
145 compatible = "syscon-reboot";
146 offset = <0>;
147 mask = <0x1>;
148 };
149 };
150
151 gpio_cntl: syscon@10000080 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "brcm,bcm6328-gpio-sysctl",
155 "syscon", "simple-mfd";
156 reg = <0x10000080 0x80>;
157 ranges = <0 0x10000080 0x80>;
158 native-endian;
159
160 gpio: gpio@0 {
161 compatible = "brcm,bcm6328-gpio";
162 reg-names = "dirout", "dat";
163 reg = <0x0 0x8>, <0x8 0x8>;
164
165 gpio-controller;
166 gpio-ranges = <&pinctrl 0 0 32>;
167 #gpio-cells = <2>;
168 };
169
170 pinctrl: pinctrl@18 {
171 compatible = "brcm,bcm6328-pinctrl";
172 reg = <0x18 0x10>;
173
174 pinctrl_serial_led: serial_led-pins {
175 pinctrl_serial_led_data: serial_led_data-pins {
176 function = "serial_led_data";
177 pins = "gpio6";
178 };
179
180 pinctrl_serial_led_clk: serial_led_clk-pins {
181 function = "serial_led_clk";
182 pins = "gpio7";
183 };
184 };
185
186 pinctrl_inet_act_led: inet_act_led-pins {
187 function = "inet_act_led";
188 pins = "gpio11";
189 };
190
191 pinctrl_pcie_clkreq: pcie_clkreq-pins {
192 function = "pcie_clkreq";
193 pins = "gpio16";
194 };
195
196 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
197 function = "led";
198 pins = "gpio17";
199 };
200
201 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
202 function = "led";
203 pins = "gpio18";
204 };
205
206 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
207 function = "led";
208 pins = "gpio19";
209 };
210
211 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
212 function = "led";
213 pins = "gpio20";
214 };
215
216 pinctrl_ephy0_act_led: ephy0_act_led-pins {
217 function = "ephy0_act_led";
218 pins = "gpio25";
219 };
220
221 pinctrl_ephy1_act_led: ephy1_act_led-pins {
222 function = "ephy1_act_led";
223 pins = "gpio26";
224 };
225
226 pinctrl_ephy2_act_led: ephy2_act_led-pins {
227 function = "ephy2_act_led";
228 pins = "gpio27";
229 };
230
231 pinctrl_ephy3_act_led: ephy3_act_led-pins {
232 function = "ephy3_act_led";
233 pins = "gpio28";
234 };
235
236 pinctrl_hsspi_cs1: hsspi_cs1-pins {
237 function = "hsspi_cs1";
238 pins = "hsspi_cs1";
239 };
240
241 pinctrl_usb_port1_device: usb_port1_device-pins {
242 function = "usb_device_port";
243 pins = "usb_port1";
244 };
245
246 pinctrl_usb_port1_host: usb_port1_host-pins {
247 function = "usb_host_port";
248 pins = "usb_port1";
249 };
250 };
251 };
252
253 uart0: serial@10000100 {
254 compatible = "brcm,bcm6345-uart";
255 reg = <0x10000100 0x18>;
256
257 interrupt-parent = <&periph_intc>;
258 interrupts = <BCM6328_IRQ_UART0>;
259
260 clocks = <&periph_osc>;
261 clock-names = "periph";
262
263 status = "disabled";
264 };
265
266 uart1: serial@10000120 {
267 compatible = "brcm,bcm6345-uart";
268 reg = <0x10000120 0x18>;
269
270 interrupt-parent = <&periph_intc>;
271 interrupts = <BCM6328_IRQ_UART1>;
272
273 clocks = <&periph_osc>;
274 clock-names = "periph";
275
276 status = "disabled";
277 };
278
279 nflash: nand@10000200 {
280 #address-cells = <1>;
281 #size-cells = <0>;
282 compatible = "brcm,nand-bcm6368",
283 "brcm,brcmnand-v2.2",
284 "brcm,brcmnand";
285 reg = <0x10000200 0x180>,
286 <0x10000400 0x200>,
287 <0x10000070 0x10>;
288 reg-names = "nand",
289 "nand-cache",
290 "nand-int-base";
291
292 interrupt-parent = <&periph_intc>;
293 interrupts = <BCM6328_IRQ_NAND>;
294
295 status = "disabled";
296 };
297
298 leds: led-controller@10000800 {
299 #address-cells = <1>;
300 #size-cells = <0>;
301 compatible = "brcm,bcm6328-leds";
302 reg = <0x10000800 0x24>;
303
304 status = "disabled";
305 };
306
307 hsspi: spi@10001000 {
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "brcm,bcm6328-hsspi";
311 reg = <0x10001000 0x600>;
312
313 interrupt-parent = <&periph_intc>;
314 interrupts = <BCM6328_IRQ_HSSPI>;
315
316 clocks = <&periph_clk BCM6328_CLK_HSSPI>,
317 <&hsspi_osc>;
318 clock-names = "hsspi",
319 "pll";
320
321 resets = <&periph_rst BCM6328_RST_SPI>;
322
323 status = "disabled";
324 };
325
326 serdes_cntl: syscon@10001800 {
327 compatible = "syscon";
328 reg = <0x10001800 0x4>;
329 native-endian;
330 };
331
332 periph_pwr: power-controller@10001848 {
333 compatible = "brcm,bcm6328-power-controller";
334 reg = <0x10001848 0x4>;
335
336 #power-domain-cells = <1>;
337 };
338
339 ehci: usb@10002500 {
340 compatible = "brcm,bcm6328-ehci", "generic-ehci";
341 reg = <0x10002500 0x100>;
342 big-endian;
343 spurious-oc;
344
345 interrupt-parent = <&periph_intc>;
346 interrupts = <BCM6328_IRQ_EHCI>;
347
348 phys = <&usbh 0>;
349 phy-names = "usb";
350
351 status = "disabled";
352 };
353
354 ohci: usb@10002600 {
355 compatible = "brcm,bcm6328-ohci", "generic-ohci";
356 reg = <0x10002600 0x100>;
357 big-endian;
358 no-big-frame-no;
359
360 interrupt-parent = <&periph_intc>;
361 interrupts = <BCM6328_IRQ_OHCI>;
362
363 phys = <&usbh 0>;
364 phy-names = "usb";
365
366 status = "disabled";
367 };
368
369 usbh: usb-phy@10002700 {
370 compatible = "brcm,bcm6328-usbh-phy";
371 reg = <0x10002700 0x38>;
372
373 #phy-cells = <1>;
374
375 clocks = <&periph_clk BCM6328_CLK_USBH>;
376 clock-names = "usbh";
377
378 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
379 resets = <&periph_rst BCM6328_RST_USBH>;
380
381 status = "disabled";
382 };
383
384 ethernet: ethernet@1000d800 {
385 compatible = "brcm,bcm6328-enetsw";
386 reg = <0x1000d800 0x80>,
387 <0x1000da00 0x80>,
388 <0x1000dc00 0x80>;
389 reg-names = "dma",
390 "dma-channels",
391 "dma-sram";
392
393 interrupt-parent = <&periph_intc>;
394 interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
395 <BCM6328_IRQ_ENETSW_TX_DMA0>;
396 interrupt-names = "rx",
397 "tx";
398
399 clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
400
401 resets = <&periph_rst BCM6328_RST_ENETSW>,
402 <&periph_rst BCM6328_RST_EPHY>;
403
404 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
405 <&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
406
407 dma-rx = <0>;
408 dma-tx = <1>;
409
410 status = "disabled";
411 };
412
413 switch0: switch@10e00000 {
414 #address-cells = <1>;
415 #size-cells = <0>;
416 compatible = "brcm,bcm6328-switch";
417 reg = <0x10e00000 0x8000>;
418 big-endian;
419
420 ports {
421 #address-cells = <1>;
422 #size-cells = <0>;
423
424 port@8 {
425 reg = <8>;
426
427 phy-mode = "internal";
428 ethernet = <&ethernet>;
429
430 fixed-link {
431 speed = <1000>;
432 full-duplex;
433 };
434 };
435 };
436 };
437
438 mdio: mdio@10e000b0 {
439 #address-cells = <1>;
440 #size-cells = <0>;
441 compatible = "brcm,bcm6368-mdio-mux";
442 reg = <0x10e000b0 0x8>;
443
444 mdio_int: mdio@0 {
445 #address-cells = <1>;
446 #size-cells = <0>;
447 reg = <0>;
448
449 phy1: ethernet-phy@1 {
450 compatible = "ethernet-phy-ieee802.3-c22";
451 reg = <1>;
452 };
453
454 phy2: ethernet-phy@2 {
455 compatible = "ethernet-phy-ieee802.3-c22";
456 reg = <2>;
457 };
458
459 phy3: ethernet-phy@3 {
460 compatible = "ethernet-phy-ieee802.3-c22";
461 reg = <3>;
462 };
463
464 phy4: ethernet-phy@4 {
465 compatible = "ethernet-phy-ieee802.3-c22";
466 reg = <4>;
467 };
468 };
469
470 mdio_ext: mdio@1 {
471 #address-cells = <1>;
472 #size-cells = <0>;
473 reg = <1>;
474 };
475 };
476
477 pcie: pcie@10e40000 {
478 compatible = "brcm,bcm6328-pcie";
479 reg = <0x10e40000 0x10000>;
480 #address-cells = <3>;
481 #size-cells = <2>;
482
483 device_type = "pci";
484 bus-range = <0x00 0x01>;
485 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
486 linux,pci-probe-only = <1>;
487
488 interrupt-parent = <&periph_intc>;
489 interrupts = <BCM6328_IRQ_PCIE_RC>;
490
491 clocks = <&periph_clk BCM6328_CLK_PCIE>;
492 clock-names = "pcie";
493
494 resets = <&periph_rst BCM6328_RST_PCIE>,
495 <&periph_rst BCM6328_RST_PCIE_EXT>,
496 <&periph_rst BCM6328_RST_PCIE_CORE>,
497 <&periph_rst BCM6328_RST_PCIE_HARD>;
498 reset-names = "pcie",
499 "pcie-ext",
500 "pcie-core",
501 "pcie-hard";
502
503 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
504
505 brcm,serdes = <&serdes_cntl>;
506
507 status = "disabled";
508 };
509 };
510 };