1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6328-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6328-reset.h>
10 #include <dt-bindings/soc/bcm6328-pm.h>
15 compatible = "brcm,bcm6328";
26 bootargs = "earlycon";
27 stdout-path = "serial0:115200n8";
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
40 hsspi_osc: hsspi-osc {
41 compatible = "fixed-clock";
45 clock-frequency = <133333333>;
46 clock-output-names = "hsspi_osc";
53 mips-hpt-frequency = <160000000>;
56 compatible = "brcm,bmips4350", "mips,mips4Kc";
62 compatible = "brcm,bmips4350", "mips,mips4Kc";
68 cpu_intc: interrupt-controller {
70 compatible = "mti,cpu-interrupt-controller";
73 #interrupt-cells = <1>;
77 device_type = "memory";
85 compatible = "simple-bus";
88 periph_clk: clock-controller@10000004 {
89 compatible = "brcm,bcm6328-clocks";
90 reg = <0x10000004 0x4>;
94 periph_rst: reset-controller@10000010 {
95 compatible = "brcm,bcm6345-reset";
96 reg = <0x10000010 0x4>;
100 ext_intc: interrupt-controller@10000018 {
101 #address-cells = <1>;
102 compatible = "brcm,bcm6345-ext-intc";
103 reg = <0x10000018 0x4>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
108 interrupt-parent = <&periph_intc>;
109 interrupts = <BCM6328_IRQ_EXTO>,
115 periph_intc: interrupt-controller@10000020 {
116 #address-cells = <1>;
117 compatible = "brcm,bcm6345-l1-intc";
118 reg = <0x10000020 0x10>,
121 interrupt-controller;
122 #interrupt-cells = <1>;
124 interrupt-parent = <&cpu_intc>;
125 interrupts = <2>, <3>;
128 wdt: watchdog@1000005c {
129 compatible = "brcm,bcm7038-wdt";
130 reg = <0x1000005c 0xc>;
132 clocks = <&periph_osc>;
137 pll_cntl: syscon@10000068 {
138 compatible = "syscon", "simple-mfd";
139 reg = <0x10000068 0x4>;
143 compatible = "syscon-reboot";
149 gpio_cntl: syscon@10000080 {
150 #address-cells = <1>;
152 compatible = "brcm,bcm6328-gpio-sysctl",
153 "syscon", "simple-mfd";
154 reg = <0x10000080 0x80>;
155 ranges = <0 0x10000080 0x80>;
159 compatible = "brcm,bcm6328-gpio";
160 reg-names = "dirout", "dat";
161 reg = <0x0 0x8>, <0x8 0x8>;
164 gpio-ranges = <&pinctrl 0 0 32>;
168 pinctrl: pinctrl@18 {
169 compatible = "brcm,bcm6328-pinctrl";
172 pinctrl_serial_led: serial_led-pins {
173 pinctrl_serial_led_data: serial_led_data-pins {
174 function = "serial_led_data";
178 pinctrl_serial_led_clk: serial_led_clk-pins {
179 function = "serial_led_clk";
184 pinctrl_inet_act_led: inet_act_led-pins {
185 function = "inet_act_led";
189 pinctrl_pcie_clkreq: pcie_clkreq-pins {
190 function = "pcie_clkreq";
194 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
199 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
204 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
209 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
214 pinctrl_ephy0_act_led: ephy0_act_led-pins {
215 function = "ephy0_act_led";
219 pinctrl_ephy1_act_led: ephy1_act_led-pins {
220 function = "ephy1_act_led";
224 pinctrl_ephy2_act_led: ephy2_act_led-pins {
225 function = "ephy2_act_led";
229 pinctrl_ephy3_act_led: ephy3_act_led-pins {
230 function = "ephy3_act_led";
234 pinctrl_hsspi_cs1: hsspi_cs1-pins {
235 function = "hsspi_cs1";
239 pinctrl_usb_port1_device: usb_port1_device-pins {
240 function = "usb_device_port";
244 pinctrl_usb_port1_host: usb_port1_host-pins {
245 function = "usb_host_port";
251 uart0: serial@10000100 {
252 compatible = "brcm,bcm6345-uart";
253 reg = <0x10000100 0x18>;
255 interrupt-parent = <&periph_intc>;
256 interrupts = <BCM6328_IRQ_UART0>;
258 clocks = <&periph_osc>;
259 clock-names = "periph";
264 uart1: serial@10000120 {
265 compatible = "brcm,bcm6345-uart";
266 reg = <0x10000120 0x18>;
268 interrupt-parent = <&periph_intc>;
269 interrupts = <BCM6328_IRQ_UART1>;
271 clocks = <&periph_osc>;
272 clock-names = "periph";
277 nflash: nand@10000200 {
278 #address-cells = <1>;
280 compatible = "brcm,nand-bcm6368",
281 "brcm,brcmnand-v2.2",
283 reg = <0x10000200 0x180>,
290 interrupt-parent = <&periph_intc>;
291 interrupts = <BCM6328_IRQ_NAND>;
296 leds: led-controller@10000800 {
297 #address-cells = <1>;
299 compatible = "brcm,bcm6328-leds";
300 reg = <0x10000800 0x24>;
305 hsspi: spi@10001000 {
306 #address-cells = <1>;
308 compatible = "brcm,bcm6328-hsspi";
309 reg = <0x10001000 0x600>;
311 interrupt-parent = <&periph_intc>;
312 interrupts = <BCM6328_IRQ_HSSPI>;
314 clocks = <&periph_clk BCM6328_CLK_HSSPI>,
316 clock-names = "hsspi",
319 resets = <&periph_rst BCM6328_RST_SPI>;
324 serdes_cntl: syscon@10001800 {
325 compatible = "syscon";
326 reg = <0x10001800 0x4>;
330 periph_pwr: power-controller@10001848 {
331 compatible = "brcm,bcm6328-power-controller";
332 reg = <0x10001848 0x4>;
334 #power-domain-cells = <1>;
338 compatible = "brcm,bcm6328-ehci", "generic-ehci";
339 reg = <0x10002500 0x100>;
343 interrupt-parent = <&periph_intc>;
344 interrupts = <BCM6328_IRQ_EHCI>;
353 compatible = "brcm,bcm6328-ohci", "generic-ohci";
354 reg = <0x10002600 0x100>;
358 interrupt-parent = <&periph_intc>;
359 interrupts = <BCM6328_IRQ_OHCI>;
367 usbh: usb-phy@10002700 {
368 compatible = "brcm,bcm6328-usbh-phy";
369 reg = <0x10002700 0x38>;
373 clocks = <&periph_clk BCM6328_CLK_USBH>;
374 clock-names = "usbh";
376 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
377 resets = <&periph_rst BCM6328_RST_USBH>;
382 ethernet: ethernet@1000d800 {
383 compatible = "brcm,bcm6328-enetsw";
384 reg = <0x1000d800 0x80>,
391 interrupt-parent = <&periph_intc>;
392 interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
393 <BCM6328_IRQ_ENETSW_TX_DMA0>;
394 interrupt-names = "rx",
397 clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
399 resets = <&periph_rst BCM6328_RST_ENETSW>,
400 <&periph_rst BCM6328_RST_EPHY>;
402 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
403 <&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
411 switch0: switch@10e00000 {
412 #address-cells = <1>;
414 compatible = "brcm,bcm6328-switch";
415 reg = <0x10e00000 0x8000>;
419 #address-cells = <1>;
425 phy-mode = "internal";
426 ethernet = <ðernet>;
436 mdio: mdio@10e000b0 {
437 #address-cells = <1>;
439 compatible = "brcm,bcm6368-mdio-mux";
440 reg = <0x10e000b0 0x8>;
443 #address-cells = <1>;
447 phy1: ethernet-phy@1 {
448 compatible = "ethernet-phy-ieee802.3-c22";
452 phy2: ethernet-phy@2 {
453 compatible = "ethernet-phy-ieee802.3-c22";
457 phy3: ethernet-phy@3 {
458 compatible = "ethernet-phy-ieee802.3-c22";
462 phy4: ethernet-phy@4 {
463 compatible = "ethernet-phy-ieee802.3-c22";
469 #address-cells = <1>;
475 pcie: pcie@10e40000 {
476 compatible = "brcm,bcm6328-pcie";
477 reg = <0x10e40000 0x10000>;
478 #address-cells = <3>;
482 bus-range = <0x00 0x01>;
483 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
484 linux,pci-probe-only = <1>;
486 interrupt-parent = <&periph_intc>;
487 interrupts = <BCM6328_IRQ_PCIE_RC>;
489 clocks = <&periph_clk BCM6328_CLK_PCIE>;
490 clock-names = "pcie";
492 resets = <&periph_rst BCM6328_RST_PCIE>,
493 <&periph_rst BCM6328_RST_PCIE_EXT>,
494 <&periph_rst BCM6328_RST_PCIE_CORE>,
495 <&periph_rst BCM6328_RST_PCIE_HARD>;
496 reset-names = "pcie",
501 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
503 brcm,serdes = <&serdes_cntl>;