1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6328-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
11 #include <dt-bindings/soc/bcm6328-pm.h>
16 compatible = "brcm,bcm6328";
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
46 clock-frequency = <133333333>;
47 clock-output-names = "hsspi_osc";
54 mips-hpt-frequency = <160000000>;
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
69 cpu_intc: interrupt-controller {
71 compatible = "mti,cpu-interrupt-controller";
74 #interrupt-cells = <1>;
78 device_type = "memory";
86 compatible = "simple-bus";
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6328-clocks";
91 reg = <0x10000004 0x4>;
95 periph_rst: reset-controller@10000010 {
96 compatible = "brcm,bcm6345-reset";
97 reg = <0x10000010 0x4>;
101 ext_intc: interrupt-controller@10000018 {
102 #address-cells = <1>;
103 compatible = "brcm,bcm6345-ext-intc";
104 reg = <0x10000018 0x4>;
106 interrupt-controller;
107 #interrupt-cells = <2>;
109 interrupt-parent = <&periph_intc>;
110 interrupts = <BCM6328_IRQ_EXTO>,
116 periph_intc: interrupt-controller@10000020 {
117 #address-cells = <1>;
118 compatible = "brcm,bcm6345-l1-intc";
119 reg = <0x10000020 0x10>,
122 interrupt-controller;
123 #interrupt-cells = <1>;
125 interrupt-parent = <&cpu_intc>;
126 interrupts = <2>, <3>;
129 wdt: watchdog@1000005c {
130 compatible = "brcm,bcm7038-wdt";
131 reg = <0x1000005c 0xc>;
133 clocks = <&periph_osc>;
138 pll_cntl: syscon@10000068 {
139 compatible = "syscon", "simple-mfd";
140 reg = <0x10000068 0x4>;
144 compatible = "syscon-reboot";
150 gpio_cntl: syscon@10000080 {
151 #address-cells = <1>;
153 compatible = "brcm,bcm6328-gpio-sysctl",
154 "syscon", "simple-mfd";
155 reg = <0x10000080 0x80>;
156 ranges = <0 0x10000080 0x80>;
160 compatible = "brcm,bcm6328-gpio";
161 reg-names = "dirout", "dat";
162 reg = <0x0 0x8>, <0x8 0x8>;
165 gpio-ranges = <&pinctrl 0 0 32>;
169 pinctrl: pinctrl@18 {
170 compatible = "brcm,bcm6328-pinctrl";
173 pinctrl_serial_led: serial_led-pins {
174 pinctrl_serial_led_data: serial_led_data-pins {
175 function = "serial_led_data";
179 pinctrl_serial_led_clk: serial_led_clk-pins {
180 function = "serial_led_clk";
185 pinctrl_inet_act_led: inet_act_led-pins {
186 function = "inet_act_led";
190 pinctrl_pcie_clkreq: pcie_clkreq-pins {
191 function = "pcie_clkreq";
195 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
200 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
205 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
210 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
215 pinctrl_ephy0_act_led: ephy0_act_led-pins {
216 function = "ephy0_act_led";
220 pinctrl_ephy1_act_led: ephy1_act_led-pins {
221 function = "ephy1_act_led";
225 pinctrl_ephy2_act_led: ephy2_act_led-pins {
226 function = "ephy2_act_led";
230 pinctrl_ephy3_act_led: ephy3_act_led-pins {
231 function = "ephy3_act_led";
235 pinctrl_hsspi_cs1: hsspi_cs1-pins {
236 function = "hsspi_cs1";
240 pinctrl_usb_port1_device: usb_port1_device-pins {
241 function = "usb_device_port";
245 pinctrl_usb_port1_host: usb_port1_host-pins {
246 function = "usb_host_port";
252 uart0: serial@10000100 {
253 compatible = "brcm,bcm6345-uart";
254 reg = <0x10000100 0x18>;
256 interrupt-parent = <&periph_intc>;
257 interrupts = <BCM6328_IRQ_UART0>;
259 clocks = <&periph_osc>;
260 clock-names = "periph";
265 uart1: serial@10000120 {
266 compatible = "brcm,bcm6345-uart";
267 reg = <0x10000120 0x18>;
269 interrupt-parent = <&periph_intc>;
270 interrupts = <BCM6328_IRQ_UART1>;
272 clocks = <&periph_osc>;
273 clock-names = "periph";
278 nflash: nand@10000200 {
279 #address-cells = <1>;
281 compatible = "brcm,nand-bcm6368",
282 "brcm,brcmnand-v2.2",
284 reg = <0x10000200 0x180>,
291 interrupt-parent = <&periph_intc>;
292 interrupts = <BCM6328_IRQ_NAND>;
297 leds: led-controller@10000800 {
298 #address-cells = <1>;
300 compatible = "brcm,bcm6328-leds";
301 reg = <0x10000800 0x24>;
306 hsspi: spi@10001000 {
307 #address-cells = <1>;
309 compatible = "brcm,bcm6328-hsspi";
310 reg = <0x10001000 0x600>;
312 interrupt-parent = <&periph_intc>;
313 interrupts = <BCM6328_IRQ_HSSPI>;
315 clocks = <&periph_clk BCM6328_CLK_HSSPI>,
317 clock-names = "hsspi",
320 resets = <&periph_rst BCM6328_RST_SPI>;
325 serdes_cntl: syscon@10001800 {
326 compatible = "syscon";
327 reg = <0x10001800 0x4>;
331 periph_pwr: power-controller@10001848 {
332 compatible = "brcm,bcm6328-power-controller";
333 reg = <0x10001848 0x4>;
335 #power-domain-cells = <1>;
339 compatible = "brcm,bcm6328-ehci", "generic-ehci";
340 reg = <0x10002500 0x100>;
344 interrupt-parent = <&periph_intc>;
345 interrupts = <BCM6328_IRQ_EHCI>;
354 compatible = "brcm,bcm6328-ohci", "generic-ohci";
355 reg = <0x10002600 0x100>;
359 interrupt-parent = <&periph_intc>;
360 interrupts = <BCM6328_IRQ_OHCI>;
368 usbh: usb-phy@10002700 {
369 compatible = "brcm,bcm6328-usbh-phy";
370 reg = <0x10002700 0x38>;
374 clocks = <&periph_clk BCM6328_CLK_USBH>;
375 clock-names = "usbh";
377 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
378 resets = <&periph_rst BCM6328_RST_USBH>;
383 ethernet: ethernet@1000d800 {
384 compatible = "brcm,bcm6328-enetsw";
385 reg = <0x1000d800 0x80>,
392 interrupt-parent = <&periph_intc>;
393 interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
394 <BCM6328_IRQ_ENETSW_TX_DMA0>;
395 interrupt-names = "rx",
398 clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
400 resets = <&periph_rst BCM6328_RST_ENETSW>,
401 <&periph_rst BCM6328_RST_EPHY>;
403 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
404 <&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
412 switch0: switch@10e00000 {
413 #address-cells = <1>;
415 compatible = "brcm,bcm6328-switch";
416 reg = <0x10e00000 0x8000>;
420 #address-cells = <1>;
426 phy-mode = "internal";
427 ethernet = <ðernet>;
437 mdio: mdio@10e000b0 {
438 #address-cells = <1>;
440 compatible = "brcm,bcm6368-mdio-mux";
441 reg = <0x10e000b0 0x8>;
444 #address-cells = <1>;
448 phy1: ethernet-phy@1 {
449 compatible = "ethernet-phy-ieee802.3-c22";
453 phy2: ethernet-phy@2 {
454 compatible = "ethernet-phy-ieee802.3-c22";
458 phy3: ethernet-phy@3 {
459 compatible = "ethernet-phy-ieee802.3-c22";
463 phy4: ethernet-phy@4 {
464 compatible = "ethernet-phy-ieee802.3-c22";
470 #address-cells = <1>;
476 pcie: pcie@10e40000 {
477 compatible = "brcm,bcm6328-pcie";
478 reg = <0x10e40000 0x10000>;
479 #address-cells = <3>;
483 bus-range = <0x00 0x01>;
484 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
485 linux,pci-probe-only = <1>;
487 interrupt-parent = <&periph_intc>;
488 interrupts = <BCM6328_IRQ_PCIE_RC>;
490 clocks = <&periph_clk BCM6328_CLK_PCIE>;
491 clock-names = "pcie";
493 resets = <&periph_rst BCM6328_RST_PCIE>,
494 <&periph_rst BCM6328_RST_PCIE_EXT>,
495 <&periph_rst BCM6328_RST_PCIE_CORE>,
496 <&periph_rst BCM6328_RST_PCIE_HARD>;
497 reset-names = "pcie",
502 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
504 brcm,serdes = <&serdes_cntl>;