1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/bcm6368-reset.h>
15 compatible = "brcm,bcm6368";
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
45 mips-hpt-frequency = <200000000>;
48 compatible = "brcm,bmips4350", "mips,mips4Kc";
54 compatible = "brcm,bmips4350", "mips,mips4Kc";
60 cpu_intc: interrupt-controller {
62 compatible = "mti,cpu-interrupt-controller";
65 #interrupt-cells = <1>;
69 device_type = "memory";
77 compatible = "simple-bus";
80 periph_clk: clock-controller@10000004 {
81 compatible = "brcm,bcm6368-clocks";
82 reg = <0x10000004 0x4>;
86 pll_cntl: syscon@10000008 {
87 compatible = "syscon", "simple-mfd";
88 reg = <0x10000008 0x4>;
92 compatible = "syscon-reboot";
98 periph_rst: reset-controller@10000010 {
99 compatible = "brcm,bcm6345-reset";
100 reg = <0x10000010 0x4>;
104 ext_intc0: interrupt-controller@10000018 {
105 #address-cells = <1>;
106 compatible = "brcm,bcm6345-ext-intc";
107 reg = <0x10000018 0x4>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
112 interrupt-parent = <&periph_intc>;
113 interrupts = <BCM6368_IRQ_EXT0>,
119 ext_intc1: interrupt-controller@1000001c {
120 #address-cells = <1>;
121 compatible = "brcm,bcm6345-ext-intc";
122 reg = <0x1000001c 0x4>;
124 interrupt-controller;
125 #interrupt-cells = <2>;
127 interrupt-parent = <&periph_intc>;
128 interrupts = <BCM6368_IRQ_EXT4>,
132 periph_intc: interrupt-controller@10000020 {
133 #address-cells = <1>;
134 compatible = "brcm,bcm6345-l1-intc";
135 reg = <0x10000020 0x10>,
138 interrupt-controller;
139 #interrupt-cells = <1>;
141 interrupt-parent = <&cpu_intc>;
142 interrupts = <2>, <3>;
145 wdt: watchdog@1000005c {
146 compatible = "brcm,bcm7038-wdt";
147 reg = <0x1000005c 0xc>;
149 clocks = <&periph_osc>;
154 gpio_cntl: syscon@10000080 {
155 #address-cells = <1>;
157 compatible = "brcm,bcm6368-gpio-sysctl",
158 "syscon", "simple-mfd";
159 reg = <0x10000080 0x80>;
160 ranges = <0 0x10000080 0x80>;
164 compatible = "brcm,bcm6368-gpio";
165 reg-names = "dirout", "dat";
166 reg = <0x0 0x8>, <0x8 0x8>;
169 gpio-ranges = <&pinctrl 0 0 38>;
173 pinctrl: pinctrl@18 {
174 compatible = "brcm,bcm6368-pinctrl";
175 reg = <0x18 0x4>, <0x38 0x4>;
177 pinctrl_analog_afe_0: analog_afe_0-pins {
178 function = "analog_afe_0";
182 pinctrl_analog_afe_1: analog_afe_1-pins {
183 function = "analog_afe_1";
187 pinctrl_sys_irq: sys_irq-pins {
188 function = "sys_irq";
192 pinctrl_serial_led: serial_led-pins {
193 pinctrl_serial_led_data: serial_led_data-pins {
194 function = "serial_led_data";
198 pinctrl_serial_led_clk: serial_led_clk-pins {
199 function = "serial_led_clk";
204 pinctrl_inet_led: inet_led-pins {
205 function = "inet_led";
209 pinctrl_ephy0_led: ephy0_led-pins {
210 function = "ephy0_led";
214 pinctrl_ephy1_led: ephy1_led-pins {
215 function = "ephy1_led";
219 pinctrl_ephy2_led: ephy2_led-pins {
220 function = "ephy2_led";
224 pinctrl_ephy3_led: ephy3_led-pins {
225 function = "ephy3_led";
229 pinctrl_robosw_led_data: robosw_led_data-pins {
230 function = "robosw_led_data";
234 pinctrl_robosw_led_clk: robosw_led_clk-pins {
235 function = "robosw_led_clk";
239 pinctrl_robosw_led0: robosw_led0-pins {
240 function = "robosw_led0";
244 pinctrl_robosw_led1: robosw_led1-pins {
245 function = "robosw_led1";
249 pinctrl_usb_device_led: usb_device_led-pins {
250 function = "usb_device_led";
254 pinctrl_pci: pci-pins {
255 pinctrl_pci_req1: pci_req1-pins {
256 function = "pci_req1";
260 pinctrl_pci_gnt1: pci_gnt1-pins {
261 function = "pci_gnt1";
265 pinctrl_pci_intb: pci_intb-pins {
266 function = "pci_intb";
270 pinctrl_pci_req0: pci_req0-pins {
271 function = "pci_req0";
275 pinctrl_pci_gnt0: pci_gnt0-pins {
276 function = "pci_gnt0";
281 pinctrl_pcmcia: pcmcia-pins {
282 pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
283 function = "pcmcia_cd1";
287 pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
288 function = "pcmcia_cd2";
292 pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
293 function = "pcmcia_vs1";
297 pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
298 function = "pcmcia_vs2";
303 pinctrl_ebi_cs2: ebi_cs2-pins {
304 function = "ebi_cs2";
308 pinctrl_ebi_cs3: ebi_cs3-pins {
309 function = "ebi_cs3";
313 pinctrl_spi_cs2: spi_cs2-pins {
314 function = "spi_cs2";
318 pinctrl_spi_cs3: spi_cs3-pins {
319 function = "spi_cs3";
323 pinctrl_spi_cs4: spi_cs4-pins {
324 function = "spi_cs4";
328 pinctrl_spi_cs5: spi_cs5-pins {
329 function = "spi_cs5";
333 pinctrl_uart1: uart1-pins {
340 leds: led-controller@100000d0 {
341 #address-cells = <1>;
343 compatible = "brcm,bcm6358-leds";
344 reg = <0x100000d0 0x8>;
349 uart0: serial@10000100 {
350 compatible = "brcm,bcm6345-uart";
351 reg = <0x10000100 0x18>;
353 interrupt-parent = <&periph_intc>;
354 interrupts = <BCM6368_IRQ_UART0>;
356 clocks = <&periph_osc>;
357 clock-names = "periph";
362 uart1: serial@10000120 {
363 compatible = "brcm,bcm6345-uart";
364 reg = <0x10000120 0x18>;
366 interrupt-parent = <&periph_intc>;
367 interrupts = <BCM6368_IRQ_UART1>;
369 clocks = <&periph_osc>;
370 clock-names = "periph";
375 nflash: nand@10000200 {
376 #address-cells = <1>;
378 compatible = "brcm,nand-bcm6368",
379 "brcm,brcmnand-v2.1",
381 reg = <0x10000200 0x180>,
388 interrupt-parent = <&periph_intc>;
389 interrupts = <BCM6368_IRQ_NAND>;
391 clocks = <&periph_clk BCM6368_CLK_NAND>;
392 clock-names = "nand";
397 lsspi: spi@10000800 {
398 #address-cells = <1>;
400 compatible = "brcm,bcm6358-spi";
401 reg = <0x10000800 0x70c>;
403 interrupt-parent = <&periph_intc>;
404 interrupts = <BCM6368_IRQ_SPI>;
406 clocks = <&periph_clk BCM6368_CLK_SPI>;
409 resets = <&periph_rst BCM6368_RST_SPI>;
415 compatible = "brcm,bcm6348-pci";
416 reg = <0x10001000 0x200>;
417 #address-cells = <3>;
421 bus-range = <0x00 0x01>;
422 ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
423 <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
424 linux,pci-probe-only = <1>;
426 interrupt-parent = <&periph_intc>;
427 interrupts = <BCM6368_IRQ_MPI>;
429 resets = <&periph_rst BCM6368_RST_MPI>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_pci>;
441 compatible = "brcm,bcm6368-ehci", "generic-ehci";
442 reg = <0x10001500 0x100>;
446 interrupt-parent = <&periph_intc>;
447 interrupts = <BCM6368_IRQ_EHCI>;
456 compatible = "brcm,bcm6368-ohci", "generic-ohci";
457 reg = <0x10001600 0x100>;
461 interrupt-parent = <&periph_intc>;
462 interrupts = <BCM6368_IRQ_OHCI>;
470 usbh: usb-phy@10001700 {
471 compatible = "brcm,bcm6368-usbh-phy";
472 reg = <0x10001700 0x38>;
476 clocks = <&periph_clk BCM6368_CLK_USBH>;
477 clock-names = "usbh";
479 resets = <&periph_rst BCM6368_RST_USBH>;
484 random: rng@10004180 {
485 compatible = "brcm,bcm6368-rng";
486 reg = <0x10004180 0x14>;
488 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
489 clock-names = "ipsec";
491 resets = <&periph_rst BCM6368_RST_IPSEC>;
494 ethernet: ethernet@10006800 {
495 compatible = "brcm,bcm6368-enetsw";
496 reg = <0x10006800 0x80>,
503 interrupt-parent = <&periph_intc>;
504 interrupts = <BCM6368_IRQ_ENETSW_RX_DMA0>,
505 <BCM6368_IRQ_ENETSW_TX_DMA0>;
506 interrupt-names = "rx",
509 clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
510 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
511 <&periph_clk BCM6368_CLK_ROBOSW>;
513 resets = <&periph_rst BCM6368_RST_SWITCH>,
514 <&periph_rst BCM6368_RST_EPHY>;
522 switch0: switch@10f00000 {
523 #address-cells = <1>;
525 compatible = "brcm,bcm6368-switch";
526 reg = <0x10f00000 0x8000>;
530 #address-cells = <1>;
536 phy-mode = "internal";
537 ethernet = <ðernet>;
547 mdio: mdio@10f000b0 {
548 #address-cells = <1>;
550 compatible = "brcm,bcm6368-mdio-mux";
551 reg = <0x10f000b0 0x8>;
554 #address-cells = <1>;
558 phy1: ethernet-phy@1 {
559 compatible = "ethernet-phy-ieee802.3-c22";
563 phy2: ethernet-phy@2 {
564 compatible = "ethernet-phy-ieee802.3-c22";
568 phy3: ethernet-phy@3 {
569 compatible = "ethernet-phy-ieee802.3-c22";
573 phy4: ethernet-phy@4 {
574 compatible = "ethernet-phy-ieee802.3-c22";
580 #address-cells = <1>;
587 pflash: nor@18000000 {
588 #address-cells = <1>;
590 compatible = "cfi-flash";
591 reg = <0x18000000 0x2000000>;