1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
14 compatible = "brcm,bcm6368";
26 bootargs = "console=ttyS0,115200n8 earlycon";
27 stdout-path = "serial0:115200n8";
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
44 mips-hpt-frequency = <200000000>;
47 compatible = "brcm,bmips4350", "mips,mips4Kc";
53 compatible = "brcm,bmips4350", "mips,mips4Kc";
59 cpu_intc: interrupt-controller {
61 compatible = "mti,cpu-interrupt-controller";
64 #interrupt-cells = <1>;
68 device_type = "memory";
76 compatible = "simple-bus";
79 periph_clk: clock-controller@10000004 {
80 compatible = "brcm,bcm6368-clocks";
81 reg = <0x10000004 0x4>;
85 pll_cntl: syscon@10000008 {
86 compatible = "syscon", "simple-mfd";
87 reg = <0x10000008 0x4>;
91 compatible = "syscon-reboot";
97 periph_rst: reset-controller@10000010 {
98 compatible = "brcm,bcm6345-reset";
99 reg = <0x10000010 0x4>;
103 ext_intc0: interrupt-controller@10000018 {
104 #address-cells = <1>;
105 compatible = "brcm,bcm6345-ext-intc";
106 reg = <0x10000018 0x4>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
111 interrupts = <BCM6368_IRQ_EXT0>,
117 ext_intc1: interrupt-controller@1000001c {
118 #address-cells = <1>;
119 compatible = "brcm,bcm6345-ext-intc";
120 reg = <0x1000001c 0x4>;
122 interrupt-controller;
123 #interrupt-cells = <2>;
125 interrupts = <BCM6368_IRQ_EXT4>,
129 periph_intc: interrupt-controller@10000020 {
130 #address-cells = <1>;
131 compatible = "brcm,bcm6345-l1-intc";
132 reg = <0x10000020 0x10>,
135 interrupt-controller;
136 #interrupt-cells = <1>;
138 interrupt-parent = <&cpu_intc>;
139 interrupts = <2>, <3>;
142 wdt: watchdog@1000005c {
143 compatible = "brcm,bcm7038-wdt";
144 reg = <0x1000005c 0xc>;
146 clocks = <&periph_osc>;
151 gpio: syscon@10000080 {
152 compatible = "syscon", "simple-mfd";
153 reg = <0x10000080 0x80>;
156 pinctrl: pin-controller {
157 compatible = "brcm,bcm6368-pinctrl";
162 interrupts-extended = <&ext_intc1 0 0>,
168 interrupt-names = "gpio32",
175 pinctrl_analog_afe_0: analog_afe_0 {
176 function = "analog_afe_0";
180 pinctrl_analog_afe_1: analog_afe_1 {
181 function = "analog_afe_1";
185 pinctrl_sys_irq: sys_irq {
186 function = "sys_irq";
190 pinctrl_serial_led: serial_led {
191 pinctrl_serial_led_data: serial_led_data {
192 function = "serial_led_data";
196 pinctrl_serial_led_clk: serial_led_clk {
197 function = "serial_led_clk";
202 pinctrl_inet_led: inet_led {
203 function = "inet_led";
207 pinctrl_ephy0_led: ephy0_led {
208 function = "ephy0_led";
212 pinctrl_ephy1_led: ephy1_led {
213 function = "ephy1_led";
217 pinctrl_ephy2_led: ephy2_led {
218 function = "ephy2_led";
222 pinctrl_ephy3_led: ephy3_led {
223 function = "ephy3_led";
227 pinctrl_robosw_led_data: robosw_led_data {
228 function = "robosw_led_data";
232 pinctrl_robosw_led_clk: robosw_led_clk {
233 function = "robosw_led_clk";
237 pinctrl_robosw_led0: robosw_led0 {
238 function = "robosw_led0";
242 pinctrl_robosw_led1: robosw_led1 {
243 function = "robosw_led1";
247 pinctrl_usb_device_led: usb_device_led {
248 function = "usb_device_led";
253 pinctrl_pci_req1: pci_req1 {
254 function = "pci_req1";
258 pinctrl_pci_gnt1: pci_gnt1 {
259 function = "pci_gnt1";
263 pinctrl_pci_intb: pci_intb {
264 function = "pci_intb";
268 pinctrl_pci_req0: pci_req0 {
269 function = "pci_req0";
273 pinctrl_pci_gnt0: pci_gnt0 {
274 function = "pci_gnt0";
279 pinctrl_pcmcia: pcmcia {
280 pinctrl_pcmcia_cd1: pcmcia_cd1 {
281 function = "pcmcia_cd1";
285 pinctrl_pcmcia_cd2: pcmcia_cd2 {
286 function = "pcmcia_cd2";
290 pinctrl_pcmcia_vs1: pcmcia_vs1 {
291 function = "pcmcia_vs1";
295 pinctrl_pcmcia_vs2: pcmcia_vs2 {
296 function = "pcmcia_vs2";
301 pinctrl_ebi_cs2: ebi_cs2 {
302 function = "ebi_cs2";
306 pinctrl_ebi_cs3: ebi_cs3 {
307 function = "ebi_cs3";
311 pinctrl_spi_cs2: spi_cs2 {
312 function = "spi_cs2";
316 pinctrl_spi_cs3: spi_cs3 {
317 function = "spi_cs3";
321 pinctrl_spi_cs4: spi_cs4 {
322 function = "spi_cs4";
326 pinctrl_spi_cs5: spi_cs5 {
327 function = "spi_cs5";
331 pinctrl_uart1: uart1 {
338 gpiobasemode: gpiobasemode@100000b8 {
339 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
340 reg = <0x100000b8 0x4>;
343 leds: led-controller@100000d0 {
344 #address-cells = <1>;
346 compatible = "brcm,bcm6358-leds";
347 reg = <0x100000d0 0x8>;
352 uart0: serial@10000100 {
353 compatible = "brcm,bcm6345-uart";
354 reg = <0x10000100 0x18>;
356 interrupt-parent = <&periph_intc>;
357 interrupts = <BCM6368_IRQ_UART0>;
359 clocks = <&periph_osc>;
360 clock-names = "periph";
365 uart1: serial@10000120 {
366 compatible = "brcm,bcm6345-uart";
367 reg = <0x10000120 0x18>;
369 interrupt-parent = <&periph_intc>;
370 interrupts = <BCM6368_IRQ_UART1>;
372 clocks = <&periph_osc>;
373 clock-names = "periph";
378 nflash: nand@10000200 {
379 #address-cells = <1>;
381 compatible = "brcm,nand-bcm6368",
382 "brcm,brcmnand-v2.1",
384 reg = <0x10000200 0x180>,
391 interrupt-parent = <&periph_intc>;
392 interrupts = <BCM6368_IRQ_NAND>;
394 clocks = <&periph_clk BCM6368_CLK_NAND>;
395 clock-names = "nand";
400 lsspi: spi@10000800 {
401 compatible = "brcm,bcm6358-spi";
402 reg = <0x10000800 0x70c>;
403 #address-cells = <1>;
406 interrupt-parent = <&periph_intc>;
407 interrupts = <BCM6368_IRQ_SPI>;
409 clocks = <&periph_clk BCM6368_CLK_SPI>;
412 resets = <&periph_rst BCM6368_RST_SPI>;
418 compatible = "brcm,bcm6368-ehci", "generic-ehci";
419 reg = <0x10001500 0x100>;
423 interrupt-parent = <&periph_intc>;
424 interrupts = <BCM6368_IRQ_EHCI>;
433 compatible = "brcm,bcm6368-ohci", "generic-ohci";
434 reg = <0x10001600 0x100>;
438 interrupt-parent = <&periph_intc>;
439 interrupts = <BCM6368_IRQ_OHCI>;
447 usbh: usb-phy@10001700 {
448 compatible = "brcm,bcm6368-usbh-phy";
449 reg = <0x10001700 0x38>;
453 clocks = <&periph_clk BCM6368_CLK_USBH>;
454 clock-names = "usbh";
456 resets = <&periph_rst BCM6368_RST_USBH>;
461 random: rng@10004180 {
462 compatible = "brcm,bcm6368-rng";
463 reg = <0x10004180 0x14>;
465 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
466 clock-names = "ipsec";
468 resets = <&periph_rst BCM6368_RST_IPSEC>;
472 pflash: nor@18000000 {
473 #address-cells = <1>;
475 compatible = "cfi-flash";
476 reg = <0x18000000 0x2000000>;