1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/reset/bcm6368-reset.h>
16 compatible = "brcm,bcm6368";
28 bootargs = "earlycon";
29 stdout-path = "serial0:115200n8";
33 periph_osc: periph-osc {
34 compatible = "fixed-clock";
38 clock-frequency = <50000000>;
39 clock-output-names = "periph";
46 mips-hpt-frequency = <200000000>;
49 compatible = "brcm,bmips4350", "mips,mips4Kc";
55 compatible = "brcm,bmips4350", "mips,mips4Kc";
61 cpu_intc: interrupt-controller {
63 compatible = "mti,cpu-interrupt-controller";
66 #interrupt-cells = <1>;
70 device_type = "memory";
78 compatible = "simple-bus";
81 periph_clk: clock-controller@10000004 {
82 compatible = "brcm,bcm6368-clocks";
83 reg = <0x10000004 0x4>;
87 pll_cntl: syscon@10000008 {
88 compatible = "syscon", "simple-mfd";
89 reg = <0x10000008 0x4>;
93 compatible = "syscon-reboot";
99 periph_rst: reset-controller@10000010 {
100 compatible = "brcm,bcm6345-reset";
101 reg = <0x10000010 0x4>;
105 ext_intc0: interrupt-controller@10000018 {
106 #address-cells = <1>;
107 compatible = "brcm,bcm6345-ext-intc";
108 reg = <0x10000018 0x4>;
110 interrupt-controller;
111 #interrupt-cells = <2>;
113 interrupt-parent = <&periph_intc>;
114 interrupts = <BCM6368_IRQ_EXT0>,
120 ext_intc1: interrupt-controller@1000001c {
121 #address-cells = <1>;
122 compatible = "brcm,bcm6345-ext-intc";
123 reg = <0x1000001c 0x4>;
125 interrupt-controller;
126 #interrupt-cells = <2>;
128 interrupt-parent = <&periph_intc>;
129 interrupts = <BCM6368_IRQ_EXT4>,
133 periph_intc: interrupt-controller@10000020 {
134 #address-cells = <1>;
135 compatible = "brcm,bcm6345-l1-intc";
136 reg = <0x10000020 0x10>,
139 interrupt-controller;
140 #interrupt-cells = <1>;
142 interrupt-parent = <&cpu_intc>;
143 interrupts = <2>, <3>;
146 wdt: watchdog@1000005c {
147 compatible = "brcm,bcm7038-wdt";
148 reg = <0x1000005c 0xc>;
150 clocks = <&periph_osc>;
155 gpio_cntl: syscon@10000080 {
156 #address-cells = <1>;
158 compatible = "brcm,bcm6368-gpio-sysctl",
159 "syscon", "simple-mfd";
160 reg = <0x10000080 0x80>;
161 ranges = <0 0x10000080 0x80>;
165 compatible = "brcm,bcm6368-gpio";
166 reg-names = "dirout", "dat";
167 reg = <0x0 0x8>, <0x8 0x8>;
170 gpio-ranges = <&pinctrl 0 0 38>;
174 pinctrl: pinctrl@18 {
175 compatible = "brcm,bcm6368-pinctrl";
176 reg = <0x18 0x4>, <0x38 0x4>;
178 pinctrl_analog_afe_0: analog_afe_0-pins {
179 function = "analog_afe_0";
183 pinctrl_analog_afe_1: analog_afe_1-pins {
184 function = "analog_afe_1";
188 pinctrl_sys_irq: sys_irq-pins {
189 function = "sys_irq";
193 pinctrl_serial_led: serial_led-pins {
194 pinctrl_serial_led_data: serial_led_data-pins {
195 function = "serial_led_data";
199 pinctrl_serial_led_clk: serial_led_clk-pins {
200 function = "serial_led_clk";
205 pinctrl_inet_led: inet_led-pins {
206 function = "inet_led";
210 pinctrl_ephy0_led: ephy0_led-pins {
211 function = "ephy0_led";
215 pinctrl_ephy1_led: ephy1_led-pins {
216 function = "ephy1_led";
220 pinctrl_ephy2_led: ephy2_led-pins {
221 function = "ephy2_led";
225 pinctrl_ephy3_led: ephy3_led-pins {
226 function = "ephy3_led";
230 pinctrl_robosw_led_data: robosw_led_data-pins {
231 function = "robosw_led_data";
235 pinctrl_robosw_led_clk: robosw_led_clk-pins {
236 function = "robosw_led_clk";
240 pinctrl_robosw_led0: robosw_led0-pins {
241 function = "robosw_led0";
245 pinctrl_robosw_led1: robosw_led1-pins {
246 function = "robosw_led1";
250 pinctrl_usb_device_led: usb_device_led-pins {
251 function = "usb_device_led";
255 pinctrl_pci: pci-pins {
256 pinctrl_pci_req1: pci_req1-pins {
257 function = "pci_req1";
261 pinctrl_pci_gnt1: pci_gnt1-pins {
262 function = "pci_gnt1";
266 pinctrl_pci_intb: pci_intb-pins {
267 function = "pci_intb";
271 pinctrl_pci_req0: pci_req0-pins {
272 function = "pci_req0";
276 pinctrl_pci_gnt0: pci_gnt0-pins {
277 function = "pci_gnt0";
282 pinctrl_pcmcia: pcmcia-pins {
283 pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
284 function = "pcmcia_cd1";
288 pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
289 function = "pcmcia_cd2";
293 pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
294 function = "pcmcia_vs1";
298 pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
299 function = "pcmcia_vs2";
304 pinctrl_ebi_cs2: ebi_cs2-pins {
305 function = "ebi_cs2";
309 pinctrl_ebi_cs3: ebi_cs3-pins {
310 function = "ebi_cs3";
314 pinctrl_spi_cs2: spi_cs2-pins {
315 function = "spi_cs2";
319 pinctrl_spi_cs3: spi_cs3-pins {
320 function = "spi_cs3";
324 pinctrl_spi_cs4: spi_cs4-pins {
325 function = "spi_cs4";
329 pinctrl_spi_cs5: spi_cs5-pins {
330 function = "spi_cs5";
334 pinctrl_uart1: uart1-pins {
341 leds: led-controller@100000d0 {
342 #address-cells = <1>;
344 compatible = "brcm,bcm6358-leds";
345 reg = <0x100000d0 0x8>;
350 uart0: serial@10000100 {
351 compatible = "brcm,bcm6345-uart";
352 reg = <0x10000100 0x18>;
354 interrupt-parent = <&periph_intc>;
355 interrupts = <BCM6368_IRQ_UART0>;
357 clocks = <&periph_osc>;
358 clock-names = "periph";
363 uart1: serial@10000120 {
364 compatible = "brcm,bcm6345-uart";
365 reg = <0x10000120 0x18>;
367 interrupt-parent = <&periph_intc>;
368 interrupts = <BCM6368_IRQ_UART1>;
370 clocks = <&periph_osc>;
371 clock-names = "periph";
376 nflash: nand@10000200 {
377 #address-cells = <1>;
379 compatible = "brcm,nand-bcm6368",
380 "brcm,brcmnand-v2.1",
382 reg = <0x10000200 0x180>,
389 interrupt-parent = <&periph_intc>;
390 interrupts = <BCM6368_IRQ_NAND>;
392 clocks = <&periph_clk BCM6368_CLK_NAND>;
393 clock-names = "nand";
398 lsspi: spi@10000800 {
399 #address-cells = <1>;
401 compatible = "brcm,bcm6358-spi";
402 reg = <0x10000800 0x70c>;
404 interrupt-parent = <&periph_intc>;
405 interrupts = <BCM6368_IRQ_SPI>;
407 clocks = <&periph_clk BCM6368_CLK_SPI>;
410 resets = <&periph_rst BCM6368_RST_SPI>;
416 compatible = "brcm,bcm6348-pci";
417 reg = <0x10001000 0x200>;
418 #address-cells = <3>;
422 bus-range = <0x00 0x01>;
423 ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
424 <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
425 linux,pci-probe-only = <1>;
427 interrupt-parent = <&periph_intc>;
428 interrupts = <BCM6368_IRQ_MPI>;
430 resets = <&periph_rst BCM6368_RST_MPI>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_pci>;
442 compatible = "brcm,bcm6368-ehci", "generic-ehci";
443 reg = <0x10001500 0x100>;
447 interrupt-parent = <&periph_intc>;
448 interrupts = <BCM6368_IRQ_EHCI>;
457 compatible = "brcm,bcm6368-ohci", "generic-ohci";
458 reg = <0x10001600 0x100>;
462 interrupt-parent = <&periph_intc>;
463 interrupts = <BCM6368_IRQ_OHCI>;
471 usbh: usb-phy@10001700 {
472 compatible = "brcm,bcm6368-usbh-phy";
473 reg = <0x10001700 0x38>;
477 clocks = <&periph_clk BCM6368_CLK_USBH>;
478 clock-names = "usbh";
480 resets = <&periph_rst BCM6368_RST_USBH>;
485 random: rng@10004180 {
486 compatible = "brcm,bcm6368-rng";
487 reg = <0x10004180 0x14>;
489 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
490 clock-names = "ipsec";
492 resets = <&periph_rst BCM6368_RST_IPSEC>;
495 ethernet: ethernet@10006800 {
496 compatible = "brcm,bcm6368-enetsw";
497 reg = <0x10006800 0x80>,
504 interrupt-parent = <&periph_intc>;
505 interrupts = <BCM6368_IRQ_ENETSW_RX_DMA0>,
506 <BCM6368_IRQ_ENETSW_TX_DMA0>;
507 interrupt-names = "rx",
510 clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
511 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
512 <&periph_clk BCM6368_CLK_ROBOSW>;
514 resets = <&periph_rst BCM6368_RST_SWITCH>,
515 <&periph_rst BCM6368_RST_EPHY>;
523 switch0: switch@10f00000 {
524 #address-cells = <1>;
526 compatible = "brcm,bcm6368-switch";
527 reg = <0x10f00000 0x8000>;
531 #address-cells = <1>;
537 phy-mode = "internal";
538 ethernet = <ðernet>;
548 mdio: mdio@10f000b0 {
549 #address-cells = <1>;
551 compatible = "brcm,bcm6368-mdio-mux";
552 reg = <0x10f000b0 0x8>;
555 #address-cells = <1>;
559 phy1: ethernet-phy@1 {
560 compatible = "ethernet-phy-ieee802.3-c22";
564 phy2: ethernet-phy@2 {
565 compatible = "ethernet-phy-ieee802.3-c22";
569 phy3: ethernet-phy@3 {
570 compatible = "ethernet-phy-ieee802.3-c22";
574 phy4: ethernet-phy@4 {
575 compatible = "ethernet-phy-ieee802.3-c22";
581 #address-cells = <1>;
588 pflash: nor@18000000 {
589 #address-cells = <1>;
591 compatible = "cfi-flash";
592 reg = <0x18000000 0x2000000>;