target/linux/bmips/patches-5.10/060-v5.13-dt-bindings-add-BCM6358-GPIO-sysctl-binding-document.patch

   1 From cfb1b98bc8d5ffd813428cb03c63b54cf63dd785 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 24 Mar 2021 09:19:10 +0100
   4 Subject: [PATCH 09/22] dt-bindings: add BCM6358 GPIO sysctl binding
   5  documentation
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Add binding documentation for the GPIO sysctl found in BCM6358 SoCs.
  11
  12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  13 Reviewed-by: Rob Herring <robh@kernel.org>
  14 Link: https://lore.kernel.org/r/20210324081923.20379-10-noltari@gmail.com
  15 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  16 ---
  17  .../mfd/brcm,bcm6358-gpio-sysctl.yaml         | 130 ++++++++++++++++++
  18  1 file changed, 130 insertions(+)
  19  create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
  20
  21 --- /dev/null
  22 +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
  23 @@ -0,0 +1,130 @@
  24 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  25 +%YAML 1.2
  26 +---
  27 +$id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
  28 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  29 +
  30 +title: Broadcom BCM6358 GPIO System Controller Device Tree Bindings
  31 +
  32 +maintainers:
  33 +  - Álvaro Fernández Rojas <noltari@gmail.com>
  34 +  - Jonas Gorski <jonas.gorski@gmail.com>
  35 +
  36 +description:
  37 +  Broadcom BCM6358 SoC GPIO system controller which provides a register map
  38 +  for controlling the GPIO and pins of the SoC.
  39 +
  40 +properties:
  41 +  "#address-cells": true
  42 +
  43 +  "#size-cells": true
  44 +
  45 +  compatible:
  46 +    items:
  47 +      - const: brcm,bcm6358-gpio-sysctl
  48 +      - const: syscon
  49 +      - const: simple-mfd
  50 +
  51 +  ranges:
  52 +    maxItems: 1
  53 +
  54 +  reg:
  55 +    maxItems: 1
  56 +
  57 +patternProperties:
  58 +  "^gpio@[0-9a-f]+$":
  59 +    # Child node
  60 +    type: object
  61 +    $ref: "../gpio/brcm,bcm6345-gpio.yaml"
  62 +    description:
  63 +      GPIO controller for the SoC GPIOs. This child node definition
  64 +      should follow the bindings specified in
  65 +      Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
  66 +
  67 +  "^pinctrl@[0-9a-f]+$":
  68 +    # Child node
  69 +    type: object
  70 +    $ref: "../pinctrl/brcm,bcm6358-pinctrl.yaml"
  71 +    description:
  72 +      Pin controller for the SoC pins. This child node definition
  73 +      should follow the bindings specified in
  74 +      Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml.
  75 +
  76 +required:
  77 +  - "#address-cells"
  78 +  - compatible
  79 +  - ranges
  80 +  - reg
  81 +  - "#size-cells"
  82 +
  83 +additionalProperties: false
  84 +
  85 +examples:
  86 +  - |
  87 +    syscon@fffe0080 {
  88 +      #address-cells = <1>;
  89 +      #size-cells = <1>;
  90 +      compatible = "brcm,bcm6358-gpio-sysctl", "syscon", "simple-mfd";
  91 +      reg = <0xfffe0080 0x80>;
  92 +      ranges = <0 0xfffe0080 0x80>;
  93 +
  94 +      gpio@0 {
  95 +        compatible = "brcm,bcm6358-gpio";
  96 +        reg-names = "dirout", "dat";
  97 +        reg = <0x0 0x8>, <0x8 0x8>;
  98 +
  99 +        gpio-controller;
 100 +        gpio-ranges = <&pinctrl 0 0 40>;
 101 +        #gpio-cells = <2>;
 102 +      };
 103 +
 104 +      pinctrl: pinctrl@18 {
 105 +        compatible = "brcm,bcm6358-pinctrl";
 106 +        reg = <0x18 0x4>;
 107 +
 108 +        pinctrl_ebi_cs: ebi_cs-pins {
 109 +          function = "ebi_cs";
 110 +          groups = "ebi_cs_grp";
 111 +        };
 112 +
 113 +        pinctrl_uart1: uart1-pins {
 114 +          function = "uart1";
 115 +          groups = "uart1_grp";
 116 +        };
 117 +
 118 +        pinctrl_serial_led: serial_led-pins {
 119 +          function = "serial_led";
 120 +          groups = "serial_led_grp";
 121 +        };
 122 +
 123 +        pinctrl_legacy_led: legacy_led-pins {
 124 +          function = "legacy_led";
 125 +          groups = "legacy_led_grp";
 126 +        };
 127 +
 128 +        pinctrl_led: led-pins {
 129 +          function = "led";
 130 +          groups = "led_grp";
 131 +        };
 132 +
 133 +        pinctrl_spi_cs_23: spi_cs-pins {
 134 +          function = "spi_cs";
 135 +          groups = "spi_cs_grp";
 136 +        };
 137 +
 138 +        pinctrl_utopia: utopia-pins {
 139 +          function = "utopia";
 140 +          groups = "utopia_grp";
 141 +        };
 142 +
 143 +        pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
 144 +          function = "pwm_syn_clk";
 145 +          groups = "pwm_syn_clk_grp";
 146 +        };
 147 +
 148 +        pinctrl_sys_irq: sys_irq-pins {
 149 +          function = "sys_irq";
 150 +          groups = "sys_irq_grp";
 151 +        };
 152 +      };
 153 +    };