target/linux/bmips/patches-5.10/067-v5.13-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch

   1 From 50554accf7a79980cd04481e8903073bdb706daf Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 24 Mar 2021 09:19:17 +0100
   4 Subject: [PATCH 16/22] pinctrl: add a pincontrol driver for BCM6368
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
  10 GPIOs onto alternative functions. Not all are documented.
  11
  12 Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
  13 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  14 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  15 Link: https://lore.kernel.org/r/20210324081923.20379-17-noltari@gmail.com
  16 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  17 ---
  18  drivers/pinctrl/bcm/Kconfig           |   8 +
  19  drivers/pinctrl/bcm/Makefile          |   1 +
  20  drivers/pinctrl/bcm/pinctrl-bcm6368.c | 523 ++++++++++++++++++++++++++
  21  3 files changed, 532 insertions(+)
  22  create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6368.c
  23
  24 --- a/drivers/pinctrl/bcm/Kconfig
  25 +++ b/drivers/pinctrl/bcm/Kconfig
  26 @@ -60,6 +60,14 @@ config PINCTRL_BCM6362
  27         help
  28            Say Y here to enable the Broadcom BCM6362 GPIO driver.
  29
  30 +config PINCTRL_BCM6368
  31 +       bool "Broadcom BCM6368 GPIO driver"
  32 +       depends on (BMIPS_GENERIC || COMPILE_TEST)
  33 +       select PINCTRL_BCM63XX
  34 +       default BMIPS_GENERIC
  35 +       help
  36 +          Say Y here to enable the Broadcom BCM6368 GPIO driver.
  37 +
  38  config PINCTRL_IPROC_GPIO
  39         bool "Broadcom iProc GPIO (with PINCONF) driver"
  40         depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
  41 --- a/drivers/pinctrl/bcm/Makefile
  42 +++ b/drivers/pinctrl/bcm/Makefile
  43 @@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_BCM63XX)           += pinctr
  44  obj-$(CONFIG_PINCTRL_BCM6328)          += pinctrl-bcm6328.o
  45  obj-$(CONFIG_PINCTRL_BCM6358)          += pinctrl-bcm6358.o
  46  obj-$(CONFIG_PINCTRL_BCM6362)          += pinctrl-bcm6362.o
  47 +obj-$(CONFIG_PINCTRL_BCM6368)          += pinctrl-bcm6368.o
  48  obj-$(CONFIG_PINCTRL_IPROC_GPIO)       += pinctrl-iproc-gpio.o
  49  obj-$(CONFIG_PINCTRL_CYGNUS_MUX)       += pinctrl-cygnus-mux.o
  50  obj-$(CONFIG_PINCTRL_NS)               += pinctrl-ns.o
  51 --- /dev/null
  52 +++ b/drivers/pinctrl/bcm/pinctrl-bcm6368.c
  53 @@ -0,0 +1,523 @@
  54 +// SPDX-License-Identifier: GPL-2.0+
  55 +/*
  56 + * Driver for BCM6368 GPIO unit (pinctrl + GPIO)
  57 + *
  58 + * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
  59 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
  60 + */
  61 +
  62 +#include <linux/bits.h>
  63 +#include <linux/gpio/driver.h>
  64 +#include <linux/kernel.h>
  65 +#include <linux/of.h>
  66 +#include <linux/pinctrl/pinmux.h>
  67 +#include <linux/platform_device.h>
  68 +#include <linux/regmap.h>
  69 +
  70 +#include "../pinctrl-utils.h"
  71 +
  72 +#include "pinctrl-bcm63xx.h"
  73 +
  74 +#define BCM6368_NUM_GPIOS      38
  75 +
  76 +#define BCM6368_MODE_REG       0x18
  77 +#define BCM6368_BASEMODE_REG   0x38
  78 +#define  BCM6368_BASEMODE_MASK 0x7
  79 +#define  BCM6368_BASEMODE_GPIO 0x0
  80 +#define  BCM6368_BASEMODE_UART1        0x1
  81 +
  82 +struct bcm6368_pingroup {
  83 +       const char *name;
  84 +       const unsigned * const pins;
  85 +       const unsigned num_pins;
  86 +};
  87 +
  88 +struct bcm6368_function {
  89 +       const char *name;
  90 +       const char * const *groups;
  91 +       const unsigned num_groups;
  92 +
  93 +       unsigned dir_out:16;
  94 +       unsigned basemode:3;
  95 +};
  96 +
  97 +struct bcm6368_priv {
  98 +       struct regmap_field *overlays;
  99 +};
 100 +
 101 +#define BCM6368_BASEMODE_PIN(a, b)             \
 102 +       {                                       \
 103 +               .number = a,                    \
 104 +               .name = b,                      \
 105 +               .drv_data = (void *)true        \
 106 +       }
 107 +
 108 +static const struct pinctrl_pin_desc bcm6368_pins[] = {
 109 +       PINCTRL_PIN(0, "gpio0"),
 110 +       PINCTRL_PIN(1, "gpio1"),
 111 +       PINCTRL_PIN(2, "gpio2"),
 112 +       PINCTRL_PIN(3, "gpio3"),
 113 +       PINCTRL_PIN(4, "gpio4"),
 114 +       PINCTRL_PIN(5, "gpio5"),
 115 +       PINCTRL_PIN(6, "gpio6"),
 116 +       PINCTRL_PIN(7, "gpio7"),
 117 +       PINCTRL_PIN(8, "gpio8"),
 118 +       PINCTRL_PIN(9, "gpio9"),
 119 +       PINCTRL_PIN(10, "gpio10"),
 120 +       PINCTRL_PIN(11, "gpio11"),
 121 +       PINCTRL_PIN(12, "gpio12"),
 122 +       PINCTRL_PIN(13, "gpio13"),
 123 +       PINCTRL_PIN(14, "gpio14"),
 124 +       PINCTRL_PIN(15, "gpio15"),
 125 +       PINCTRL_PIN(16, "gpio16"),
 126 +       PINCTRL_PIN(17, "gpio17"),
 127 +       PINCTRL_PIN(18, "gpio18"),
 128 +       PINCTRL_PIN(19, "gpio19"),
 129 +       PINCTRL_PIN(20, "gpio20"),
 130 +       PINCTRL_PIN(21, "gpio21"),
 131 +       PINCTRL_PIN(22, "gpio22"),
 132 +       PINCTRL_PIN(23, "gpio23"),
 133 +       PINCTRL_PIN(24, "gpio24"),
 134 +       PINCTRL_PIN(25, "gpio25"),
 135 +       PINCTRL_PIN(26, "gpio26"),
 136 +       PINCTRL_PIN(27, "gpio27"),
 137 +       PINCTRL_PIN(28, "gpio28"),
 138 +       PINCTRL_PIN(29, "gpio29"),
 139 +       BCM6368_BASEMODE_PIN(30, "gpio30"),
 140 +       BCM6368_BASEMODE_PIN(31, "gpio31"),
 141 +       BCM6368_BASEMODE_PIN(32, "gpio32"),
 142 +       BCM6368_BASEMODE_PIN(33, "gpio33"),
 143 +       PINCTRL_PIN(34, "gpio34"),
 144 +       PINCTRL_PIN(35, "gpio35"),
 145 +       PINCTRL_PIN(36, "gpio36"),
 146 +       PINCTRL_PIN(37, "gpio37"),
 147 +};
 148 +
 149 +static unsigned gpio0_pins[] = { 0 };
 150 +static unsigned gpio1_pins[] = { 1 };
 151 +static unsigned gpio2_pins[] = { 2 };
 152 +static unsigned gpio3_pins[] = { 3 };
 153 +static unsigned gpio4_pins[] = { 4 };
 154 +static unsigned gpio5_pins[] = { 5 };
 155 +static unsigned gpio6_pins[] = { 6 };
 156 +static unsigned gpio7_pins[] = { 7 };
 157 +static unsigned gpio8_pins[] = { 8 };
 158 +static unsigned gpio9_pins[] = { 9 };
 159 +static unsigned gpio10_pins[] = { 10 };
 160 +static unsigned gpio11_pins[] = { 11 };
 161 +static unsigned gpio12_pins[] = { 12 };
 162 +static unsigned gpio13_pins[] = { 13 };
 163 +static unsigned gpio14_pins[] = { 14 };
 164 +static unsigned gpio15_pins[] = { 15 };
 165 +static unsigned gpio16_pins[] = { 16 };
 166 +static unsigned gpio17_pins[] = { 17 };
 167 +static unsigned gpio18_pins[] = { 18 };
 168 +static unsigned gpio19_pins[] = { 19 };
 169 +static unsigned gpio20_pins[] = { 20 };
 170 +static unsigned gpio21_pins[] = { 21 };
 171 +static unsigned gpio22_pins[] = { 22 };
 172 +static unsigned gpio23_pins[] = { 23 };
 173 +static unsigned gpio24_pins[] = { 24 };
 174 +static unsigned gpio25_pins[] = { 25 };
 175 +static unsigned gpio26_pins[] = { 26 };
 176 +static unsigned gpio27_pins[] = { 27 };
 177 +static unsigned gpio28_pins[] = { 28 };
 178 +static unsigned gpio29_pins[] = { 29 };
 179 +static unsigned gpio30_pins[] = { 30 };
 180 +static unsigned gpio31_pins[] = { 31 };
 181 +static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
 182 +
 183 +#define BCM6368_GROUP(n)                               \
 184 +       {                                               \
 185 +               .name = #n,                             \
 186 +               .pins = n##_pins,                       \
 187 +               .num_pins = ARRAY_SIZE(n##_pins),       \
 188 +       }
 189 +
 190 +static struct bcm6368_pingroup bcm6368_groups[] = {
 191 +       BCM6368_GROUP(gpio0),
 192 +       BCM6368_GROUP(gpio1),
 193 +       BCM6368_GROUP(gpio2),
 194 +       BCM6368_GROUP(gpio3),
 195 +       BCM6368_GROUP(gpio4),
 196 +       BCM6368_GROUP(gpio5),
 197 +       BCM6368_GROUP(gpio6),
 198 +       BCM6368_GROUP(gpio7),
 199 +       BCM6368_GROUP(gpio8),
 200 +       BCM6368_GROUP(gpio9),
 201 +       BCM6368_GROUP(gpio10),
 202 +       BCM6368_GROUP(gpio11),
 203 +       BCM6368_GROUP(gpio12),
 204 +       BCM6368_GROUP(gpio13),
 205 +       BCM6368_GROUP(gpio14),
 206 +       BCM6368_GROUP(gpio15),
 207 +       BCM6368_GROUP(gpio16),
 208 +       BCM6368_GROUP(gpio17),
 209 +       BCM6368_GROUP(gpio18),
 210 +       BCM6368_GROUP(gpio19),
 211 +       BCM6368_GROUP(gpio20),
 212 +       BCM6368_GROUP(gpio21),
 213 +       BCM6368_GROUP(gpio22),
 214 +       BCM6368_GROUP(gpio23),
 215 +       BCM6368_GROUP(gpio24),
 216 +       BCM6368_GROUP(gpio25),
 217 +       BCM6368_GROUP(gpio26),
 218 +       BCM6368_GROUP(gpio27),
 219 +       BCM6368_GROUP(gpio28),
 220 +       BCM6368_GROUP(gpio29),
 221 +       BCM6368_GROUP(gpio30),
 222 +       BCM6368_GROUP(gpio31),
 223 +       BCM6368_GROUP(uart1_grp),
 224 +};
 225 +
 226 +static const char * const analog_afe_0_groups[] = {
 227 +       "gpio0",
 228 +};
 229 +
 230 +static const char * const analog_afe_1_groups[] = {
 231 +       "gpio1",
 232 +};
 233 +
 234 +static const char * const sys_irq_groups[] = {
 235 +       "gpio2",
 236 +};
 237 +
 238 +static const char * const serial_led_data_groups[] = {
 239 +       "gpio3",
 240 +};
 241 +
 242 +static const char * const serial_led_clk_groups[] = {
 243 +       "gpio4",
 244 +};
 245 +
 246 +static const char * const inet_led_groups[] = {
 247 +       "gpio5",
 248 +};
 249 +
 250 +static const char * const ephy0_led_groups[] = {
 251 +       "gpio6",
 252 +};
 253 +
 254 +static const char * const ephy1_led_groups[] = {
 255 +       "gpio7",
 256 +};
 257 +
 258 +static const char * const ephy2_led_groups[] = {
 259 +       "gpio8",
 260 +};
 261 +
 262 +static const char * const ephy3_led_groups[] = {
 263 +       "gpio9",
 264 +};
 265 +
 266 +static const char * const robosw_led_data_groups[] = {
 267 +       "gpio10",
 268 +};
 269 +
 270 +static const char * const robosw_led_clk_groups[] = {
 271 +       "gpio11",
 272 +};
 273 +
 274 +static const char * const robosw_led0_groups[] = {
 275 +       "gpio12",
 276 +};
 277 +
 278 +static const char * const robosw_led1_groups[] = {
 279 +       "gpio13",
 280 +};
 281 +
 282 +static const char * const usb_device_led_groups[] = {
 283 +       "gpio14",
 284 +};
 285 +
 286 +static const char * const pci_req1_groups[] = {
 287 +       "gpio16",
 288 +};
 289 +
 290 +static const char * const pci_gnt1_groups[] = {
 291 +       "gpio17",
 292 +};
 293 +
 294 +static const char * const pci_intb_groups[] = {
 295 +       "gpio18",
 296 +};
 297 +
 298 +static const char * const pci_req0_groups[] = {
 299 +       "gpio19",
 300 +};
 301 +
 302 +static const char * const pci_gnt0_groups[] = {
 303 +       "gpio20",
 304 +};
 305 +
 306 +static const char * const pcmcia_cd1_groups[] = {
 307 +       "gpio22",
 308 +};
 309 +
 310 +static const char * const pcmcia_cd2_groups[] = {
 311 +       "gpio23",
 312 +};
 313 +
 314 +static const char * const pcmcia_vs1_groups[] = {
 315 +       "gpio24",
 316 +};
 317 +
 318 +static const char * const pcmcia_vs2_groups[] = {
 319 +       "gpio25",
 320 +};
 321 +
 322 +static const char * const ebi_cs2_groups[] = {
 323 +       "gpio26",
 324 +};
 325 +
 326 +static const char * const ebi_cs3_groups[] = {
 327 +       "gpio27",
 328 +};
 329 +
 330 +static const char * const spi_cs2_groups[] = {
 331 +       "gpio28",
 332 +};
 333 +
 334 +static const char * const spi_cs3_groups[] = {
 335 +       "gpio29",
 336 +};
 337 +
 338 +static const char * const spi_cs4_groups[] = {
 339 +       "gpio30",
 340 +};
 341 +
 342 +static const char * const spi_cs5_groups[] = {
 343 +       "gpio31",
 344 +};
 345 +
 346 +static const char * const uart1_groups[] = {
 347 +       "uart1_grp",
 348 +};
 349 +
 350 +#define BCM6368_FUN(n, out)                            \
 351 +       {                                               \
 352 +               .name = #n,                             \
 353 +               .groups = n##_groups,                   \
 354 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 355 +               .dir_out = out,                         \
 356 +       }
 357 +
 358 +#define BCM6368_BASEMODE_FUN(n, val, out)              \
 359 +       {                                               \
 360 +               .name = #n,                             \
 361 +               .groups = n##_groups,                   \
 362 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 363 +               .basemode = BCM6368_BASEMODE_##val,     \
 364 +               .dir_out = out,                         \
 365 +       }
 366 +
 367 +static const struct bcm6368_function bcm6368_funcs[] = {
 368 +       BCM6368_FUN(analog_afe_0, 1),
 369 +       BCM6368_FUN(analog_afe_1, 1),
 370 +       BCM6368_FUN(sys_irq, 1),
 371 +       BCM6368_FUN(serial_led_data, 1),
 372 +       BCM6368_FUN(serial_led_clk, 1),
 373 +       BCM6368_FUN(inet_led, 1),
 374 +       BCM6368_FUN(ephy0_led, 1),
 375 +       BCM6368_FUN(ephy1_led, 1),
 376 +       BCM6368_FUN(ephy2_led, 1),
 377 +       BCM6368_FUN(ephy3_led, 1),
 378 +       BCM6368_FUN(robosw_led_data, 1),
 379 +       BCM6368_FUN(robosw_led_clk, 1),
 380 +       BCM6368_FUN(robosw_led0, 1),
 381 +       BCM6368_FUN(robosw_led1, 1),
 382 +       BCM6368_FUN(usb_device_led, 1),
 383 +       BCM6368_FUN(pci_req1, 0),
 384 +       BCM6368_FUN(pci_gnt1, 0),
 385 +       BCM6368_FUN(pci_intb, 0),
 386 +       BCM6368_FUN(pci_req0, 0),
 387 +       BCM6368_FUN(pci_gnt0, 0),
 388 +       BCM6368_FUN(pcmcia_cd1, 0),
 389 +       BCM6368_FUN(pcmcia_cd2, 0),
 390 +       BCM6368_FUN(pcmcia_vs1, 0),
 391 +       BCM6368_FUN(pcmcia_vs2, 0),
 392 +       BCM6368_FUN(ebi_cs2, 1),
 393 +       BCM6368_FUN(ebi_cs3, 1),
 394 +       BCM6368_FUN(spi_cs2, 1),
 395 +       BCM6368_FUN(spi_cs3, 1),
 396 +       BCM6368_FUN(spi_cs4, 1),
 397 +       BCM6368_FUN(spi_cs5, 1),
 398 +       BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
 399 +};
 400 +
 401 +static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 402 +{
 403 +       return ARRAY_SIZE(bcm6368_groups);
 404 +}
 405 +
 406 +static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 407 +                                                 unsigned group)
 408 +{
 409 +       return bcm6368_groups[group].name;
 410 +}
 411 +
 412 +static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 413 +                                         unsigned group, const unsigned **pins,
 414 +                                         unsigned *num_pins)
 415 +{
 416 +       *pins = bcm6368_groups[group].pins;
 417 +       *num_pins = bcm6368_groups[group].num_pins;
 418 +
 419 +       return 0;
 420 +}
 421 +
 422 +static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
 423 +{
 424 +       return ARRAY_SIZE(bcm6368_funcs);
 425 +}
 426 +
 427 +static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 428 +                                                unsigned selector)
 429 +{
 430 +       return bcm6368_funcs[selector].name;
 431 +}
 432 +
 433 +static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
 434 +                                     unsigned selector,
 435 +                                     const char * const **groups,
 436 +                                     unsigned * const num_groups)
 437 +{
 438 +       *groups = bcm6368_funcs[selector].groups;
 439 +       *num_groups = bcm6368_funcs[selector].num_groups;
 440 +
 441 +       return 0;
 442 +}
 443 +
 444 +static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 445 +                                  unsigned selector, unsigned group)
 446 +{
 447 +       struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 448 +       struct bcm6368_priv *priv = pc->driver_data;
 449 +       const struct bcm6368_pingroup *pg = &bcm6368_groups[group];
 450 +       const struct bcm6368_function *fun = &bcm6368_funcs[selector];
 451 +       int i, pin;
 452 +
 453 +       if (fun->basemode) {
 454 +               unsigned int mask = 0;
 455 +
 456 +               for (i = 0; i < pg->num_pins; i++) {
 457 +                       pin = pg->pins[i];
 458 +                       if (pin < BCM63XX_BANK_GPIOS)
 459 +                               mask |= BIT(pin);
 460 +               }
 461 +
 462 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
 463 +               regmap_field_write(priv->overlays, fun->basemode);
 464 +       } else {
 465 +               pin = pg->pins[0];
 466 +
 467 +               if (bcm6368_pins[pin].drv_data)
 468 +                       regmap_field_write(priv->overlays,
 469 +                                          BCM6368_BASEMODE_GPIO);
 470 +
 471 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
 472 +                                  BIT(pin));
 473 +       }
 474 +
 475 +       for (pin = 0; pin < pg->num_pins; pin++) {
 476 +               struct pinctrl_gpio_range *range;
 477 +               int hw_gpio = bcm6368_pins[pin].number;
 478 +
 479 +               range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
 480 +               if (range) {
 481 +                       struct gpio_chip *gc = range->gc;
 482 +
 483 +                       if (fun->dir_out & BIT(pin))
 484 +                               gc->direction_output(gc, hw_gpio, 0);
 485 +                       else
 486 +                               gc->direction_input(gc, hw_gpio);
 487 +               }
 488 +       }
 489 +
 490 +       return 0;
 491 +}
 492 +
 493 +static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
 494 +                                      struct pinctrl_gpio_range *range,
 495 +                                      unsigned offset)
 496 +{
 497 +       struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
 498 +       struct bcm6368_priv *priv = pc->driver_data;
 499 +
 500 +       if (offset >= BCM63XX_BANK_GPIOS && !bcm6368_pins[offset].drv_data)
 501 +               return 0;
 502 +
 503 +       /* disable all functions using this pin */
 504 +       if (offset < BCM63XX_BANK_GPIOS)
 505 +               regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
 506 +
 507 +       if (bcm6368_pins[offset].drv_data)
 508 +               regmap_field_write(priv->overlays, BCM6368_BASEMODE_GPIO);
 509 +
 510 +       return 0;
 511 +}
 512 +
 513 +static struct pinctrl_ops bcm6368_pctl_ops = {
 514 +       .dt_free_map = pinctrl_utils_free_map,
 515 +       .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 516 +       .get_group_name = bcm6368_pinctrl_get_group_name,
 517 +       .get_group_pins = bcm6368_pinctrl_get_group_pins,
 518 +       .get_groups_count = bcm6368_pinctrl_get_group_count,
 519 +};
 520 +
 521 +static struct pinmux_ops bcm6368_pmx_ops = {
 522 +       .get_function_groups = bcm6368_pinctrl_get_groups,
 523 +       .get_function_name = bcm6368_pinctrl_get_func_name,
 524 +       .get_functions_count = bcm6368_pinctrl_get_func_count,
 525 +       .gpio_request_enable = bcm6368_gpio_request_enable,
 526 +       .set_mux = bcm6368_pinctrl_set_mux,
 527 +       .strict = true,
 528 +};
 529 +
 530 +static const struct bcm63xx_pinctrl_soc bcm6368_soc = {
 531 +       .ngpios = BCM6368_NUM_GPIOS,
 532 +       .npins = ARRAY_SIZE(bcm6368_pins),
 533 +       .pctl_ops = &bcm6368_pctl_ops,
 534 +       .pins = bcm6368_pins,
 535 +       .pmx_ops = &bcm6368_pmx_ops,
 536 +};
 537 +
 538 +static int bcm6368_pinctrl_probe(struct platform_device *pdev)
 539 +{
 540 +       struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
 541 +       struct device *dev = &pdev->dev;
 542 +       struct bcm63xx_pinctrl *pc;
 543 +       struct bcm6368_priv *priv;
 544 +       int err;
 545 +
 546 +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 547 +       if (!priv)
 548 +               return -ENOMEM;
 549 +
 550 +       err = bcm63xx_pinctrl_probe(pdev, &bcm6368_soc, (void *) priv);
 551 +       if (err)
 552 +               return err;
 553 +
 554 +       pc = platform_get_drvdata(pdev);
 555 +
 556 +       priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
 557 +       if (IS_ERR(priv->overlays))
 558 +               return PTR_ERR(priv->overlays);
 559 +
 560 +       return 0;
 561 +}
 562 +
 563 +static const struct of_device_id bcm6368_pinctrl_match[] = {
 564 +       { .compatible = "brcm,bcm6368-pinctrl", },
 565 +       { /* sentinel */ }
 566 +};
 567 +
 568 +static struct platform_driver bcm6368_pinctrl_driver = {
 569 +       .probe = bcm6368_pinctrl_probe,
 570 +       .driver = {
 571 +               .name = "bcm6368-pinctrl",
 572 +               .of_match_table = bcm6368_pinctrl_match,
 573 +       },
 574 +};
 575 +
 576 +builtin_platform_driver(bcm6368_pinctrl_driver);