afd8d9e1fa8d757941a40ea6cac2d9df901070f1
[openwrt/staging/dedeckeh.git] / target / linux / bmips / patches-5.10 / 073-v5.13-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch
1 From d28039fccf948a407de69106465caa465b1dcf32 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
3 Date: Wed, 24 Mar 2021 09:19:23 +0100
4 Subject: [PATCH 22/22] pinctrl: add a pincontrol driver for BCM6318
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
10 to different functions. BCM6318 is similar to BCM6328 with the addition
11 of a pad register, and the GPIO meaning of the mux register changes
12 based on the GPIO number.
13
14 Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
15 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
16 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
17 Link: https://lore.kernel.org/r/20210324081923.20379-23-noltari@gmail.com
18 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
19 ---
20 drivers/pinctrl/bcm/Kconfig | 8 +
21 drivers/pinctrl/bcm/Makefile | 1 +
22 drivers/pinctrl/bcm/pinctrl-bcm6318.c | 498 ++++++++++++++++++++++++++
23 3 files changed, 507 insertions(+)
24 create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm6318.c
25
26 --- a/drivers/pinctrl/bcm/Kconfig
27 +++ b/drivers/pinctrl/bcm/Kconfig
28 @@ -36,6 +36,14 @@ config PINCTRL_BCM63XX
29 select PINCONF
30 select PINMUX
31
32 +config PINCTRL_BCM6318
33 + bool "Broadcom BCM6318 GPIO driver"
34 + depends on (BMIPS_GENERIC || COMPILE_TEST)
35 + select PINCTRL_BCM63XX
36 + default BMIPS_GENERIC
37 + help
38 + Say Y here to enable the Broadcom BCM6318 GPIO driver.
39 +
40 config PINCTRL_BCM6328
41 bool "Broadcom BCM6328 GPIO driver"
42 depends on (BMIPS_GENERIC || COMPILE_TEST)
43 --- a/drivers/pinctrl/bcm/Makefile
44 +++ b/drivers/pinctrl/bcm/Makefile
45 @@ -4,6 +4,7 @@
46 obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
47 obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
48 obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
49 +obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
50 obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
51 obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
52 obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
53 --- /dev/null
54 +++ b/drivers/pinctrl/bcm/pinctrl-bcm6318.c
55 @@ -0,0 +1,498 @@
56 +// SPDX-License-Identifier: GPL-2.0+
57 +/*
58 + * Driver for BCM6318 GPIO unit (pinctrl + GPIO)
59 + *
60 + * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
61 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
62 + */
63 +
64 +#include <linux/bits.h>
65 +#include <linux/gpio/driver.h>
66 +#include <linux/kernel.h>
67 +#include <linux/of.h>
68 +#include <linux/pinctrl/pinmux.h>
69 +#include <linux/platform_device.h>
70 +#include <linux/regmap.h>
71 +
72 +#include "../pinctrl-utils.h"
73 +
74 +#include "pinctrl-bcm63xx.h"
75 +
76 +#define BCM6318_NUM_GPIOS 50
77 +#define BCM6318_NUM_MUX 48
78 +
79 +#define BCM6318_MODE_REG 0x18
80 +#define BCM6318_MUX_REG 0x1c
81 +#define BCM6328_MUX_MASK GENMASK(1, 0)
82 +#define BCM6318_PAD_REG 0x54
83 +#define BCM6328_PAD_MASK GENMASK(3, 0)
84 +
85 +struct bcm6318_pingroup {
86 + const char *name;
87 + const unsigned * const pins;
88 + const unsigned num_pins;
89 +};
90 +
91 +struct bcm6318_function {
92 + const char *name;
93 + const char * const *groups;
94 + const unsigned num_groups;
95 +
96 + unsigned mode_val:1;
97 + unsigned mux_val:2;
98 +};
99 +
100 +static const struct pinctrl_pin_desc bcm6318_pins[] = {
101 + PINCTRL_PIN(0, "gpio0"),
102 + PINCTRL_PIN(1, "gpio1"),
103 + PINCTRL_PIN(2, "gpio2"),
104 + PINCTRL_PIN(3, "gpio3"),
105 + PINCTRL_PIN(4, "gpio4"),
106 + PINCTRL_PIN(5, "gpio5"),
107 + PINCTRL_PIN(6, "gpio6"),
108 + PINCTRL_PIN(7, "gpio7"),
109 + PINCTRL_PIN(8, "gpio8"),
110 + PINCTRL_PIN(9, "gpio9"),
111 + PINCTRL_PIN(10, "gpio10"),
112 + PINCTRL_PIN(11, "gpio11"),
113 + PINCTRL_PIN(12, "gpio12"),
114 + PINCTRL_PIN(13, "gpio13"),
115 + PINCTRL_PIN(14, "gpio14"),
116 + PINCTRL_PIN(15, "gpio15"),
117 + PINCTRL_PIN(16, "gpio16"),
118 + PINCTRL_PIN(17, "gpio17"),
119 + PINCTRL_PIN(18, "gpio18"),
120 + PINCTRL_PIN(19, "gpio19"),
121 + PINCTRL_PIN(20, "gpio20"),
122 + PINCTRL_PIN(21, "gpio21"),
123 + PINCTRL_PIN(22, "gpio22"),
124 + PINCTRL_PIN(23, "gpio23"),
125 + PINCTRL_PIN(24, "gpio24"),
126 + PINCTRL_PIN(25, "gpio25"),
127 + PINCTRL_PIN(26, "gpio26"),
128 + PINCTRL_PIN(27, "gpio27"),
129 + PINCTRL_PIN(28, "gpio28"),
130 + PINCTRL_PIN(29, "gpio29"),
131 + PINCTRL_PIN(30, "gpio30"),
132 + PINCTRL_PIN(31, "gpio31"),
133 + PINCTRL_PIN(32, "gpio32"),
134 + PINCTRL_PIN(33, "gpio33"),
135 + PINCTRL_PIN(34, "gpio34"),
136 + PINCTRL_PIN(35, "gpio35"),
137 + PINCTRL_PIN(36, "gpio36"),
138 + PINCTRL_PIN(37, "gpio37"),
139 + PINCTRL_PIN(38, "gpio38"),
140 + PINCTRL_PIN(39, "gpio39"),
141 + PINCTRL_PIN(40, "gpio40"),
142 + PINCTRL_PIN(41, "gpio41"),
143 + PINCTRL_PIN(42, "gpio42"),
144 + PINCTRL_PIN(43, "gpio43"),
145 + PINCTRL_PIN(44, "gpio44"),
146 + PINCTRL_PIN(45, "gpio45"),
147 + PINCTRL_PIN(46, "gpio46"),
148 + PINCTRL_PIN(47, "gpio47"),
149 + PINCTRL_PIN(48, "gpio48"),
150 + PINCTRL_PIN(49, "gpio49"),
151 +};
152 +
153 +static unsigned gpio0_pins[] = { 0 };
154 +static unsigned gpio1_pins[] = { 1 };
155 +static unsigned gpio2_pins[] = { 2 };
156 +static unsigned gpio3_pins[] = { 3 };
157 +static unsigned gpio4_pins[] = { 4 };
158 +static unsigned gpio5_pins[] = { 5 };
159 +static unsigned gpio6_pins[] = { 6 };
160 +static unsigned gpio7_pins[] = { 7 };
161 +static unsigned gpio8_pins[] = { 8 };
162 +static unsigned gpio9_pins[] = { 9 };
163 +static unsigned gpio10_pins[] = { 10 };
164 +static unsigned gpio11_pins[] = { 11 };
165 +static unsigned gpio12_pins[] = { 12 };
166 +static unsigned gpio13_pins[] = { 13 };
167 +static unsigned gpio14_pins[] = { 14 };
168 +static unsigned gpio15_pins[] = { 15 };
169 +static unsigned gpio16_pins[] = { 16 };
170 +static unsigned gpio17_pins[] = { 17 };
171 +static unsigned gpio18_pins[] = { 18 };
172 +static unsigned gpio19_pins[] = { 19 };
173 +static unsigned gpio20_pins[] = { 20 };
174 +static unsigned gpio21_pins[] = { 21 };
175 +static unsigned gpio22_pins[] = { 22 };
176 +static unsigned gpio23_pins[] = { 23 };
177 +static unsigned gpio24_pins[] = { 24 };
178 +static unsigned gpio25_pins[] = { 25 };
179 +static unsigned gpio26_pins[] = { 26 };
180 +static unsigned gpio27_pins[] = { 27 };
181 +static unsigned gpio28_pins[] = { 28 };
182 +static unsigned gpio29_pins[] = { 29 };
183 +static unsigned gpio30_pins[] = { 30 };
184 +static unsigned gpio31_pins[] = { 31 };
185 +static unsigned gpio32_pins[] = { 32 };
186 +static unsigned gpio33_pins[] = { 33 };
187 +static unsigned gpio34_pins[] = { 34 };
188 +static unsigned gpio35_pins[] = { 35 };
189 +static unsigned gpio36_pins[] = { 36 };
190 +static unsigned gpio37_pins[] = { 37 };
191 +static unsigned gpio38_pins[] = { 38 };
192 +static unsigned gpio39_pins[] = { 39 };
193 +static unsigned gpio40_pins[] = { 40 };
194 +static unsigned gpio41_pins[] = { 41 };
195 +static unsigned gpio42_pins[] = { 42 };
196 +static unsigned gpio43_pins[] = { 43 };
197 +static unsigned gpio44_pins[] = { 44 };
198 +static unsigned gpio45_pins[] = { 45 };
199 +static unsigned gpio46_pins[] = { 46 };
200 +static unsigned gpio47_pins[] = { 47 };
201 +static unsigned gpio48_pins[] = { 48 };
202 +static unsigned gpio49_pins[] = { 49 };
203 +
204 +#define BCM6318_GROUP(n) \
205 + { \
206 + .name = #n, \
207 + .pins = n##_pins, \
208 + .num_pins = ARRAY_SIZE(n##_pins), \
209 + }
210 +
211 +static struct bcm6318_pingroup bcm6318_groups[] = {
212 + BCM6318_GROUP(gpio0),
213 + BCM6318_GROUP(gpio1),
214 + BCM6318_GROUP(gpio2),
215 + BCM6318_GROUP(gpio3),
216 + BCM6318_GROUP(gpio4),
217 + BCM6318_GROUP(gpio5),
218 + BCM6318_GROUP(gpio6),
219 + BCM6318_GROUP(gpio7),
220 + BCM6318_GROUP(gpio8),
221 + BCM6318_GROUP(gpio9),
222 + BCM6318_GROUP(gpio10),
223 + BCM6318_GROUP(gpio11),
224 + BCM6318_GROUP(gpio12),
225 + BCM6318_GROUP(gpio13),
226 + BCM6318_GROUP(gpio14),
227 + BCM6318_GROUP(gpio15),
228 + BCM6318_GROUP(gpio16),
229 + BCM6318_GROUP(gpio17),
230 + BCM6318_GROUP(gpio18),
231 + BCM6318_GROUP(gpio19),
232 + BCM6318_GROUP(gpio20),
233 + BCM6318_GROUP(gpio21),
234 + BCM6318_GROUP(gpio22),
235 + BCM6318_GROUP(gpio23),
236 + BCM6318_GROUP(gpio24),
237 + BCM6318_GROUP(gpio25),
238 + BCM6318_GROUP(gpio26),
239 + BCM6318_GROUP(gpio27),
240 + BCM6318_GROUP(gpio28),
241 + BCM6318_GROUP(gpio29),
242 + BCM6318_GROUP(gpio30),
243 + BCM6318_GROUP(gpio31),
244 + BCM6318_GROUP(gpio32),
245 + BCM6318_GROUP(gpio33),
246 + BCM6318_GROUP(gpio34),
247 + BCM6318_GROUP(gpio35),
248 + BCM6318_GROUP(gpio36),
249 + BCM6318_GROUP(gpio37),
250 + BCM6318_GROUP(gpio38),
251 + BCM6318_GROUP(gpio39),
252 + BCM6318_GROUP(gpio40),
253 + BCM6318_GROUP(gpio41),
254 + BCM6318_GROUP(gpio42),
255 + BCM6318_GROUP(gpio43),
256 + BCM6318_GROUP(gpio44),
257 + BCM6318_GROUP(gpio45),
258 + BCM6318_GROUP(gpio46),
259 + BCM6318_GROUP(gpio47),
260 + BCM6318_GROUP(gpio48),
261 + BCM6318_GROUP(gpio49),
262 +};
263 +
264 +/* GPIO_MODE */
265 +static const char * const led_groups[] = {
266 + "gpio0",
267 + "gpio1",
268 + "gpio2",
269 + "gpio3",
270 + "gpio4",
271 + "gpio5",
272 + "gpio6",
273 + "gpio7",
274 + "gpio8",
275 + "gpio9",
276 + "gpio10",
277 + "gpio11",
278 + "gpio12",
279 + "gpio13",
280 + "gpio14",
281 + "gpio15",
282 + "gpio16",
283 + "gpio17",
284 + "gpio18",
285 + "gpio19",
286 + "gpio20",
287 + "gpio21",
288 + "gpio22",
289 + "gpio23",
290 +};
291 +
292 +/* PINMUX_SEL */
293 +static const char * const ephy0_spd_led_groups[] = {
294 + "gpio0",
295 +};
296 +
297 +static const char * const ephy1_spd_led_groups[] = {
298 + "gpio1",
299 +};
300 +
301 +static const char * const ephy2_spd_led_groups[] = {
302 + "gpio2",
303 +};
304 +
305 +static const char * const ephy3_spd_led_groups[] = {
306 + "gpio3",
307 +};
308 +
309 +static const char * const ephy0_act_led_groups[] = {
310 + "gpio4",
311 +};
312 +
313 +static const char * const ephy1_act_led_groups[] = {
314 + "gpio5",
315 +};
316 +
317 +static const char * const ephy2_act_led_groups[] = {
318 + "gpio6",
319 +};
320 +
321 +static const char * const ephy3_act_led_groups[] = {
322 + "gpio7",
323 +};
324 +
325 +static const char * const serial_led_data_groups[] = {
326 + "gpio6",
327 +};
328 +
329 +static const char * const serial_led_clk_groups[] = {
330 + "gpio7",
331 +};
332 +
333 +static const char * const inet_act_led_groups[] = {
334 + "gpio8",
335 +};
336 +
337 +static const char * const inet_fail_led_groups[] = {
338 + "gpio9",
339 +};
340 +
341 +static const char * const dsl_led_groups[] = {
342 + "gpio10",
343 +};
344 +
345 +static const char * const post_fail_led_groups[] = {
346 + "gpio11",
347 +};
348 +
349 +static const char * const wlan_wps_led_groups[] = {
350 + "gpio12",
351 +};
352 +
353 +static const char * const usb_pwron_groups[] = {
354 + "gpio13",
355 +};
356 +
357 +static const char * const usb_device_led_groups[] = {
358 + "gpio13",
359 +};
360 +
361 +static const char * const usb_active_groups[] = {
362 + "gpio40",
363 +};
364 +
365 +#define BCM6318_MODE_FUN(n) \
366 + { \
367 + .name = #n, \
368 + .groups = n##_groups, \
369 + .num_groups = ARRAY_SIZE(n##_groups), \
370 + .mode_val = 1, \
371 + }
372 +
373 +#define BCM6318_MUX_FUN(n, mux) \
374 + { \
375 + .name = #n, \
376 + .groups = n##_groups, \
377 + .num_groups = ARRAY_SIZE(n##_groups), \
378 + .mux_val = mux, \
379 + }
380 +
381 +static const struct bcm6318_function bcm6318_funcs[] = {
382 + BCM6318_MODE_FUN(led),
383 + BCM6318_MUX_FUN(ephy0_spd_led, 1),
384 + BCM6318_MUX_FUN(ephy1_spd_led, 1),
385 + BCM6318_MUX_FUN(ephy2_spd_led, 1),
386 + BCM6318_MUX_FUN(ephy3_spd_led, 1),
387 + BCM6318_MUX_FUN(ephy0_act_led, 1),
388 + BCM6318_MUX_FUN(ephy1_act_led, 1),
389 + BCM6318_MUX_FUN(ephy2_act_led, 1),
390 + BCM6318_MUX_FUN(ephy3_act_led, 1),
391 + BCM6318_MUX_FUN(serial_led_data, 3),
392 + BCM6318_MUX_FUN(serial_led_clk, 3),
393 + BCM6318_MUX_FUN(inet_act_led, 1),
394 + BCM6318_MUX_FUN(inet_fail_led, 1),
395 + BCM6318_MUX_FUN(dsl_led, 1),
396 + BCM6318_MUX_FUN(post_fail_led, 1),
397 + BCM6318_MUX_FUN(wlan_wps_led, 1),
398 + BCM6318_MUX_FUN(usb_pwron, 1),
399 + BCM6318_MUX_FUN(usb_device_led, 2),
400 + BCM6318_MUX_FUN(usb_active, 2),
401 +};
402 +
403 +static inline unsigned int bcm6318_mux_off(unsigned int pin)
404 +{
405 + return BCM6318_MUX_REG + (pin / 16) * 4;
406 +}
407 +
408 +static inline unsigned int bcm6318_pad_off(unsigned int pin)
409 +{
410 + return BCM6318_PAD_REG + (pin / 8) * 4;
411 +}
412 +
413 +static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
414 +{
415 + return ARRAY_SIZE(bcm6318_groups);
416 +}
417 +
418 +static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
419 + unsigned group)
420 +{
421 + return bcm6318_groups[group].name;
422 +}
423 +
424 +static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
425 + unsigned group, const unsigned **pins,
426 + unsigned *num_pins)
427 +{
428 + *pins = bcm6318_groups[group].pins;
429 + *num_pins = bcm6318_groups[group].num_pins;
430 +
431 + return 0;
432 +}
433 +
434 +static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
435 +{
436 + return ARRAY_SIZE(bcm6318_funcs);
437 +}
438 +
439 +static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
440 + unsigned selector)
441 +{
442 + return bcm6318_funcs[selector].name;
443 +}
444 +
445 +static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
446 + unsigned selector,
447 + const char * const **groups,
448 + unsigned * const num_groups)
449 +{
450 + *groups = bcm6318_funcs[selector].groups;
451 + *num_groups = bcm6318_funcs[selector].num_groups;
452 +
453 + return 0;
454 +}
455 +
456 +static inline void bcm6318_rmw_mux(struct bcm63xx_pinctrl *pc, unsigned pin,
457 + unsigned int mode, unsigned int mux)
458 +{
459 + if (pin < BCM63XX_BANK_GPIOS)
460 + regmap_update_bits(pc->regs, BCM6318_MODE_REG, BIT(pin),
461 + mode ? BIT(pin) : 0);
462 +
463 + if (pin < BCM6318_NUM_MUX)
464 + regmap_update_bits(pc->regs,
465 + bcm6318_mux_off(pin),
466 + BCM6328_MUX_MASK << ((pin % 16) * 2),
467 + mux << ((pin % 16) * 2));
468 +}
469 +
470 +static inline void bcm6318_set_pad(struct bcm63xx_pinctrl *pc, unsigned pin,
471 + uint8_t val)
472 +{
473 + regmap_update_bits(pc->regs, bcm6318_pad_off(pin),
474 + BCM6328_PAD_MASK << ((pin % 8) * 4),
475 + val << ((pin % 8) * 4));
476 +}
477 +
478 +static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
479 + unsigned selector, unsigned group)
480 +{
481 + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
482 + const struct bcm6318_pingroup *pg = &bcm6318_groups[group];
483 + const struct bcm6318_function *f = &bcm6318_funcs[selector];
484 +
485 + bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val);
486 +
487 + return 0;
488 +}
489 +
490 +static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
491 + struct pinctrl_gpio_range *range,
492 + unsigned offset)
493 +{
494 + struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
495 +
496 + /* disable all functions using this pin */
497 + if (offset < 13) {
498 + /* GPIOs 0-12 use mux 0 as GPIO function */
499 + bcm6318_rmw_mux(pc, offset, 0, 0);
500 + } else if (offset < 42) {
501 + /* GPIOs 13-41 use mux 3 as GPIO function */
502 + bcm6318_rmw_mux(pc, offset, 0, 3);
503 +
504 + bcm6318_set_pad(pc, offset, 0);
505 + }
506 +
507 + return 0;
508 +}
509 +
510 +static struct pinctrl_ops bcm6318_pctl_ops = {
511 + .dt_free_map = pinctrl_utils_free_map,
512 + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
513 + .get_group_name = bcm6318_pinctrl_get_group_name,
514 + .get_group_pins = bcm6318_pinctrl_get_group_pins,
515 + .get_groups_count = bcm6318_pinctrl_get_group_count,
516 +};
517 +
518 +static struct pinmux_ops bcm6318_pmx_ops = {
519 + .get_function_groups = bcm6318_pinctrl_get_groups,
520 + .get_function_name = bcm6318_pinctrl_get_func_name,
521 + .get_functions_count = bcm6318_pinctrl_get_func_count,
522 + .gpio_request_enable = bcm6318_gpio_request_enable,
523 + .set_mux = bcm6318_pinctrl_set_mux,
524 + .strict = true,
525 +};
526 +
527 +static const struct bcm63xx_pinctrl_soc bcm6318_soc = {
528 + .ngpios = BCM6318_NUM_GPIOS,
529 + .npins = ARRAY_SIZE(bcm6318_pins),
530 + .pctl_ops = &bcm6318_pctl_ops,
531 + .pins = bcm6318_pins,
532 + .pmx_ops = &bcm6318_pmx_ops,
533 +};
534 +
535 +static int bcm6318_pinctrl_probe(struct platform_device *pdev)
536 +{
537 + return bcm63xx_pinctrl_probe(pdev, &bcm6318_soc, NULL);
538 +}
539 +
540 +static const struct of_device_id bcm6318_pinctrl_match[] = {
541 + { .compatible = "brcm,bcm6318-pinctrl", },
542 + { /* sentinel */ }
543 +};
544 +
545 +static struct platform_driver bcm6318_pinctrl_driver = {
546 + .probe = bcm6318_pinctrl_probe,
547 + .driver = {
548 + .name = "bcm6318-pinctrl",
549 + .of_match_table = bcm6318_pinctrl_match,
550 + },
551 +};
552 +
553 +builtin_platform_driver(bcm6318_pinctrl_driver);