target/linux/bmips/patches-5.10/404-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch

   1 From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Fri, 24 Jun 2016 22:16:01 +0200
   4 Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
   5
   6 Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
   7 functions onto the GPIO pins. It does not support configuring individual
   8 pins but only whole groups. These groups may overlap, and still require
   9 the directions to be set correctly in the GPIO register. In addition the
  10 functions register controls other, not directly mux related functions.
  11
  12 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  13 ---
  14  drivers/pinctrl/bcm63xx/Kconfig           |   8 +
  15  drivers/pinctrl/bcm63xx/Makefile          |   1 +
  16  drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
  17  3 files changed, 402 insertions(+)
  18  create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
  19
  20 --- a/drivers/pinctrl/bcm63xx/Kconfig
  21 +++ b/drivers/pinctrl/bcm63xx/Kconfig
  22 @@ -8,3 +8,11 @@ config PINCTRL_BCM6328
  23         select PINCONF
  24         select PINCTRL_BCM63XX
  25         select GENERIC_PINCONF
  26 +
  27 +config PINCTRL_BCM6358
  28 +       bool "BCM6358 pincontrol driver"
  29 +       select PINMUX
  30 +       select PINCONF
  31 +       select PINCTRL_BCM63XX
  32 +       select GENERIC_PINCONF
  33 +       select MFD_SYSCON
  34 --- a/drivers/pinctrl/bcm63xx/Makefile
  35 +++ b/drivers/pinctrl/bcm63xx/Makefile
  36 @@ -1,2 +1,3 @@
  37  obj-$(CONFIG_PINCTRL_BCM63XX)  += pinctrl-bcm63xx.o
  38  obj-$(CONFIG_PINCTRL_BCM6328)  += pinctrl-bcm6328.o
  39 +obj-$(CONFIG_PINCTRL_BCM6358)  += pinctrl-bcm6358.o
  40 --- /dev/null
  41 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
  42 @@ -0,0 +1,390 @@
  43 +/*
  44 + * This file is subject to the terms and conditions of the GNU General Public
  45 + * License.  See the file "COPYING" in the main directory of this archive
  46 + * for more details.
  47 + *
  48 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
  49 + */
  50 +
  51 +#include <linux/kernel.h>
  52 +#include <linux/bitops.h>
  53 +#include <linux/gpio.h>
  54 +#include <linux/gpio/driver.h>
  55 +#include <linux/mfd/syscon.h>
  56 +#include <linux/of.h>
  57 +#include <linux/of_gpio.h>
  58 +#include <linux/of_address.h>
  59 +#include <linux/slab.h>
  60 +#include <linux/regmap.h>
  61 +#include <linux/platform_device.h>
  62 +
  63 +#include <linux/pinctrl/pinconf.h>
  64 +#include <linux/pinctrl/pinconf-generic.h>
  65 +#include <linux/pinctrl/pinmux.h>
  66 +#include <linux/pinctrl/machine.h>
  67 +
  68 +#include "../core.h"
  69 +#include "../pinctrl-utils.h"
  70 +
  71 +#include "pinctrl-bcm63xx.h"
  72 +
  73 +/* GPIO_MODE register */
  74 +#define BCM6358_MODE_MUX_NONE          0
  75 +
  76 +/* overlays on gpio pins */
  77 +#define BCM6358_MODE_MUX_EBI_CS                BIT(5)
  78 +#define BCM6358_MODE_MUX_UART1         BIT(6)
  79 +#define BCM6358_MODE_MUX_SPI_CS                BIT(7)
  80 +#define BCM6358_MODE_MUX_ASYNC_MODEM   BIT(8)
  81 +#define BCM6358_MODE_MUX_LEGACY_LED    BIT(9)
  82 +#define BCM6358_MODE_MUX_SERIAL_LED    BIT(10)
  83 +#define BCM6358_MODE_MUX_LED           BIT(11)
  84 +#define BCM6358_MODE_MUX_UTOPIA                BIT(12)
  85 +#define BCM6358_MODE_MUX_CLKRST                BIT(13)
  86 +#define BCM6358_MODE_MUX_PWM_SYN_CLK   BIT(14)
  87 +#define BCM6358_MODE_MUX_SYS_IRQ       BIT(15)
  88 +
  89 +#define BCM6358_NGPIO                  40
  90 +
  91 +struct bcm6358_pingroup {
  92 +       const char *name;
  93 +       const unsigned * const pins;
  94 +       const unsigned num_pins;
  95 +
  96 +       const u16 mode_val;
  97 +
  98 +       /* non-GPIO function muxes require the gpio direction to be set */
  99 +       const u16 direction;
 100 +};
 101 +
 102 +struct bcm6358_function {
 103 +       const char *name;
 104 +       const char * const *groups;
 105 +       const unsigned num_groups;
 106 +};
 107 +
 108 +struct bcm6358_pinctrl {
 109 +       struct device *dev;
 110 +       struct pinctrl_dev *pctldev;
 111 +       struct pinctrl_desc desc;
 112 +
 113 +       struct regmap_field *overlays;
 114 +
 115 +       struct gpio_chip gpio[2];
 116 +};
 117 +
 118 +#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3)               \
 119 +       {                                                       \
 120 +               .number = a,                                    \
 121 +               .name = b,                                      \
 122 +               .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 |  \
 123 +                                    BCM6358_MODE_MUX_##bit2 |  \
 124 +                                    BCM6358_MODE_MUX_##bit3),  \
 125 +       }
 126 +
 127 +static const struct pinctrl_pin_desc bcm6358_pins[] = {
 128 +       BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
 129 +       BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
 130 +       BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
 131 +       BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
 132 +       PINCTRL_PIN(4, "gpio4"),
 133 +       BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
 134 +       BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
 135 +       BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
 136 +       BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
 137 +       BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
 138 +       BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
 139 +       BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
 140 +       BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
 141 +       BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
 142 +       BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
 143 +       BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
 144 +       PINCTRL_PIN(16, "gpio16"),
 145 +       PINCTRL_PIN(17, "gpio17"),
 146 +       PINCTRL_PIN(18, "gpio18"),
 147 +       PINCTRL_PIN(19, "gpio19"),
 148 +       PINCTRL_PIN(20, "gpio20"),
 149 +       PINCTRL_PIN(21, "gpio21"),
 150 +       BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
 151 +       BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
 152 +       BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
 153 +       BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
 154 +       BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
 155 +       BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
 156 +       BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
 157 +       BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
 158 +       BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
 159 +       BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
 160 +       BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
 161 +       BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
 162 +       PINCTRL_PIN(34, "gpio34"),
 163 +       PINCTRL_PIN(35, "gpio35"),
 164 +       PINCTRL_PIN(36, "gpio36"),
 165 +       PINCTRL_PIN(37, "gpio37"),
 166 +       PINCTRL_PIN(38, "gpio38"),
 167 +       PINCTRL_PIN(39, "gpio39"),
 168 +};
 169 +
 170 +static unsigned ebi_cs_grp_pins[] = { 30, 31 };
 171 +
 172 +static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
 173 +
 174 +static unsigned spi_cs_grp_pins[] = { 32, 33 };
 175 +
 176 +static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
 177 +
 178 +static unsigned serial_led_grp_pins[] = { 6, 7 };
 179 +
 180 +static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
 181 +
 182 +static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
 183 +
 184 +static unsigned utopia_grp_pins[] = {
 185 +       12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
 186 +};
 187 +
 188 +static unsigned pwm_syn_clk_grp_pins[] = { 8 };
 189 +
 190 +static unsigned sys_irq_grp_pins[] = { 5 };
 191 +
 192 +#define BCM6358_GPIO_MUX_GROUP(n, bit, dir)                    \
 193 +       {                                                       \
 194 +               .name = #n,                                     \
 195 +               .pins = n##_pins,                               \
 196 +               .num_pins = ARRAY_SIZE(n##_pins),               \
 197 +               .mode_val = BCM6358_MODE_MUX_##bit,             \
 198 +               .direction = dir,                               \
 199 +       }
 200 +
 201 +static const struct bcm6358_pingroup bcm6358_groups[] = {
 202 +       BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
 203 +       BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
 204 +       BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
 205 +       BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
 206 +       BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
 207 +       BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
 208 +       BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
 209 +       BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
 210 +       BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
 211 +       BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
 212 +};
 213 +
 214 +static const char * const ebi_cs_groups[] = {
 215 +       "ebi_cs_grp"
 216 +};
 217 +
 218 +static const char * const uart1_groups[] = {
 219 +       "uart1_grp"
 220 +};
 221 +
 222 +static const char * const spi_cs_2_3_groups[] = {
 223 +       "spi_cs_2_3_grp"
 224 +};
 225 +
 226 +static const char * const async_modem_groups[] = {
 227 +       "async_modem_grp"
 228 +};
 229 +
 230 +static const char * const legacy_led_groups[] = {
 231 +       "legacy_led_grp",
 232 +};
 233 +
 234 +static const char * const serial_led_groups[] = {
 235 +       "serial_led_grp",
 236 +};
 237 +
 238 +static const char * const led_groups[] = {
 239 +       "led_grp",
 240 +};
 241 +
 242 +static const char * const clkrst_groups[] = {
 243 +       "clkrst_grp",
 244 +};
 245 +
 246 +static const char * const pwm_syn_clk_groups[] = {
 247 +       "pwm_syn_clk_grp",
 248 +};
 249 +
 250 +static const char * const sys_irq_groups[] = {
 251 +       "sys_irq_grp",
 252 +};
 253 +
 254 +#define BCM6358_FUN(n)                                 \
 255 +       {                                               \
 256 +               .name = #n,                             \
 257 +               .groups = n##_groups,                   \
 258 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 259 +       }
 260 +
 261 +static const struct bcm6358_function bcm6358_funcs[] = {
 262 +       BCM6358_FUN(ebi_cs),
 263 +       BCM6358_FUN(uart1),
 264 +       BCM6358_FUN(spi_cs_2_3),
 265 +       BCM6358_FUN(async_modem),
 266 +       BCM6358_FUN(legacy_led),
 267 +       BCM6358_FUN(serial_led),
 268 +       BCM6358_FUN(led),
 269 +       BCM6358_FUN(clkrst),
 270 +       BCM6358_FUN(pwm_syn_clk),
 271 +       BCM6358_FUN(sys_irq),
 272 +};
 273 +
 274 +static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 275 +{
 276 +       return ARRAY_SIZE(bcm6358_groups);
 277 +}
 278 +
 279 +static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 280 +                                                 unsigned group)
 281 +{
 282 +       return bcm6358_groups[group].name;
 283 +}
 284 +
 285 +static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 286 +                                         unsigned group, const unsigned **pins,
 287 +                                         unsigned *num_pins)
 288 +{
 289 +       *pins = bcm6358_groups[group].pins;
 290 +       *num_pins = bcm6358_groups[group].num_pins;
 291 +
 292 +       return 0;
 293 +}
 294 +
 295 +static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
 296 +{
 297 +       return ARRAY_SIZE(bcm6358_funcs);
 298 +}
 299 +
 300 +static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 301 +                                                unsigned selector)
 302 +{
 303 +       return bcm6358_funcs[selector].name;
 304 +}
 305 +
 306 +static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
 307 +                                     unsigned selector,
 308 +                                     const char * const **groups,
 309 +                                     unsigned * const num_groups)
 310 +{
 311 +       *groups = bcm6358_funcs[selector].groups;
 312 +       *num_groups = bcm6358_funcs[selector].num_groups;
 313 +
 314 +       return 0;
 315 +}
 316 +
 317 +static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 318 +                                  unsigned selector, unsigned group)
 319 +{
 320 +       struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 321 +       const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
 322 +       u32 val = grp->mode_val;
 323 +       u32 mask = val;
 324 +       unsigned pin;
 325 +
 326 +       for (pin = 0; pin < grp->num_pins; pin++)
 327 +               mask |= (unsigned long)bcm6358_pins[pin].drv_data;
 328 +
 329 +       regmap_field_update_bits(pctl->overlays, mask, val);
 330 +
 331 +       for (pin = 0; pin < grp->num_pins; pin++) {
 332 +               int hw_gpio = bcm6358_pins[pin].number;
 333 +               struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
 334 +
 335 +               if (grp->direction & BIT(pin))
 336 +                       gc->direction_output(gc, hw_gpio % 32, 0);
 337 +               else
 338 +                       gc->direction_input(gc, hw_gpio % 32);
 339 +       }
 340 +
 341 +       return 0;
 342 +}
 343 +
 344 +static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
 345 +                                      struct pinctrl_gpio_range *range,
 346 +                                      unsigned offset)
 347 +{
 348 +       struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 349 +       u32 mask;
 350 +
 351 +       mask = (unsigned long)bcm6358_pins[offset].drv_data;
 352 +       if (!mask)
 353 +               return 0;
 354 +
 355 +       /* disable all functions using this pin */
 356 +       return regmap_field_update_bits(pctl->overlays, mask, 0);
 357 +}
 358 +
 359 +static struct pinctrl_ops bcm6358_pctl_ops = {
 360 +       .get_groups_count       = bcm6358_pinctrl_get_group_count,
 361 +       .get_group_name         = bcm6358_pinctrl_get_group_name,
 362 +       .get_group_pins         = bcm6358_pinctrl_get_group_pins,
 363 +#ifdef CONFIG_OF
 364 +       .dt_node_to_map         = pinconf_generic_dt_node_to_map_pin,
 365 +       .dt_free_map            = pinctrl_utils_free_map,
 366 +#endif
 367 +};
 368 +
 369 +static struct pinmux_ops bcm6358_pmx_ops = {
 370 +       .get_functions_count    = bcm6358_pinctrl_get_func_count,
 371 +       .get_function_name      = bcm6358_pinctrl_get_func_name,
 372 +       .get_function_groups    = bcm6358_pinctrl_get_groups,
 373 +       .set_mux                = bcm6358_pinctrl_set_mux,
 374 +       .gpio_request_enable    = bcm6358_gpio_request_enable,
 375 +       .strict                 = true,
 376 +};
 377 +
 378 +static int bcm6358_pinctrl_probe(struct platform_device *pdev)
 379 +{
 380 +       struct bcm6358_pinctrl *pctl;
 381 +       struct regmap *mode;
 382 +       struct reg_field overlays = REG_FIELD(0, 0, 15);
 383 +
 384 +       mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
 385 +                                              "brcm,gpiomode");
 386 +
 387 +       if (IS_ERR(mode))
 388 +               return PTR_ERR(mode);
 389 +
 390 +       pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 391 +       if (!pctl)
 392 +               return -ENOMEM;
 393 +
 394 +       pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
 395 +       if (IS_ERR(pctl->overlays))
 396 +               return PTR_ERR(pctl->overlays);
 397 +
 398 +       /* disable all muxes by default */
 399 +       regmap_field_write(pctl->overlays, 0);
 400 +
 401 +       pctl->desc.name = dev_name(&pdev->dev);
 402 +       pctl->desc.owner = THIS_MODULE;
 403 +       pctl->desc.pctlops = &bcm6358_pctl_ops;
 404 +       pctl->desc.pmxops = &bcm6358_pmx_ops;
 405 +
 406 +       pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
 407 +       pctl->desc.pins = bcm6358_pins;
 408 +
 409 +       platform_set_drvdata(pdev, pctl);
 410 +
 411 +       pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
 412 +                                                pctl->gpio, BCM6358_NGPIO);
 413 +       if (IS_ERR(pctl->pctldev))
 414 +               return PTR_ERR(pctl->pctldev);
 415 +
 416 +       return 0;
 417 +}
 418 +
 419 +static const struct of_device_id bcm6358_pinctrl_match[] = {
 420 +       { .compatible = "brcm,bcm6358-pinctrl", },
 421 +       { },
 422 +};
 423 +
 424 +static struct platform_driver bcm6358_pinctrl_driver = {
 425 +       .probe = bcm6358_pinctrl_probe,
 426 +       .driver = {
 427 +               .name = "bcm6358-pinctrl",
 428 +               .of_match_table = bcm6358_pinctrl_match,
 429 +       },
 430 +};
 431 +
 432 +builtin_platform_driver(bcm6358_pinctrl_driver);