target/linux/brcm-2.4/files/arch/mips/bcm947xx/time.c

   1 /*
   2  * Copyright 2006, Broadcom Corporation
   3  * All Rights Reserved.
   4  *
   5  * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
   6  * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
   7  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
   8  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
   9  *
  10  * $Id: time.c,v 1.1.1.10 2006/02/27 03:42:55 honor Exp $
  11  */
  12 #include <linux/config.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/sched.h>
  16 #include <linux/serial_reg.h>
  17 #include <linux/interrupt.h>
  18 #include <asm/addrspace.h>
  19 #include <asm/io.h>
  20 #include <asm/time.h>
  21
  22 #include <typedefs.h>
  23 #include <osl.h>
  24 #include <bcmnvram.h>
  25 #include <sbconfig.h>
  26 #include <sbutils.h>
  27 #include <sbchipc.h>
  28 #include <hndmips.h>
  29 #include <mipsinc.h>
  30 #include <hndcpu.h>
  31 #include <bcmdevs.h>
  32
  33 /* Global SB handle */
  34 extern void *bcm947xx_sbh;
  35 extern spinlock_t bcm947xx_sbh_lock;
  36
  37 /* Convenience */
  38 #define sbh bcm947xx_sbh
  39 #define sbh_lock bcm947xx_sbh_lock
  40
  41 extern int panic_timeout;
  42 static int watchdog = 0;
  43
  44 void __init
  45 bcm947xx_time_init(void)
  46 {
  47         unsigned int hz;
  48
  49         /*
  50          * Use deterministic values for initial counter interrupt
  51          * so that calibrate delay avoids encountering a counter wrap.
  52          */
  53         write_c0_count(0);
  54         write_c0_compare(0xffff);
  55
  56         if (!(hz = sb_cpu_clock(sbh)))
  57                 hz = 100000000;
  58
  59         printk("CPU: BCM%04x rev %d at %d MHz\n", sb_chip(sbh), sb_chiprev(sbh),
  60                (hz + 500000) / 1000000);
  61
  62         /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
  63         mips_hpt_frequency = hz / 2;
  64
  65         /* Set watchdog interval in ms */
  66         watchdog = simple_strtoul(nvram_safe_get("watchdog"), NULL, 0);
  67
  68         /* Please set the watchdog to 3 sec if it is less than 3 but not equal to 0 */
  69         if (watchdog > 0) {
  70                 if (watchdog < 3000)
  71                         watchdog = 3000;
  72         }
  73
  74         /* Set panic timeout in seconds */
  75         panic_timeout = watchdog / 1000;
  76 }
  77
  78 static void
  79 bcm947xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  80 {
  81         /* Generic MIPS timer code */
  82         timer_interrupt(irq, dev_id, regs);
  83
  84         /* Set the watchdog timer to reset after the specified number of ms */
  85         if (watchdog > 0) {
  86                 if (sb_chip(sbh) == BCM5354_CHIP_ID)
  87                         sb_watchdog(sbh, WATCHDOG_CLOCK_5354 / 1000 * watchdog);
  88                 else
  89                         sb_watchdog(sbh, WATCHDOG_CLOCK / 1000 * watchdog);
  90         }
  91
  92 }
  93
  94 static struct irqaction bcm947xx_timer_irqaction = {
  95         bcm947xx_timer_interrupt,
  96         SA_INTERRUPT,
  97         0,
  98         "timer",
  99         NULL,
 100         NULL
 101 };
 102
 103 void __init
 104 bcm947xx_timer_setup(struct irqaction *irq)
 105 {
 106         int x;
 107
 108         /* Enable the timer interrupt */
 109         setup_irq(7, &bcm947xx_timer_irqaction);
 110
 111         sti();
 112
 113         for (x=0; x<5; x++) {
 114                 unsigned long ticks;
 115                 ticks = jiffies;
 116                 while (ticks == jiffies)
 117                         /* do nothing */;
 118         }
 119 }