1 From 7da0618348811dbb38825457f63e12d3b8ba943f Mon Sep 17 00:00:00 2001
2 From: gellert <gellert@raspberrypi.org>
3 Date: Fri, 15 Aug 2014 16:35:06 +0100
4 Subject: [PATCH 058/114] MMC: added alternative MMC driver
7 arch/arm/configs/bcmrpi_defconfig | 2 +
8 arch/arm/mach-bcm2708/bcm2708.c | 31 +
9 drivers/mmc/host/Kconfig | 40 +-
10 drivers/mmc/host/Makefile | 1 +
11 drivers/mmc/host/bcm2835-mmc.c | 1557 +++++++++++++++++++++++++++++++++++++
12 5 files changed, 1620 insertions(+), 11 deletions(-)
13 create mode 100644 drivers/mmc/host/bcm2835-mmc.c
15 --- a/arch/arm/configs/bcmrpi_defconfig
16 +++ b/arch/arm/configs/bcmrpi_defconfig
17 @@ -908,6 +908,8 @@ CONFIG_MMC=y
18 CONFIG_MMC_BLOCK_MINORS=32
20 CONFIG_MMC_SDHCI_PLTFM=y
22 +CONFIG_MMC_BCM2835_DMA=y
26 --- a/arch/arm/mach-bcm2708/bcm2708.c
27 +++ b/arch/arm/mach-bcm2708/bcm2708.c
28 @@ -414,6 +414,34 @@ static struct platform_device bcm2708_sy
32 +#ifdef CONFIG_MMC_BCM2835 /* Arasan emmc SD (new) */
33 +static struct resource bcm2835_emmc_resources[] = {
36 + .end = EMMC_BASE + SZ_256 - 1, /* we only need this area */
37 + /* the memory map actually makes SZ_4K available */
38 + .flags = IORESOURCE_MEM,
41 + .start = IRQ_ARASANSDIO,
42 + .end = IRQ_ARASANSDIO,
43 + .flags = IORESOURCE_IRQ,
47 +static u64 bcm2835_emmc_dmamask = 0xffffffffUL;
49 +struct platform_device bcm2835_emmc_device = {
50 + .name = "mmc-bcm2835",
52 + .num_resources = ARRAY_SIZE(bcm2835_emmc_resources),
53 + .resource = bcm2835_emmc_resources,
55 + .dma_mask = &bcm2835_emmc_dmamask,
56 + .coherent_dma_mask = 0xffffffffUL},
58 +#endif /* CONFIG_MMC_BCM2835 */
60 static struct resource bcm2708_powerman_resources[] = {
63 @@ -794,6 +822,9 @@ void __init bcm2708_init(void)
64 bcm_register_device(&bcm2708_uart1_device);
65 bcm_register_device(&bcm2708_powerman_device);
67 +#ifdef CONFIG_MMC_BCM2835
68 + bcm_register_device(&bcm2835_emmc_device);
71 for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++)
72 bcm_register_device(&bcm2708_alsa_devices[i]);
73 --- a/drivers/mmc/host/Kconfig
74 +++ b/drivers/mmc/host/Kconfig
75 @@ -281,17 +281,6 @@ config MMC_SDHCI_BCM_KONA
77 If you have a controller with this interface, say Y or M here.
79 -config MMC_SDHCI_BCM2835
80 - tristate "SDHCI platform support for the BCM2835 SD/MMC Controller"
81 - depends on ARCH_BCM2835
82 - depends on MMC_SDHCI_PLTFM
83 - select MMC_SDHCI_IO_ACCESSORS
85 - This selects the BCM2835 SD/MMC controller. If you have a BCM2835
86 - platform with SD or MMC devices, say Y or M here.
91 tristate "MOXART SD/MMC Host Controller support"
92 depends on ARCH_MOXART && MMC
93 @@ -313,6 +302,35 @@ config MMC_SDHCI_ST
94 If you have a controller with this interface, say Y or M here.
98 + tristate "MMC support on BCM2835"
99 + depends on MACH_BCM2708
101 + This selects the MMC Interface on BCM2835.
103 + If you have a controller with this interface, say Y or M here.
107 +config MMC_BCM2835_DMA
108 + bool "DMA support on BCM2835 Arasan controller"
109 + depends on MMC_BCM2835
111 + Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
116 +config MMC_BCM2835_PIO_DMA_BARRIER
117 + int "Block count limit for PIO transfers"
118 + depends on MMC_BCM2835 && MMC_BCM2835_DMA
122 + The inclusive limit in bytes under which PIO will be used instead of DMA
124 + If unsure, say 2 here.
127 tristate "TI OMAP Multimedia Card Interface support"
129 --- a/drivers/mmc/host/Makefile
130 +++ b/drivers/mmc/host/Makefile
131 @@ -17,6 +17,7 @@ obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-p
132 obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
133 obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o
134 obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
135 +obj-$(CONFIG_MMC_BCM2835) += bcm2835-mmc.o
136 obj-$(CONFIG_MMC_WBSD) += wbsd.o
137 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
138 obj-$(CONFIG_MMC_OMAP) += omap.o
140 +++ b/drivers/mmc/host/bcm2835-mmc.c
143 + * BCM2835 MMC host driver.
145 + * Author: Gellert Weisz <gellert@raspberrypi.org>
149 + * sdhci-bcm2708.c by Broadcom
150 + * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
151 + * sdhci.c and sdhci-pci.c by Pierre Ossman
153 + * This program is free software; you can redistribute it and/or modify it
154 + * under the terms and conditions of the GNU General Public License,
155 + * version 2, as published by the Free Software Foundation.
157 + * This program is distributed in the hope it will be useful, but WITHOUT
158 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
159 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
162 + * You should have received a copy of the GNU General Public License
163 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
166 +#include <linux/delay.h>
167 +#include <linux/module.h>
168 +#include <linux/io.h>
169 +#include <linux/mmc/mmc.h>
170 +#include <linux/mmc/host.h>
171 +#include <linux/mmc/sd.h>
172 +#include <linux/scatterlist.h>
173 +#include <linux/of_address.h>
174 +#include <linux/of_irq.h>
175 +#include <linux/clk.h>
176 +#include <linux/platform_device.h>
177 +#include <linux/err.h>
178 +#include <linux/blkdev.h>
179 +#include <linux/dmaengine.h>
180 +#include <linux/dma-mapping.h>
181 +#include <linux/of_dma.h>
187 + #define BCM2835_CLOCK_FREQ 250000000
190 +#define DRIVER_NAME "mmc-bcm2835"
192 +#define DBG(f, x...) \
193 +pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
195 +#ifndef CONFIG_MMC_BCM2835_DMA
200 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
201 +#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
202 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
204 +#define PIO_DMA_BARRIER 00
207 +#define MIN_FREQ 400000
208 +#define TIMEOUT_VAL 0xE
209 +#define BCM2835_SDHCI_WRITE_DELAY(f) (((2 * 1000000) / f) + 1)
211 +#ifndef BCM2708_PERI_BASE
212 + #define BCM2708_PERI_BASE 0x20000000
215 +/* FIXME: Needs IOMMU support */
216 +#define BCM2835_VCMMU_SHIFT (0x7E000000 - BCM2708_PERI_BASE)
219 +struct bcm2835_host {
222 + void __iomem *ioaddr;
225 + struct mmc_host *mmc;
229 + int clock; /* Current clock speed */
230 + u8 pwr; /* Current voltage */
232 + unsigned int max_clk; /* Max possible freq */
233 + unsigned int timeout_clk; /* Timeout freq (KHz) */
234 + unsigned int clk_mul; /* Clock Muliplier value */
236 + struct tasklet_struct finish_tasklet; /* Tasklet structures */
238 + struct timer_list timer; /* Timer for timeouts */
240 + struct sg_mapping_iter sg_miter; /* SG state for PIO */
241 + unsigned int blocks; /* remaining PIO blocks */
243 + int irq; /* Device IRQ */
246 + u32 ier; /* cached registers */
248 + struct mmc_request *mrq; /* Current request */
249 + struct mmc_command *cmd; /* Current command */
250 + struct mmc_data *data; /* Current data request */
251 + unsigned int data_early:1; /* Data finished before cmd */
253 + wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
260 + struct dma_chan *dma_chan_rx; /* DMA channel for reads */
261 + struct dma_chan *dma_chan_tx; /* DMA channel for writes */
262 + struct dma_async_tx_descriptor *tx_desc; /* descriptor */
266 + /*end of DMA part*/
268 + int max_delay; /* maximum length of time spent waiting */
270 + int flags; /* Host attributes */
271 +#define SDHCI_USE_SDMA (1<<0) /* Host is SDMA capable */
272 +#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */
273 +#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
274 +#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
275 +#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
276 +#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
277 +#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
278 +#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
279 +#define SDHCI_USE_PLATDMA (1<<12) /* Host uses 3rd party DMA */
283 +static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg)
285 + writel(val, host->ioaddr + reg);
286 + udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
289 +static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
291 + writel(val, host->ioaddr + reg);
294 +static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
296 + return readl(host->ioaddr + reg);
299 +static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
301 + u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
302 + bcm2835_mmc_readl(host, reg & ~3);
303 + u32 word_num = (reg >> 1) & 1;
304 + u32 word_shift = word_num * 16;
305 + u32 mask = 0xffff << word_shift;
306 + u32 newval = (oldval & ~mask) | (val << word_shift);
308 + if (reg == SDHCI_TRANSFER_MODE)
309 + host->shadow = newval;
311 + bcm2835_mmc_writel(host, newval, reg & ~3);
315 +static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
317 + u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
318 + u32 byte_num = reg & 3;
319 + u32 byte_shift = byte_num * 8;
320 + u32 mask = 0xff << byte_shift;
321 + u32 newval = (oldval & ~mask) | (val << byte_shift);
323 + bcm2835_mmc_writel(host, newval, reg & ~3);
327 +static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
329 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
330 + u32 word_num = (reg >> 1) & 1;
331 + u32 word_shift = word_num * 16;
332 + u32 word = (val >> word_shift) & 0xffff;
337 +static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
339 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
340 + u32 byte_num = reg & 3;
341 + u32 byte_shift = byte_num * 8;
342 + u32 byte = (val >> byte_shift) & 0xff;
347 +static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
351 + ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
353 + /* change which requests generate IRQs - makes no difference to
354 + the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
355 + bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE);
359 +static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
361 + pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
362 + mmc_hostname(host->mmc));
364 + pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
365 + bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
366 + bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
367 + pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
368 + bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
369 + bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
370 + pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
371 + bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
372 + bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
373 + pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
374 + bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
375 + bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
376 + pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
377 + bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
378 + bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
379 + pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
380 + bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
381 + bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
382 + pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
383 + bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
384 + bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
385 + pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
386 + bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
387 + bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
388 + pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
389 + bcm2835_mmc_readw(host, SDHCI_ACMD12_ERR),
390 + bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
391 + pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
392 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
393 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
394 + pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
395 + bcm2835_mmc_readw(host, SDHCI_COMMAND),
396 + bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
397 + pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
398 + bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
400 + pr_debug(DRIVER_NAME ": ===========================================\n");
404 +static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
406 + unsigned long timeout;
408 + bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
410 + if (mask & SDHCI_RESET_ALL)
413 + /* Wait max 100 ms */
416 + /* hw clears the bit when it's done */
417 + while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
418 + if (timeout == 0) {
419 + pr_err("%s: Reset 0x%x never completed.\n",
420 + mmc_hostname(host->mmc), (int)mask);
421 + bcm2835_mmc_dumpregs(host);
428 + if (100-timeout > 10 && 100-timeout > host->max_delay) {
429 + host->max_delay = 100-timeout;
430 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
434 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
436 +static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
439 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
441 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
443 + host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
444 + SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
445 + SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
446 + SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
447 + SDHCI_INT_RESPONSE;
449 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
450 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
453 + /* force clock reconfiguration */
455 + bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
461 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
463 +static void bcm2835_mmc_dma_complete(void *param)
465 + struct bcm2835_host *host = param;
466 + struct dma_chan *dma_chan;
467 + unsigned long flags;
470 + spin_lock_irqsave(&host->lock, flags);
472 + if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
473 + /* otherwise handled in SDHCI IRQ */
474 + dma_chan = host->dma_chan_rx;
475 + dir_data = DMA_FROM_DEVICE;
477 + dma_unmap_sg(dma_chan->device->dev,
478 + host->data->sg, host->data->sg_len,
481 + bcm2835_mmc_finish_data(host);
484 + spin_unlock_irqrestore(&host->lock, flags);
487 +static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
489 + unsigned long flags;
490 + size_t blksize, len, chunk;
492 + u32 uninitialized_var(scratch);
495 + blksize = host->data->blksz;
498 + local_irq_save(flags);
501 + if (!sg_miter_next(&host->sg_miter))
504 + len = min(host->sg_miter.length, blksize);
507 + host->sg_miter.consumed = len;
509 + buf = host->sg_miter.addr;
513 + scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
517 + *buf = scratch & 0xFF;
526 + sg_miter_stop(&host->sg_miter);
528 + local_irq_restore(flags);
531 +static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
533 + unsigned long flags;
534 + size_t blksize, len, chunk;
538 + blksize = host->data->blksz;
543 + local_irq_save(flags);
546 + if (!sg_miter_next(&host->sg_miter))
549 + len = min(host->sg_miter.length, blksize);
552 + host->sg_miter.consumed = len;
554 + buf = host->sg_miter.addr;
557 + scratch |= (u32)*buf << (chunk * 8);
563 + if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
564 + mmc_raw_writel(host, scratch, SDHCI_BUFFER);
571 + sg_miter_stop(&host->sg_miter);
573 + local_irq_restore(flags);
577 +static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
581 + BUG_ON(!host->data);
583 + if (host->blocks == 0)
586 + if (host->data->flags & MMC_DATA_READ)
587 + mask = SDHCI_DATA_AVAILABLE;
589 + mask = SDHCI_SPACE_AVAILABLE;
591 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
593 + if (host->data->flags & MMC_DATA_READ)
594 + bcm2835_bcm2835_mmc_read_block_pio(host);
596 + bcm2835_bcm2835_mmc_write_block_pio(host);
600 + /* QUIRK used in sdhci.c removes the 'if' */
601 + /* but it seems this is unnecessary */
602 + if (host->blocks == 0)
610 +static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
612 + u32 len, dir_data, dir_slave;
613 + struct dma_async_tx_descriptor *desc = NULL;
614 + struct dma_chan *dma_chan;
617 + WARN_ON(!host->data);
622 + if (host->blocks == 0)
625 + if (host->data->flags & MMC_DATA_READ) {
626 + dma_chan = host->dma_chan_rx;
627 + dir_data = DMA_FROM_DEVICE;
628 + dir_slave = DMA_DEV_TO_MEM;
630 + dma_chan = host->dma_chan_tx;
631 + dir_data = DMA_TO_DEVICE;
632 + dir_slave = DMA_MEM_TO_DEV;
635 + BUG_ON(!dma_chan->device);
636 + BUG_ON(!dma_chan->device->dev);
637 + BUG_ON(!host->data->sg);
639 + len = dma_map_sg(dma_chan->device->dev, host->data->sg,
640 + host->data->sg_len, dir_data);
642 + desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
644 + DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
646 + dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
649 + bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
650 + SDHCI_INT_SPACE_AVAIL);
651 + host->tx_desc = desc;
652 + desc->callback = bcm2835_mmc_dma_complete;
653 + desc->callback_param = host;
654 + dmaengine_submit(desc);
655 + dma_async_issue_pending(dma_chan);
662 +static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
664 + u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
665 + u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
668 + host->ier = (host->ier & ~pio_irqs) | dma_irqs;
670 + host->ier = (host->ier & ~dma_irqs) | pio_irqs;
672 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
673 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
677 +static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
680 + struct mmc_data *data = cmd->data;
682 + WARN_ON(host->data);
684 + if (data || (cmd->flags & MMC_RSP_BUSY)) {
685 + count = TIMEOUT_VAL;
686 + bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
692 + /* Sanity checks */
693 + BUG_ON(data->blksz * data->blocks > 524288);
694 + BUG_ON(data->blksz > host->mmc->max_blk_size);
695 + BUG_ON(data->blocks > 65535);
698 + host->data_early = 0;
699 + host->data->bytes_xfered = 0;
702 + if (!(host->flags & SDHCI_REQ_USE_DMA)) {
705 + flags = SG_MITER_ATOMIC;
706 + if (host->data->flags & MMC_DATA_READ)
707 + flags |= SG_MITER_TO_SG;
709 + flags |= SG_MITER_FROM_SG;
710 + sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
711 + host->blocks = data->blocks;
714 + host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
716 + bcm2835_mmc_set_transfer_irqs(host);
718 + /* Set the DMA boundary value and block size */
719 + bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
720 + data->blksz), SDHCI_BLOCK_SIZE);
721 + bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
723 + BUG_ON(!host->data);
726 +static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
727 + struct mmc_command *cmd)
730 + struct mmc_data *data = cmd->data;
732 + if (data == NULL) {
733 + /* clear Auto CMD settings for no data CMDs */
734 + mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
735 + bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
736 + SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
740 + WARN_ON(!host->data);
742 + mode = SDHCI_TRNS_BLK_CNT_EN;
744 + if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
745 + mode |= SDHCI_TRNS_MULTI;
748 + * If we are sending CMD23, CMD12 never gets sent
749 + * on successful completion (so no Auto-CMD12).
751 + if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
752 + mode |= SDHCI_TRNS_AUTO_CMD12;
753 + else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
754 + mode |= SDHCI_TRNS_AUTO_CMD23;
755 + bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2);
759 + if (data->flags & MMC_DATA_READ)
760 + mode |= SDHCI_TRNS_READ;
761 + if (host->flags & SDHCI_REQ_USE_DMA)
762 + mode |= SDHCI_TRNS_DMA;
764 + bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
767 +void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
771 + unsigned long timeout;
773 + WARN_ON(host->cmd);
775 + /* Wait max 10 ms */
778 + mask = SDHCI_CMD_INHIBIT;
779 + if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
780 + mask |= SDHCI_DATA_INHIBIT;
782 + /* We shouldn't wait for data inihibit for stop commands, even
783 + though they might use busy signaling */
784 + if (host->mrq->data && (cmd == host->mrq->data->stop))
785 + mask &= ~SDHCI_DATA_INHIBIT;
787 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
788 + if (timeout == 0) {
789 + pr_err("%s: Controller never released inhibit bit(s).\n",
790 + mmc_hostname(host->mmc));
791 + bcm2835_mmc_dumpregs(host);
793 + tasklet_schedule(&host->finish_tasklet);
800 + if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
801 + host->max_delay = (1000-timeout)/100;
802 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
807 + if (!cmd->data && cmd->busy_timeout > 9000)
808 + timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
811 + timeout += 10 * HZ;
812 + mod_timer(&host->timer, timeout);
816 + bcm2835_mmc_prepare_data(host, cmd);
818 + bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT);
820 + bcm2835_mmc_set_transfer_mode(host, cmd);
822 + if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
823 + pr_err("%s: Unsupported response type!\n",
824 + mmc_hostname(host->mmc));
825 + cmd->error = -EINVAL;
826 + tasklet_schedule(&host->finish_tasklet);
830 + if (!(cmd->flags & MMC_RSP_PRESENT))
831 + flags = SDHCI_CMD_RESP_NONE;
832 + else if (cmd->flags & MMC_RSP_136)
833 + flags = SDHCI_CMD_RESP_LONG;
834 + else if (cmd->flags & MMC_RSP_BUSY)
835 + flags = SDHCI_CMD_RESP_SHORT_BUSY;
837 + flags = SDHCI_CMD_RESP_SHORT;
839 + if (cmd->flags & MMC_RSP_CRC)
840 + flags |= SDHCI_CMD_CRC;
841 + if (cmd->flags & MMC_RSP_OPCODE)
842 + flags |= SDHCI_CMD_INDEX;
845 + flags |= SDHCI_CMD_DATA;
847 + bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
851 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
853 + struct mmc_data *data;
855 + BUG_ON(!host->data);
861 + data->bytes_xfered = 0;
863 + data->bytes_xfered = data->blksz * data->blocks;
866 + * Need to send CMD12 if -
867 + * a) open-ended multiblock transfer (no CMD23)
868 + * b) error in multiblock transfer
872 + !host->mrq->sbc)) {
875 + * The controller needs a reset of internal state machines
876 + * upon error conditions.
879 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
880 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
883 + bcm2835_mmc_send_command(host, data->stop);
885 + tasklet_schedule(&host->finish_tasklet);
888 +static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
892 + BUG_ON(host->cmd == NULL);
894 + if (host->cmd->flags & MMC_RSP_PRESENT) {
895 + if (host->cmd->flags & MMC_RSP_136) {
896 + /* CRC is stripped so we need to do some shifting. */
897 + for (i = 0; i < 4; i++) {
898 + host->cmd->resp[i] = bcm2835_mmc_readl(host,
899 + SDHCI_RESPONSE + (3-i)*4) << 8;
901 + host->cmd->resp[i] |=
902 + bcm2835_mmc_readb(host,
903 + SDHCI_RESPONSE + (3-i)*4-1);
906 + host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
910 + host->cmd->error = 0;
912 + /* Finished CMD23, now send actual command. */
913 + if (host->cmd == host->mrq->sbc) {
915 + bcm2835_mmc_send_command(host, host->mrq->cmd);
917 + if (host->mrq->cmd->data && host->use_dma) {
918 + /* DMA transfer starts now, PIO starts after interrupt */
919 + bcm2835_mmc_transfer_dma(host);
923 + /* Processed actual command. */
924 + if (host->data && host->data_early)
925 + bcm2835_mmc_finish_data(host);
927 + if (!host->cmd->data)
928 + tasklet_schedule(&host->finish_tasklet);
935 +static void bcm2835_mmc_timeout_timer(unsigned long data)
937 + struct bcm2835_host *host;
938 + unsigned long flags;
940 + host = (struct bcm2835_host *)data;
942 + spin_lock_irqsave(&host->lock, flags);
945 + pr_err("%s: Timeout waiting for hardware interrupt.\n",
946 + mmc_hostname(host->mmc));
947 + bcm2835_mmc_dumpregs(host);
950 + host->data->error = -ETIMEDOUT;
951 + bcm2835_mmc_finish_data(host);
954 + host->cmd->error = -ETIMEDOUT;
956 + host->mrq->cmd->error = -ETIMEDOUT;
958 + tasklet_schedule(&host->finish_tasklet);
963 + spin_unlock_irqrestore(&host->lock, flags);
967 +static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
969 + if (!(host->flags & SDHCI_DEVICE_DEAD)) {
971 + host->ier |= SDHCI_INT_CARD_INT;
973 + host->ier &= ~SDHCI_INT_CARD_INT;
975 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
976 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
981 +static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
983 + struct bcm2835_host *host = mmc_priv(mmc);
984 + unsigned long flags;
986 + spin_lock_irqsave(&host->lock, flags);
988 + host->flags |= SDHCI_SDIO_IRQ_ENABLED;
990 + host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
992 + bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
993 + spin_unlock_irqrestore(&host->lock, flags);
996 +static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
999 + BUG_ON(intmask == 0);
1002 + pr_err("%s: Got command interrupt 0x%08x even "
1003 + "though no command operation was in progress.\n",
1004 + mmc_hostname(host->mmc), (unsigned)intmask);
1005 + bcm2835_mmc_dumpregs(host);
1009 + if (intmask & SDHCI_INT_TIMEOUT)
1010 + host->cmd->error = -ETIMEDOUT;
1011 + else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1012 + SDHCI_INT_INDEX)) {
1013 + host->cmd->error = -EILSEQ;
1016 + if (host->cmd->error) {
1017 + tasklet_schedule(&host->finish_tasklet);
1021 + if (intmask & SDHCI_INT_RESPONSE)
1022 + bcm2835_mmc_finish_command(host);
1026 +static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
1028 + struct dma_chan *dma_chan;
1031 + BUG_ON(intmask == 0);
1033 + if (!host->data) {
1035 + * The "data complete" interrupt is also used to
1036 + * indicate that a busy state has ended. See comment
1037 + * above in sdhci_cmd_irq().
1039 + if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1040 + if (intmask & SDHCI_INT_DATA_END) {
1041 + bcm2835_mmc_finish_command(host);
1046 + pr_debug("%s: Got data interrupt 0x%08x even "
1047 + "though no data operation was in progress.\n",
1048 + mmc_hostname(host->mmc), (unsigned)intmask);
1049 + bcm2835_mmc_dumpregs(host);
1054 + if (intmask & SDHCI_INT_DATA_TIMEOUT)
1055 + host->data->error = -ETIMEDOUT;
1056 + else if (intmask & SDHCI_INT_DATA_END_BIT)
1057 + host->data->error = -EILSEQ;
1058 + else if ((intmask & SDHCI_INT_DATA_CRC) &&
1059 + SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
1060 + != MMC_BUS_TEST_R)
1061 + host->data->error = -EILSEQ;
1063 + if (host->use_dma) {
1064 + if (host->data->flags & MMC_DATA_WRITE) {
1065 + /* IRQ handled here */
1067 + dma_chan = host->dma_chan_tx;
1068 + dir_data = DMA_TO_DEVICE;
1069 + dma_unmap_sg(dma_chan->device->dev,
1070 + host->data->sg, host->data->sg_len,
1073 + bcm2835_mmc_finish_data(host);
1077 + if (host->data->error)
1078 + bcm2835_mmc_finish_data(host);
1080 + if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1081 + bcm2835_mmc_transfer_pio(host);
1083 + if (intmask & SDHCI_INT_DATA_END) {
1086 + * Data managed to finish before the
1087 + * command completed. Make sure we do
1088 + * things in the proper order.
1090 + host->data_early = 1;
1092 + bcm2835_mmc_finish_data(host);
1100 +static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
1102 + irqreturn_t result = IRQ_NONE;
1103 + struct bcm2835_host *host = dev_id;
1104 + u32 intmask, mask, unexpected = 0;
1105 + int max_loops = 16;
1110 + spin_lock(&host->lock);
1112 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1114 + if (!intmask || intmask == 0xffffffff) {
1115 + result = IRQ_NONE;
1120 + /* Clear selected interrupts. */
1121 + mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1122 + SDHCI_INT_BUS_POWER);
1123 + bcm2835_mmc_writel(host, mask, SDHCI_INT_STATUS);
1126 + if (intmask & SDHCI_INT_CMD_MASK)
1127 + bcm2835_mmc_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1129 + if (intmask & SDHCI_INT_DATA_MASK)
1130 + bcm2835_mmc_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1132 + if (intmask & SDHCI_INT_BUS_POWER)
1133 + pr_err("%s: Card is consuming too much power!\n",
1134 + mmc_hostname(host->mmc));
1136 + if (intmask & SDHCI_INT_CARD_INT) {
1140 + bcm2835_mmc_enable_sdio_irq_nolock(host, false);
1141 + host->thread_isr |= SDHCI_INT_CARD_INT;
1142 + result = IRQ_WAKE_THREAD;
1146 + intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
1147 + SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1148 + SDHCI_INT_ERROR | SDHCI_INT_BUS_POWER |
1149 + SDHCI_INT_CARD_INT);
1152 + unexpected |= intmask;
1153 + bcm2835_mmc_writel(host, intmask, SDHCI_INT_STATUS);
1156 + if (result == IRQ_NONE)
1157 + result = IRQ_HANDLED;
1159 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1160 + } while (intmask && --max_loops);
1162 + spin_unlock(&host->lock);
1165 + pr_err("%s: Unexpected interrupt 0x%08x.\n",
1166 + mmc_hostname(host->mmc), unexpected);
1167 + bcm2835_mmc_dumpregs(host);
1172 + mmc_signal_sdio_irq(host->mmc);
1179 +static irqreturn_t bcm2835_mmc_thread_irq(int irq, void *dev_id)
1181 + struct bcm2835_host *host = dev_id;
1182 + unsigned long flags;
1185 + spin_lock_irqsave(&host->lock, flags);
1186 + isr = host->thread_isr;
1187 + host->thread_isr = 0;
1188 + spin_unlock_irqrestore(&host->lock, flags);
1190 + if (isr & SDHCI_INT_CARD_INT) {
1191 + sdio_run_irqs(host->mmc);
1193 + spin_lock_irqsave(&host->lock, flags);
1194 + if (host->flags & SDHCI_SDIO_IRQ_ENABLED)
1195 + bcm2835_mmc_enable_sdio_irq_nolock(host, true);
1196 + spin_unlock_irqrestore(&host->lock, flags);
1199 + return isr ? IRQ_HANDLED : IRQ_NONE;
1205 +void bcm2835_mmc_set_clock(struct bcm2835_host *host, unsigned int clock)
1207 + int div = 0; /* Initialized for compiler warning */
1208 + int real_div = div, clk_mul = 1;
1210 + unsigned long timeout;
1213 + host->mmc->actual_clock = 0;
1215 + bcm2835_mmc_writew(host, 0, SDHCI_CLOCK_CONTROL);
1220 + /* Version 3.00 divisors must be a multiple of 2. */
1221 + if (host->max_clk <= clock)
1224 + for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
1226 + if ((host->max_clk / div) <= clock)
1235 + host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
1237 + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1238 + clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1239 + << SDHCI_DIVIDER_HI_SHIFT;
1240 + clk |= SDHCI_CLOCK_INT_EN;
1241 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1243 + /* Wait max 20 ms */
1245 + while (!((clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL))
1246 + & SDHCI_CLOCK_INT_STABLE)) {
1247 + if (timeout == 0) {
1248 + pr_err("%s: Internal clock never "
1249 + "stabilised.\n", mmc_hostname(host->mmc));
1250 + bcm2835_mmc_dumpregs(host);
1257 + if (20-timeout > 10 && 20-timeout > host->max_delay) {
1258 + host->max_delay = 20-timeout;
1259 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
1262 + clk |= SDHCI_CLOCK_CARD_EN;
1263 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1266 +static void bcm2835_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
1268 + struct bcm2835_host *host;
1269 + unsigned long flags;
1271 + host = mmc_priv(mmc);
1273 + spin_lock_irqsave(&host->lock, flags);
1275 + WARN_ON(host->mrq != NULL);
1279 + if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
1280 + bcm2835_mmc_send_command(host, mrq->sbc);
1282 + bcm2835_mmc_send_command(host, mrq->cmd);
1285 + spin_unlock_irqrestore(&host->lock, flags);
1287 + if (!(mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) && mrq->cmd->data && host->use_dma) {
1288 + /* DMA transfer starts now, PIO starts after interrupt */
1289 + bcm2835_mmc_transfer_dma(host);
1294 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1297 + struct bcm2835_host *host = mmc_priv(mmc);
1298 + unsigned long flags;
1303 + spin_lock_irqsave(&host->lock, flags);
1305 + if (!ios->clock || ios->clock != host->clock) {
1306 + bcm2835_mmc_set_clock(host, ios->clock);
1307 + host->clock = ios->clock;
1310 + if (host->pwr != SDHCI_POWER_330) {
1311 + host->pwr = SDHCI_POWER_330;
1312 + bcm2835_mmc_writeb(host, SDHCI_POWER_330 | SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1315 + ctrl = bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL);
1317 + /* set bus width */
1318 + ctrl &= ~SDHCI_CTRL_8BITBUS;
1319 + if (ios->bus_width == MMC_BUS_WIDTH_4)
1320 + ctrl |= SDHCI_CTRL_4BITBUS;
1322 + ctrl &= ~SDHCI_CTRL_4BITBUS;
1324 + ctrl &= ~SDHCI_CTRL_HISPD; /* NO_HISPD_BIT */
1327 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1329 + * We only need to set Driver Strength if the
1330 + * preset value enable is not set.
1332 + ctrl_2 = bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2);
1333 + ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK;
1334 + if (ios->drv_type == MMC_SET_DRIVER_TYPE_A)
1335 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A;
1336 + else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C)
1337 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C;
1339 + bcm2835_mmc_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1341 + /* Reset SD Clock Enable */
1342 + clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL);
1343 + clk &= ~SDHCI_CLOCK_CARD_EN;
1344 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1346 + /* Re-enable SD Clock */
1347 + bcm2835_mmc_set_clock(host, host->clock);
1348 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1352 + spin_unlock_irqrestore(&host->lock, flags);
1356 +static struct mmc_host_ops bcm2835_ops = {
1357 + .request = bcm2835_mmc_request,
1358 + .set_ios = bcm2835_mmc_set_ios,
1359 + .enable_sdio_irq = bcm2835_mmc_enable_sdio_irq,
1363 +static void bcm2835_mmc_tasklet_finish(unsigned long param)
1365 + struct bcm2835_host *host;
1366 + unsigned long flags;
1367 + struct mmc_request *mrq;
1369 + host = (struct bcm2835_host *)param;
1371 + spin_lock_irqsave(&host->lock, flags);
1374 + * If this tasklet gets rescheduled while running, it will
1375 + * be run again afterwards but without any active request.
1378 + spin_unlock_irqrestore(&host->lock, flags);
1382 + del_timer(&host->timer);
1387 + * The controller needs a reset of internal state machines
1388 + * upon error conditions.
1390 + if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1391 + ((mrq->cmd && mrq->cmd->error) ||
1392 + (mrq->data && (mrq->data->error ||
1393 + (mrq->data->stop && mrq->data->stop->error))))) {
1395 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1396 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1401 + host->data = NULL;
1405 + spin_unlock_irqrestore(&host->lock, flags);
1406 + mmc_request_done(host->mmc, mrq);
1411 +int bcm2835_mmc_add_host(struct bcm2835_host *host)
1413 + struct mmc_host *mmc;
1415 + struct dma_slave_config cfg;
1421 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1423 + host->clk_mul = 0;
1425 + mmc->ops = &bcm2835_ops;
1426 + mmc->f_max = host->max_clk;
1427 + mmc->f_max = host->max_clk;
1428 + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1430 + /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1431 + host->timeout_clk = mmc->f_max / 1000;
1433 + mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1435 + /* host controller capabilities */
1436 + mmc->caps = MMC_CAP_CMD23 | MMC_CAP_ERASE | MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ |
1437 + MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_4_BIT_DATA;
1439 + host->flags = SDHCI_AUTO_CMD23;
1441 + spin_lock_init(&host->lock);
1445 + pr_info("Forcing PIO mode\n");
1446 + host->have_dma = false;
1448 + if (!host->dma_chan_tx || !host->dma_chan_rx ||
1449 + IS_ERR(host->dma_chan_tx) || IS_ERR(host->dma_chan_rx)) {
1450 + pr_err("%s: Unable to initialise DMA channels. Falling back to PIO\n", DRIVER_NAME);
1451 + host->have_dma = false;
1453 + pr_info("DMA channels allocated for the MMC driver");
1454 + host->have_dma = true;
1456 + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1457 + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1458 + cfg.slave_id = 11; /* DREQ channel */
1460 + cfg.direction = DMA_MEM_TO_DEV;
1462 + cfg.dst_addr = host->phys_addr + SDHCI_BUFFER;
1463 + ret = dmaengine_slave_config(host->dma_chan_tx, &cfg);
1465 + cfg.direction = DMA_DEV_TO_MEM;
1466 + cfg.src_addr = host->phys_addr + SDHCI_BUFFER;
1468 + ret = dmaengine_slave_config(host->dma_chan_rx, &cfg);
1473 + mmc->max_segs = 128;
1474 + mmc->max_req_size = 524288;
1475 + mmc->max_seg_size = mmc->max_req_size;
1476 + mmc->max_blk_size = 512;
1477 + mmc->max_blk_count = 65535;
1479 + /* report supported voltage ranges */
1480 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1482 + tasklet_init(&host->finish_tasklet,
1483 + bcm2835_mmc_tasklet_finish, (unsigned long)host);
1485 + setup_timer(&host->timer, bcm2835_mmc_timeout_timer, (unsigned long)host);
1486 + init_waitqueue_head(&host->buf_ready_int);
1488 + bcm2835_mmc_init(host, 0);
1490 + ret = request_irq(host->irq, bcm2835_mmc_irq, 0 /*IRQF_SHARED*/,
1491 + mmc_hostname(mmc), host);
1493 + ret = request_threaded_irq(host->irq, bcm2835_mmc_irq, bcm2835_mmc_thread_irq,
1494 + IRQF_SHARED, mmc_hostname(mmc), host);
1497 + pr_err("%s: Failed to request IRQ %d: %d\n",
1498 + mmc_hostname(mmc), host->irq, ret);
1503 + mmc_add_host(mmc);
1505 + pr_info("Load BCM2835 MMC driver\n");
1510 + tasklet_kill(&host->finish_tasklet);
1515 +static int bcm2835_mmc_probe(struct platform_device *pdev)
1517 + struct device *dev = &pdev->dev;
1519 + struct device_node *node = dev->of_node;
1522 + struct resource *iomem;
1523 + struct bcm2835_host *host = NULL;
1526 + struct mmc_host *mmc;
1527 +#if !defined(CONFIG_OF) && !defined(FORCE_PIO)
1528 + dma_cap_mask_t mask;
1531 + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1537 + if (resource_size(iomem) < 0x100)
1538 + dev_err(&pdev->dev, "Invalid iomem size!\n");
1540 + mmc = mmc_alloc_host(sizeof(struct bcm2835_host), dev);
1541 + host = mmc_priv(mmc);
1545 + if (IS_ERR(host)) {
1546 + ret = PTR_ERR(host);
1550 + host->phys_addr = iomem->start + BCM2835_VCMMU_SHIFT;
1554 + dma_cap_zero(mask);
1555 + /* we don't care about the channel, any would work */
1556 + dma_cap_set(DMA_SLAVE, mask);
1558 + host->dma_chan_tx = dma_request_channel(mask, NULL, NULL);
1559 + host->dma_chan_rx = dma_request_channel(mask, NULL, NULL);
1561 + host->max_clk = BCM2835_CLOCK_FREQ;
1565 + host->dma_chan_tx = of_dma_request_slave_channel(node, "tx");
1566 + host->dma_chan_rx = of_dma_request_slave_channel(node, "rx");
1568 + clk = of_clk_get(node, 0);
1569 + if (IS_ERR(clk)) {
1570 + dev_err(dev, "get CLOCK failed\n");
1571 + ret = PTR_ERR(clk);
1574 + host->max_clk = (clk_get_rate(clk));
1576 + host->irq = platform_get_irq(pdev, 0);
1578 + if (!request_mem_region(iomem->start, resource_size(iomem),
1579 + mmc_hostname(host->mmc))) {
1580 + dev_err(&pdev->dev, "cannot request region\n");
1585 + host->ioaddr = ioremap(iomem->start, resource_size(iomem));
1586 + if (!host->ioaddr) {
1587 + dev_err(&pdev->dev, "failed to remap registers\n");
1592 + platform_set_drvdata(pdev, host);
1595 + if (host->irq <= 0) {
1596 + dev_err(dev, "get IRQ failed\n");
1603 + mmc->caps |= MMC_CAP_4_BIT_DATA;
1605 + mmc_of_parse(mmc);
1607 + host->timeout = msecs_to_jiffies(1000);
1608 + spin_lock_init(&host->lock);
1609 + mmc->ops = &bcm2835_ops;
1610 + return bcm2835_mmc_add_host(host);
1614 + release_mem_region(iomem->start, resource_size(iomem));
1616 + mmc_free_host(host->mmc);
1618 + dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
1622 + mmc_free_host(mmc);
1626 +static int bcm2835_mmc_remove(struct platform_device *pdev)
1628 + struct bcm2835_host *host = platform_get_drvdata(pdev);
1629 + struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1630 + unsigned long flags;
1635 + scratch = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1636 + if (scratch == (u32)-1)
1641 + spin_lock_irqsave(&host->lock, flags);
1643 + host->flags |= SDHCI_DEVICE_DEAD;
1646 + pr_err("%s: Controller removed during "
1647 + " transfer!\n", mmc_hostname(host->mmc));
1649 + host->mrq->cmd->error = -ENOMEDIUM;
1650 + tasklet_schedule(&host->finish_tasklet);
1653 + spin_unlock_irqrestore(&host->lock, flags);
1656 + mmc_remove_host(host->mmc);
1659 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1661 + free_irq(host->irq, host);
1663 + del_timer_sync(&host->timer);
1665 + tasklet_kill(&host->finish_tasklet);
1667 + iounmap(host->ioaddr);
1668 + release_mem_region(iomem->start, resource_size(iomem));
1669 + mmc_free_host(host->mmc);
1670 + platform_set_drvdata(pdev, NULL);
1676 +static const struct of_device_id bcm2835_mmc_match[] = {
1677 + { .compatible = "brcm,bcm2835-mmc" },
1680 +MODULE_DEVICE_TABLE(of, bcm2835_mmc_match);
1684 +static struct platform_driver bcm2835_mmc_driver = {
1685 + .probe = bcm2835_mmc_probe,
1686 + .remove = bcm2835_mmc_remove,
1688 + .name = DRIVER_NAME,
1689 + .owner = THIS_MODULE,
1690 + .of_match_table = bcm2835_mmc_match,
1693 +module_platform_driver(bcm2835_mmc_driver);
1695 +MODULE_ALIAS("platform:mmc-bcm2835");
1696 +MODULE_DESCRIPTION("BCM2835 SDHCI driver");
1697 +MODULE_LICENSE("GPL v2");
1698 +MODULE_AUTHOR("Gellert Weisz");