1 From ef38e1a2b9c83fb10ac6fffdfa26da71776a3abb Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH 057/703] BCM2708: Add core Device Tree support
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
13 BCM2708: DT: change 'axi' nodename to 'soc'
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
21 BCM2708_DT: Correct length of the peripheral space
23 Use dts-dirs feature for overlays.
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
29 BCM270X_DT: configure I2S DMA channels
31 Signed-off-by: Matthias Reichl <hias@horus.com>
33 BCM270X_DT: switch to bcm2835-i2s
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
43 Signed-off-by: Matthias Reichl <hias@horus.com>
45 SDIO-overlay: add poll_once-boolean parameter
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
52 BCM270X_DT: Make mmc overlay compatible with current firmware
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
65 bcm270x_dt: Use the sdhost MMC controller by default
67 The "mmc" overlay reverts to using the other controller.
69 squash: Add cprman to dt
71 BCM270X_DT: Use clk_core for I2C interfaces
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
79 Mainline dts files are based on these files:
82 bcm2835.dtsi bcm2836.dtsi
85 Current downstream are based on these:
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
90 This patch introduces this dependency:
92 bcm2708.dtsi bcm2709.dtsi
95 bcm2835.dtsi bcm2836.dtsi
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
129 Use the raspberrypi-power driver to turn on USB power.
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
133 BCM270X_DT: Add a .dtbo target, use for overlays
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
145 BCM270X_DT: Don't generate "linux,phandle" props
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
156 Works on SPI2 for compute module
158 BCM270X_DT: Add midi-uart0 overlay
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
166 BCM270X_DT: Add i2c-sensor overlay
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
176 We now create overlays as .dtbo files.
178 build: support for .dtbo files for dtb overlays
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
192 Signed-off-by: Eric Anholt <eric@anholt.net>
194 BCM270X_DT: RPi Device Tree tidy
196 Use the upstream sdhost node, add thermal-zones, and factor out some
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
201 kbuild: Silence unhelpful DTC warnings
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
206 arch/arm/Makefile | 2 +
207 arch/arm/boot/dts/Makefile | 21 +
208 arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 166 ++
209 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 122 ++
210 arch/arm/boot/dts/bcm2708-rpi-b.dts | 112 +
211 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 95 +
212 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 17 +
213 arch/arm/boot/dts/bcm2708-rpi.dtsi | 159 ++
214 arch/arm/boot/dts/bcm2708.dtsi | 11 +
215 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 123 ++
216 arch/arm/boot/dts/bcm2709.dtsi | 19 +
217 arch/arm/boot/dts/bcm270x.dtsi | 152 ++
218 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 ++
219 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 191 ++
220 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 129 ++
221 arch/arm/boot/dts/bcm2710.dtsi | 29 +
222 arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
223 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 17 +
224 arch/arm/boot/dts/overlays/Makefile | 145 ++
225 arch/arm/boot/dts/overlays/README | 1952 +++++++++++++++++
226 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
227 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
228 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
229 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
230 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
231 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
232 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
233 .../dts/overlays/allo-digione-overlay.dts | 44 +
234 .../allo-katana-dac-audio-overlay.dts | 57 +
235 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
236 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 +
237 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
238 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
239 .../overlays/audioinjector-addons-overlay.dts | 59 +
240 .../audioinjector-wm8731-audio-overlay.dts | 39 +
241 .../boot/dts/overlays/audremap-overlay.dts | 19 +
242 .../boot/dts/overlays/balena-fin-overlay.dts | 79 +
243 .../overlays/bmp085_i2c-sensor-overlay.dts | 23 +
244 arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 +
245 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
246 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
247 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 +
248 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 +
249 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 20 +
250 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 28 +
251 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
252 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
253 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
254 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
255 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
256 .../googlevoicehat-soundcard-overlay.dts | 49 +
257 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 48 +
258 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
259 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
260 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
261 .../dts/overlays/gpio-poweroff-overlay.dts | 36 +
262 .../dts/overlays/gpio-shutdown-overlay.dts | 80 +
263 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
264 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
265 .../overlays/hifiberry-dacplus-overlay.dts | 59 +
266 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
267 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
268 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
269 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 ++
270 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
271 .../boot/dts/overlays/i2c-gpio-overlay.dts | 43 +
272 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 ++
273 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
274 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 183 ++
275 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 181 ++
276 .../boot/dts/overlays/i2c-sensor-overlay.dts | 223 ++
277 .../dts/overlays/i2c0-bcm2708-overlay.dts | 69 +
278 .../dts/overlays/i2c1-bcm2708-overlay.dts | 43 +
279 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
280 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
281 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
282 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
283 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 +++
284 .../dts/overlays/justboom-dac-overlay.dts | 46 +
285 .../dts/overlays/justboom-digi-overlay.dts | 41 +
286 .../boot/dts/overlays/lirc-rpi-overlay.dts | 57 +
287 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
288 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
289 .../boot/dts/overlays/mcp23017-overlay.dts | 54 +
290 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++++
291 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
292 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
293 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++
294 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++
295 .../dts/overlays/media-center-overlay.dts | 134 ++
296 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
297 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
298 arch/arm/boot/dts/overlays/mmc-overlay.dts | 39 +
299 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 +
300 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
301 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
302 .../boot/dts/overlays/pi3-act-led-overlay.dts | 27 +
303 .../dts/overlays/pi3-disable-bt-overlay.dts | 46 +
304 .../dts/overlays/pi3-disable-wifi-overlay.dts | 13 +
305 .../dts/overlays/pi3-miniuart-bt-overlay.dts | 74 +
306 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
307 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
308 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
309 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
310 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
311 .../overlays/pitft28-capacitive-overlay.dts | 91 +
312 .../overlays/pitft28-resistive-overlay.dts | 121 +
313 .../overlays/pitft35-resistive-overlay.dts | 121 +
314 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
315 .../boot/dts/overlays/pwm-2chan-overlay.dts | 47 +
316 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
317 arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 +
318 .../arm/boot/dts/overlays/qca7000-overlay.dts | 52 +
319 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
320 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
321 .../overlays/rpi-cirrus-wm5102-overlay.dts | 146 ++
322 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
323 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
324 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 30 +
325 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
326 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
327 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 31 +
328 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
329 .../dts/overlays/sc16is750-i2c-overlay.dts | 37 +
330 .../dts/overlays/sc16is752-i2c-overlay.dts | 40 +
331 .../dts/overlays/sc16is752-spi1-overlay.dts | 61 +
332 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 31 +
333 .../boot/dts/overlays/sdio-1bit-overlay.dts | 63 +
334 arch/arm/boot/dts/overlays/sdio-overlay.dts | 63 +
335 .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 +
336 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 18 +
337 .../boot/dts/overlays/smi-nand-overlay.dts | 69 +
338 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
339 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
340 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 +
341 .../arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 +
342 .../boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +
343 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
344 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
345 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
346 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
347 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
348 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
349 .../dts/overlays/superaudioboard-overlay.dts | 73 +
350 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++++++++
351 .../boot/dts/overlays/tinylcd35-overlay.dts | 224 ++
352 arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
353 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
354 .../upstream-aux-interrupt-overlay.dts | 33 +
355 .../boot/dts/overlays/upstream-overlay.dts | 154 ++
356 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 89 +
357 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 151 ++
358 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
359 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 41 +
360 .../dts/overlays/w1-gpio-pullup-overlay.dts | 43 +
361 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
362 scripts/Makefile.dtbinst | 8 +-
363 scripts/Makefile.lib | 13 +
364 159 files changed, 14852 insertions(+), 4 deletions(-)
365 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-0-w.dts
366 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
367 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
368 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
369 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
370 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
371 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
372 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
373 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
374 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
375 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
376 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
377 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
378 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
379 create mode 100644 arch/arm/boot/dts/overlays/Makefile
380 create mode 100644 arch/arm/boot/dts/overlays/README
381 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
382 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
383 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
384 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
385 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
386 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
387 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
388 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
389 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
390 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
391 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
392 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
393 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
394 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
395 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
396 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
397 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
398 create mode 100644 arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
399 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
400 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
401 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
402 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
403 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
404 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
405 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
406 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
407 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
408 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
409 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
410 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
411 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
412 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
413 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
414 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
415 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
416 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
417 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
418 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
419 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
420 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
421 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
422 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
423 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
424 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
425 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
426 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
427 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
428 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
429 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
430 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
431 create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
432 create mode 100644 arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
433 create mode 100644 arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
434 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
435 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
436 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
437 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
438 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
439 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
440 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
441 create mode 100644 arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
442 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
443 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
444 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
445 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
446 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
447 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
448 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
449 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
450 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
451 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
452 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
453 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
454 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
455 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
456 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
457 create mode 100644 arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
458 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
459 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
460 create mode 100644 arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
461 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
462 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
463 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
464 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
465 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
466 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
467 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
468 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
469 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
470 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
471 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
472 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
473 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
474 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
475 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
476 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
477 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
478 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
479 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
480 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
481 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
482 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
483 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
484 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
485 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
486 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
487 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
488 create mode 100644 arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
489 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
490 create mode 100644 arch/arm/boot/dts/overlays/sdtweak-overlay.dts
491 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
492 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
493 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
494 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
495 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
496 create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
497 create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
498 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
499 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
500 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
501 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
502 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
503 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
504 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
505 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
506 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
507 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
508 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
509 create mode 100644 arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
510 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
511 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
512 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
513 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
514 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
515 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
516 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
529 --- a/arch/arm/Makefile
530 +++ b/arch/arm/Makefile
531 @@ -341,6 +341,8 @@ $(INSTALL_TARGETS):
534 $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
536 + $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
538 PHONY += dtbs dtbs_install
540 --- a/arch/arm/boot/dts/Makefile
541 +++ b/arch/arm/boot/dts/Makefile
543 # SPDX-License-Identifier: GPL-2.0
545 +dtb-$(CONFIG_ARCH_BCM2835) += \
546 + bcm2708-rpi-b.dtb \
547 + bcm2708-rpi-b-plus.dtb \
548 + bcm2708-rpi-cm.dtb \
549 + bcm2708-rpi-0-w.dtb \
550 + bcm2709-rpi-2-b.dtb \
551 + bcm2710-rpi-3-b.dtb \
552 + bcm2710-rpi-3-b-plus.dtb \
553 + bcm2710-rpi-cm3.dtb
555 dtb-$(CONFIG_ARCH_ALPINE) += \
557 dtb-$(CONFIG_MACH_ARTPEC6) += \
558 @@ -1207,3 +1218,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
559 aspeed-bmc-opp-zaius.dtb \
560 aspeed-bmc-portwell-neptune.dtb \
561 aspeed-bmc-quanta-q71l.dtb
563 +targets += dtbs dtbs_install
566 +subdir-y := overlays
568 +# Enable fixups to support overlays on BCM2835 platforms
569 +ifeq ($(CONFIG_ARCH_BCM2835),y)
573 +++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts
577 +#include "bcm2708.dtsi"
580 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
581 + model = "Raspberry Pi Zero W";
584 + bootargs = "8250.nr_uarts=1";
594 + spi0_pins: spi0_pins {
595 + brcm,pins = <9 10 11>;
596 + brcm,function = <4>; /* alt0 */
599 + spi0_cs_pins: spi0_cs_pins {
601 + brcm,function = <1>; /* output */
606 + brcm,function = <4>;
611 + brcm,function = <4>;
615 + brcm,pins = <18 19 20 21>;
616 + brcm,function = <4>; /* alt0 */
619 + sdio_pins: sdio_pins {
620 + brcm,pins = <34 35 36 37 38 39>;
621 + brcm,function = <7>; /* ALT3 = SD1 */
622 + brcm,pull = <0 2 2 2 2 2>;
627 + brcm,function = <4>; /* alt0:GPCLK2 */
628 + brcm,pull = <0>; /* none */
631 + uart0_pins: uart0_pins {
632 + brcm,pins = <30 31 32 33>;
633 + brcm,function = <7>; /* alt3=UART0 */
634 + brcm,pull = <2 0 0 2>; /* up none none up */
637 + uart1_pins: uart1_pins {
643 + audio_pins: audio_pins {
645 + brcm,function = <>;
650 + pinctrl-names = "default";
651 + pinctrl-0 = <&sdio_pins>;
658 + pinctrl-names = "default";
659 + pinctrl-0 = <&uart0_pins &bt_pins>;
664 + pinctrl-names = "default";
665 + pinctrl-0 = <&uart1_pins>;
670 + pinctrl-names = "default";
671 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
672 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
675 + compatible = "spidev";
676 + reg = <0>; /* CE0 */
677 + #address-cells = <1>;
679 + spi-max-frequency = <125000000>;
683 + compatible = "spidev";
684 + reg = <1>; /* CE1 */
685 + #address-cells = <1>;
687 + spi-max-frequency = <125000000>;
692 + pinctrl-names = "default";
693 + pinctrl-0 = <&i2c0_pins>;
694 + clock-frequency = <100000>;
698 + pinctrl-names = "default";
699 + pinctrl-0 = <&i2c1_pins>;
700 + clock-frequency = <100000>;
704 + clock-frequency = <100000>;
708 + #sound-dai-cells = <0>;
709 + pinctrl-names = "default";
710 + pinctrl-0 = <&i2s_pins>;
720 + linux,default-trigger = "mmc0";
721 + gpios = <&gpio 47 0>;
726 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
730 + pinctrl-names = "default";
731 + pinctrl-0 = <&audio_pins>;
736 + act_led_gpio = <&act_led>,"gpios:4";
737 + act_led_activelow = <&act_led>,"gpios:8";
738 + act_led_trigger = <&act_led>,"linux,default-trigger";
742 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
746 +#include "bcm2708.dtsi"
747 +#include "bcm283x-rpi-smsc9514.dtsi"
750 + model = "Raspberry Pi Model B+";
754 + spi0_pins: spi0_pins {
755 + brcm,pins = <9 10 11>;
756 + brcm,function = <4>; /* alt0 */
759 + spi0_cs_pins: spi0_cs_pins {
761 + brcm,function = <1>; /* output */
766 + brcm,function = <4>;
771 + brcm,function = <4>;
775 + brcm,pins = <18 19 20 21>;
776 + brcm,function = <4>; /* alt0 */
779 + audio_pins: audio_pins {
780 + brcm,pins = <40 45>;
781 + brcm,function = <4>;
790 + pinctrl-names = "default";
791 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
792 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
795 + compatible = "spidev";
796 + reg = <0>; /* CE0 */
797 + #address-cells = <1>;
799 + spi-max-frequency = <125000000>;
803 + compatible = "spidev";
804 + reg = <1>; /* CE1 */
805 + #address-cells = <1>;
807 + spi-max-frequency = <125000000>;
812 + pinctrl-names = "default";
813 + pinctrl-0 = <&i2c0_pins>;
814 + clock-frequency = <100000>;
818 + pinctrl-names = "default";
819 + pinctrl-0 = <&i2c1_pins>;
820 + clock-frequency = <100000>;
824 + clock-frequency = <100000>;
828 + pinctrl-names = "default";
829 + pinctrl-0 = <&i2s_pins>;
835 + linux,default-trigger = "mmc0";
836 + gpios = <&gpio 47 0>;
841 + linux,default-trigger = "input";
842 + gpios = <&gpio 35 0>;
847 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
851 + pinctrl-names = "default";
852 + pinctrl-0 = <&audio_pins>;
857 + act_led_gpio = <&act_led>,"gpios:4";
858 + act_led_activelow = <&act_led>,"gpios:8";
859 + act_led_trigger = <&act_led>,"linux,default-trigger";
861 + pwr_led_gpio = <&pwr_led>,"gpios:4";
862 + pwr_led_activelow = <&pwr_led>,"gpios:8";
863 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
867 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
871 +#include "bcm2708.dtsi"
872 +#include "bcm283x-rpi-smsc9512.dtsi"
875 + model = "Raspberry Pi Model B";
879 + spi0_pins: spi0_pins {
880 + brcm,pins = <9 10 11>;
881 + brcm,function = <4>; /* alt0 */
884 + spi0_cs_pins: spi0_cs_pins {
886 + brcm,function = <1>; /* output */
891 + brcm,function = <4>;
896 + brcm,function = <4>;
900 + brcm,pins = <28 29 30 31>;
901 + brcm,function = <6>; /* alt2 */
904 + audio_pins: audio_pins {
905 + brcm,pins = <40 45>;
906 + brcm,function = <4>;
915 + pinctrl-names = "default";
916 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
917 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
920 + compatible = "spidev";
921 + reg = <0>; /* CE0 */
922 + #address-cells = <1>;
924 + spi-max-frequency = <125000000>;
928 + compatible = "spidev";
929 + reg = <1>; /* CE1 */
930 + #address-cells = <1>;
932 + spi-max-frequency = <125000000>;
937 + pinctrl-names = "default";
938 + pinctrl-0 = <&i2c0_pins>;
939 + clock-frequency = <100000>;
943 + pinctrl-names = "default";
944 + pinctrl-0 = <&i2c1_pins>;
945 + clock-frequency = <100000>;
949 + clock-frequency = <100000>;
953 + pinctrl-names = "default";
954 + pinctrl-0 = <&i2s_pins>;
960 + linux,default-trigger = "mmc0";
961 + gpios = <&gpio 16 1>;
966 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
970 + pinctrl-names = "default";
971 + pinctrl-0 = <&audio_pins>;
976 + act_led_gpio = <&act_led>,"gpios:4";
977 + act_led_activelow = <&act_led>,"gpios:8";
978 + act_led_trigger = <&act_led>,"linux,default-trigger";
982 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
986 +#include "bcm2708-rpi-cm.dtsi"
989 + model = "Raspberry Pi Compute Module";
997 + spi0_pins: spi0_pins {
998 + brcm,pins = <9 10 11>;
999 + brcm,function = <4>; /* alt0 */
1002 + spi0_cs_pins: spi0_cs_pins {
1003 + brcm,pins = <8 7>;
1004 + brcm,function = <1>; /* output */
1008 + brcm,pins = <0 1>;
1009 + brcm,function = <4>;
1013 + brcm,pins = <2 3>;
1014 + brcm,function = <4>;
1018 + brcm,pins = <18 19 20 21>;
1019 + brcm,function = <4>; /* alt0 */
1022 + audio_pins: audio_pins {
1029 + pinctrl-names = "default";
1030 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1031 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1033 + spidev0: spidev@0{
1034 + compatible = "spidev";
1035 + reg = <0>; /* CE0 */
1036 + #address-cells = <1>;
1037 + #size-cells = <0>;
1038 + spi-max-frequency = <125000000>;
1041 + spidev1: spidev@1{
1042 + compatible = "spidev";
1043 + reg = <1>; /* CE1 */
1044 + #address-cells = <1>;
1045 + #size-cells = <0>;
1046 + spi-max-frequency = <125000000>;
1051 + pinctrl-names = "default";
1052 + pinctrl-0 = <&i2c0_pins>;
1053 + clock-frequency = <100000>;
1057 + pinctrl-names = "default";
1058 + pinctrl-0 = <&i2c1_pins>;
1059 + clock-frequency = <100000>;
1063 + clock-frequency = <100000>;
1067 + pinctrl-names = "default";
1068 + pinctrl-0 = <&i2s_pins>;
1072 + pinctrl-names = "default";
1073 + pinctrl-0 = <&audio_pins>;
1077 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1080 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1082 +#include "bcm2708.dtsi"
1087 + linux,default-trigger = "mmc0";
1088 + gpios = <&gpio 47 0>;
1094 + act_led_gpio = <&act_led>,"gpios:4";
1095 + act_led_activelow = <&act_led>,"gpios:8";
1096 + act_led_trigger = <&act_led>,"linux,default-trigger";
1100 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1102 +/* Downstream version of bcm2835-rpi.dtsi */
1104 +#include <dt-bindings/power/raspberrypi-power.h>
1108 + device_type = "memory";
1119 + watchdog = &watchdog;
1121 + mailbox = &mailbox;
1139 + thermal = &thermal;
1140 + axiperf = &axiperf;
1144 + compatible = "gpio-leds";
1149 + compatible = "brcm,bcm2835-gpiomem";
1150 + reg = <0x7e200000 0x1000>;
1153 + firmware: firmware {
1154 + compatible = "raspberrypi,bcm2835-firmware";
1155 + mboxes = <&mailbox>;
1159 + compatible = "raspberrypi,bcm2835-power";
1160 + firmware = <&firmware>;
1161 + #power-domain-cells = <1>;
1165 + compatible = "brcm,bcm2708-fb";
1166 + firmware = <&firmware>;
1167 + status = "disabled";
1170 + mailbox@7e00b840 {
1171 + compatible = "brcm,bcm2835-vchiq";
1172 + reg = <0x7e00b840 0x3c>;
1173 + interrupts = <0 2>;
1177 + compatible = "raspberrypi,bcm2835-vcsm";
1178 + firmware = <&firmware>;
1182 + /* Onboard audio */
1184 + compatible = "brcm,bcm2835-audio";
1185 + brcm,pwm-channels = <8>;
1186 + status = "disabled";
1189 + /* External sound card */
1191 + status = "disabled";
1198 + uart0 = <&uart0>,"status";
1199 + uart1 = <&uart1>,"status";
1200 + i2s = <&i2s>,"status";
1201 + spi = <&spi0>,"status";
1202 + i2c0 = <&i2c0>,"status";
1203 + i2c1 = <&i2c1>,"status";
1204 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1205 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
1206 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
1207 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1209 + audio = <&audio>,"status";
1210 + watchdog = <&watchdog>,"status";
1211 + random = <&random>,"status";
1212 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
1213 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
1214 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
1215 + sd_debug = <&sdhost>,"brcm,debug";
1216 + sdio_overclock = <&mmc>,"brcm,overclock-50:0";
1217 + axiperf = <&axiperf>,"status";
1222 + brcm,dma-channel-mask = <0x7f34>;
1226 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1230 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
1234 + firmware = <&firmware>;
1237 +sdhost_pins: &sdhost_gpio48 {
1242 + pinctrl-names = "default";
1243 + pinctrl-0 = <&sdhost_gpio48>;
1245 + brcm,overclock-50 = <0>;
1246 + brcm,pio-limit = <1>;
1255 + /delete-node/ trips;
1259 + status = "disabled";
1262 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1264 +#include "bcm2835.dtsi"
1265 +#include "bcm270x.dtsi"
1266 +#include "bcm2708-rpi.dtsi"
1269 + /delete-node/ cpus;
1276 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1280 +#include "bcm2709.dtsi"
1281 +#include "bcm283x-rpi-smsc9514.dtsi"
1284 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1285 + model = "Raspberry Pi 2 Model B";
1289 + spi0_pins: spi0_pins {
1290 + brcm,pins = <9 10 11>;
1291 + brcm,function = <4>; /* alt0 */
1294 + spi0_cs_pins: spi0_cs_pins {
1295 + brcm,pins = <8 7>;
1296 + brcm,function = <1>; /* output */
1300 + brcm,pins = <0 1>;
1301 + brcm,function = <4>;
1305 + brcm,pins = <2 3>;
1306 + brcm,function = <4>;
1310 + brcm,pins = <18 19 20 21>;
1311 + brcm,function = <4>; /* alt0 */
1314 + audio_pins: audio_pins {
1315 + brcm,pins = <40 45>;
1316 + brcm,function = <4>;
1325 + pinctrl-names = "default";
1326 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1327 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1329 + spidev0: spidev@0{
1330 + compatible = "spidev";
1331 + reg = <0>; /* CE0 */
1332 + #address-cells = <1>;
1333 + #size-cells = <0>;
1334 + spi-max-frequency = <125000000>;
1337 + spidev1: spidev@1{
1338 + compatible = "spidev";
1339 + reg = <1>; /* CE1 */
1340 + #address-cells = <1>;
1341 + #size-cells = <0>;
1342 + spi-max-frequency = <125000000>;
1347 + pinctrl-names = "default";
1348 + pinctrl-0 = <&i2c0_pins>;
1349 + clock-frequency = <100000>;
1353 + pinctrl-names = "default";
1354 + pinctrl-0 = <&i2c1_pins>;
1355 + clock-frequency = <100000>;
1359 + clock-frequency = <100000>;
1363 + pinctrl-names = "default";
1364 + pinctrl-0 = <&i2s_pins>;
1370 + linux,default-trigger = "mmc0";
1371 + gpios = <&gpio 47 0>;
1376 + linux,default-trigger = "input";
1377 + gpios = <&gpio 35 0>;
1382 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1386 + pinctrl-names = "default";
1387 + pinctrl-0 = <&audio_pins>;
1392 + act_led_gpio = <&act_led>,"gpios:4";
1393 + act_led_activelow = <&act_led>,"gpios:8";
1394 + act_led_trigger = <&act_led>,"linux,default-trigger";
1396 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1397 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1398 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1402 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1404 +#include "bcm2836.dtsi"
1405 +#include "bcm270x.dtsi"
1406 +#include "bcm2708-rpi.dtsi"
1410 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1411 + <0x40000000 0x40000000 0x00040000>;
1413 + /delete-node/ timer@7e003000;
1417 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1418 + <&v7_cpu1>, "clock-frequency:0",
1419 + <&v7_cpu2>, "clock-frequency:0",
1420 + <&v7_cpu3>, "clock-frequency:0";
1424 +++ b/arch/arm/boot/dts/bcm270x.dtsi
1426 +/* Downstream bcm283x.dtsi diff */
1427 +#include <dt-bindings/power/raspberrypi-power.h>
1432 + /delete-property/ stdout-path;
1437 + watchdog: watchdog@7e100000 {
1441 + random: rng@7e104000 {
1445 + gpio@7e200000 { /* gpio */
1446 + interrupts = <2 17>, <2 18>;
1449 + serial@7e201000 { /* uart0 */
1450 + /* Enable CTS bug workaround */
1451 + cts-event-workaround;
1454 + i2s@7e203000 { /* i2s */
1455 + #sound-dai-cells = <0>;
1456 + reg = <0x7e203000 0x24>;
1457 + clocks = <&clocks BCM2835_CLOCK_PCM>;
1460 + spi0: spi@7e204000 {
1462 + dmas = <&dma 6>, <&dma 7>;
1463 + dma-names = "tx", "rx";
1466 + pixelvalve0: pixelvalve@7e206000 {
1468 + status = "disabled";
1471 + pixelvalve1: pixelvalve@7e207000 {
1473 + status = "disabled";
1476 + dpi: dpi@7e208000 {
1477 + compatible = "brcm,bcm2835-dpi";
1478 + reg = <0x7e208000 0x8c>;
1479 + clocks = <&clocks BCM2835_CLOCK_VPU>,
1480 + <&clocks BCM2835_CLOCK_DPI>;
1481 + clock-names = "core", "pixel";
1482 + #address-cells = <1>;
1483 + #size-cells = <0>;
1484 + status = "disabled";
1487 + /delete-node/ sdhci@7e300000;
1489 + mmc: mmc@7e300000 {
1490 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
1491 + reg = <0x7e300000 0x100>;
1492 + interrupts = <2 30>;
1493 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
1495 + dma-names = "rx-tx";
1496 + brcm,overclock-50 = <0>;
1497 + status = "disabled";
1500 + hvs: hvs@7e400000 {
1502 + status = "disabled";
1505 + firmwarekms: firmwarekms@7e600000 {
1506 + compatible = "raspberrypi,rpi-firmware-kms";
1507 + /* SMI interrupt reg */
1508 + reg = <0x7e600000 0x100>;
1509 + interrupts = <2 16>;
1510 + brcm,firmware = <&firmware>;
1511 + status = "disabled";
1514 + smi: smi@7e600000 {
1515 + compatible = "brcm,bcm2835-smi";
1516 + reg = <0x7e600000 0x100>;
1517 + interrupts = <2 16>;
1518 + clocks = <&clocks BCM2835_CLOCK_SMI>;
1519 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
1520 + assigned-clock-rates = <125000000>;
1522 + dma-names = "rx-tx";
1523 + status = "disabled";
1526 + pixelvalve2: pixelvalve@7e807000 {
1528 + status = "disabled";
1531 + hdmi@7e902000 { /* hdmi */
1532 + status = "disabled";
1535 + usb@7e980000 { /* usb */
1536 + compatible = "brcm,bcm2708-usb";
1537 + reg = <0x7e980000 0x10000>,
1538 + <0x7e006000 0x1000>;
1539 + interrupts = <2 0>,
1543 + v3d@7ec00000 { /* vd3 */
1544 + compatible = "brcm,vc4-v3d";
1545 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
1546 + status = "disabled";
1549 + axiperf: axiperf {
1550 + compatible = "brcm,bcm2835-axiperf";
1551 + reg = <0x7e009800 0x100>,
1552 + <0x7ee08000 0x100>;
1553 + firmware = <&firmware>;
1554 + status = "disabled";
1558 + vdd_5v0_reg: fixedregulator_5v0 {
1559 + compatible = "regulator-fixed";
1560 + regulator-name = "5v0";
1561 + regulator-min-microvolt = <5000000>;
1562 + regulator-max-microvolt = <5000000>;
1563 + regulator-always-on;
1566 + vdd_3v3_reg: fixedregulator_3v3 {
1567 + compatible = "regulator-fixed";
1568 + regulator-name = "3v3";
1569 + regulator-min-microvolt = <3300000>;
1570 + regulator-max-microvolt = <3300000>;
1571 + regulator-always-on;
1576 + status = "disabled";
1579 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
1583 +#include "bcm2710.dtsi"
1584 +#include "bcm283x-rpi-lan7515.dtsi"
1587 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
1588 + model = "Raspberry Pi 3 Model B+";
1591 + bootargs = "8250.nr_uarts=1";
1601 + spi0_pins: spi0_pins {
1602 + brcm,pins = <9 10 11>;
1603 + brcm,function = <4>; /* alt0 */
1606 + spi0_cs_pins: spi0_cs_pins {
1607 + brcm,pins = <8 7>;
1608 + brcm,function = <1>; /* output */
1612 + brcm,pins = <0 1>;
1613 + brcm,function = <4>;
1617 + brcm,pins = <2 3>;
1618 + brcm,function = <4>;
1622 + brcm,pins = <18 19 20 21>;
1623 + brcm,function = <4>; /* alt0 */
1626 + sdio_pins: sdio_pins {
1627 + brcm,pins = <34 35 36 37 38 39>;
1628 + brcm,function = <7>; // alt3 = SD1
1629 + brcm,pull = <0 2 2 2 2 2>;
1632 + bt_pins: bt_pins {
1634 + brcm,function = <4>; /* alt0:GPCLK2 */
1638 + uart0_pins: uart0_pins {
1639 + brcm,pins = <32 33>;
1640 + brcm,function = <7>; /* alt3=UART0 */
1641 + brcm,pull = <0 2>;
1644 + uart1_pins: uart1_pins {
1650 + audio_pins: audio_pins {
1651 + brcm,pins = <40 41>;
1652 + brcm,function = <4>;
1657 + pinctrl-names = "default";
1658 + pinctrl-0 = <&sdio_pins>;
1662 + brcm,overclock-50 = <0>;
1666 + expgpio: expgpio {
1667 + compatible = "brcm,bcm2835-expgpio";
1669 + #gpio-cells = <2>;
1670 + firmware = <&firmware>;
1676 + pinctrl-names = "default";
1677 + pinctrl-0 = <&uart0_pins &bt_pins>;
1682 + pinctrl-names = "default";
1683 + pinctrl-0 = <&uart1_pins>;
1688 + pinctrl-names = "default";
1689 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1690 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1692 + spidev0: spidev@0{
1693 + compatible = "spidev";
1694 + reg = <0>; /* CE0 */
1695 + #address-cells = <1>;
1696 + #size-cells = <0>;
1697 + spi-max-frequency = <125000000>;
1700 + spidev1: spidev@1{
1701 + compatible = "spidev";
1702 + reg = <1>; /* CE1 */
1703 + #address-cells = <1>;
1704 + #size-cells = <0>;
1705 + spi-max-frequency = <125000000>;
1710 + pinctrl-names = "default";
1711 + pinctrl-0 = <&i2c0_pins>;
1712 + clock-frequency = <100000>;
1716 + pinctrl-names = "default";
1717 + pinctrl-0 = <&i2c1_pins>;
1718 + clock-frequency = <100000>;
1722 + clock-frequency = <100000>;
1726 + pinctrl-names = "default";
1727 + pinctrl-0 = <&i2s_pins>;
1733 + linux,default-trigger = "mmc0";
1734 + gpios = <&gpio 29 0>;
1739 + linux,default-trigger = "default-on";
1740 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
1745 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
1749 + pinctrl-names = "default";
1750 + pinctrl-0 = <&audio_pins>;
1755 + act_led_gpio = <&act_led>,"gpios:4";
1756 + act_led_activelow = <&act_led>,"gpios:8";
1757 + act_led_trigger = <&act_led>,"linux,default-trigger";
1759 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1760 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1761 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1765 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
1769 +#include "bcm2710.dtsi"
1770 +#include "bcm283x-rpi-smsc9514.dtsi"
1773 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
1774 + model = "Raspberry Pi 3 Model B";
1777 + bootargs = "8250.nr_uarts=1";
1787 + spi0_pins: spi0_pins {
1788 + brcm,pins = <9 10 11>;
1789 + brcm,function = <4>; /* alt0 */
1792 + spi0_cs_pins: spi0_cs_pins {
1793 + brcm,pins = <8 7>;
1794 + brcm,function = <1>; /* output */
1798 + brcm,pins = <0 1>;
1799 + brcm,function = <4>;
1803 + brcm,pins = <2 3>;
1804 + brcm,function = <4>;
1808 + brcm,pins = <18 19 20 21>;
1809 + brcm,function = <4>; /* alt0 */
1812 + sdio_pins: sdio_pins {
1813 + brcm,pins = <34 35 36 37 38 39>;
1814 + brcm,function = <7>; // alt3 = SD1
1815 + brcm,pull = <0 2 2 2 2 2>;
1818 + bt_pins: bt_pins {
1820 + brcm,function = <4>; /* alt0:GPCLK2 */
1824 + uart0_pins: uart0_pins {
1825 + brcm,pins = <32 33>;
1826 + brcm,function = <7>; /* alt3=UART0 */
1827 + brcm,pull = <0 2>;
1830 + uart1_pins: uart1_pins {
1836 + audio_pins: audio_pins {
1837 + brcm,pins = <40 41>;
1838 + brcm,function = <4>;
1843 + pinctrl-names = "default";
1844 + pinctrl-0 = <&sdio_pins>;
1848 + brcm,overclock-50 = <0>;
1852 + virtgpio: virtgpio {
1853 + compatible = "brcm,bcm2835-virtgpio";
1855 + #gpio-cells = <2>;
1856 + firmware = <&firmware>;
1860 + expgpio: expgpio {
1861 + compatible = "brcm,bcm2835-expgpio";
1863 + #gpio-cells = <2>;
1864 + firmware = <&firmware>;
1870 + pinctrl-names = "default";
1871 + pinctrl-0 = <&uart0_pins &bt_pins>;
1876 + pinctrl-names = "default";
1877 + pinctrl-0 = <&uart1_pins>;
1882 + pinctrl-names = "default";
1883 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1884 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1886 + spidev0: spidev@0{
1887 + compatible = "spidev";
1888 + reg = <0>; /* CE0 */
1889 + #address-cells = <1>;
1890 + #size-cells = <0>;
1891 + spi-max-frequency = <125000000>;
1894 + spidev1: spidev@1{
1895 + compatible = "spidev";
1896 + reg = <1>; /* CE1 */
1897 + #address-cells = <1>;
1898 + #size-cells = <0>;
1899 + spi-max-frequency = <125000000>;
1904 + pinctrl-names = "default";
1905 + pinctrl-0 = <&i2c0_pins>;
1906 + clock-frequency = <100000>;
1910 + pinctrl-names = "default";
1911 + pinctrl-0 = <&i2c1_pins>;
1912 + clock-frequency = <100000>;
1916 + clock-frequency = <100000>;
1920 + pinctrl-names = "default";
1921 + pinctrl-0 = <&i2s_pins>;
1927 + linux,default-trigger = "mmc0";
1928 + gpios = <&virtgpio 0 0>;
1933 + linux,default-trigger = "input";
1934 + gpios = <&expgpio 7 0>;
1939 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
1943 + pinctrl-names = "default";
1944 + pinctrl-0 = <&audio_pins>;
1949 + act_led_gpio = <&act_led>,"gpios:4";
1950 + act_led_activelow = <&act_led>,"gpios:8";
1951 + act_led_trigger = <&act_led>,"linux,default-trigger";
1953 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1954 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1955 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1959 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
1963 +#include "bcm2710.dtsi"
1966 + model = "Raspberry Pi Compute Module 3";
1974 + spi0_pins: spi0_pins {
1975 + brcm,pins = <9 10 11>;
1976 + brcm,function = <4>; /* alt0 */
1979 + spi0_cs_pins: spi0_cs_pins {
1980 + brcm,pins = <8 7>;
1981 + brcm,function = <1>; /* output */
1985 + brcm,pins = <0 1>;
1986 + brcm,function = <4>;
1990 + brcm,pins = <2 3>;
1991 + brcm,function = <4>;
1995 + brcm,pins = <18 19 20 21>;
1996 + brcm,function = <4>; /* alt0 */
1999 + audio_pins: audio_pins {
2006 + virtgpio: virtgpio {
2007 + compatible = "brcm,bcm2835-virtgpio";
2009 + #gpio-cells = <2>;
2010 + firmware = <&firmware>;
2014 + expgpio: expgpio {
2015 + compatible = "brcm,bcm2835-expgpio";
2017 + #gpio-cells = <2>;
2018 + firmware = <&firmware>;
2024 + pinctrl-names = "default";
2025 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2026 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2028 + spidev0: spidev@0{
2029 + compatible = "spidev";
2030 + reg = <0>; /* CE0 */
2031 + #address-cells = <1>;
2032 + #size-cells = <0>;
2033 + spi-max-frequency = <125000000>;
2036 + spidev1: spidev@1{
2037 + compatible = "spidev";
2038 + reg = <1>; /* CE1 */
2039 + #address-cells = <1>;
2040 + #size-cells = <0>;
2041 + spi-max-frequency = <125000000>;
2046 + pinctrl-names = "default";
2047 + pinctrl-0 = <&i2c0_pins>;
2048 + clock-frequency = <100000>;
2052 + pinctrl-names = "default";
2053 + pinctrl-0 = <&i2c1_pins>;
2054 + clock-frequency = <100000>;
2058 + clock-frequency = <100000>;
2062 + pinctrl-names = "default";
2063 + pinctrl-0 = <&i2s_pins>;
2069 + linux,default-trigger = "mmc0";
2070 + gpios = <&virtgpio 0 0>;
2075 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
2079 + pinctrl-names = "default";
2080 + pinctrl-0 = <&audio_pins>;
2085 + act_led_gpio = <&act_led>,"gpios:4";
2086 + act_led_activelow = <&act_led>,"gpios:8";
2087 + act_led_trigger = <&act_led>,"linux,default-trigger";
2091 +++ b/arch/arm/boot/dts/bcm2710.dtsi
2093 +#include "bcm2837.dtsi"
2094 +#include "bcm270x.dtsi"
2095 +#include "bcm2708-rpi.dtsi"
2098 + compatible = "brcm,bcm2837", "brcm,bcm2836";
2104 + compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
2106 + compatible = "arm,cortex-a7-pmu";
2108 + interrupt-parent = <&local_intc>;
2109 + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
2112 + /delete-node/ timer@7e003000;
2116 + arm_freq = <&cpu0>, "clock-frequency:0",
2117 + <&cpu1>, "clock-frequency:0",
2118 + <&cpu2>, "clock-frequency:0",
2119 + <&cpu3>, "clock-frequency:0";
2122 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
2123 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
2127 compatible = "brcm,bcm2835-vchiq";
2128 - reg = <0x7e00b840 0xf>;
2129 + reg = <0x7e00b840 0x3c>;
2133 --- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2134 +++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2136 ethernet: ethernet@1 {
2137 compatible = "usb424,7800";
2139 + microchip,eee-enabled;
2140 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
2142 + * led0 = 1:link1000/activity
2143 + * led1 = 6:link10/100/activity
2145 + microchip,led-modes = <1 6>;
2154 + eee = <ðernet>,"microchip,eee-enabled?";
2155 + tx_lpi_timer = <ðernet>,"microchip,tx-lpi-timer:0";
2156 + eth_led0 = <ðernet>,"microchip,led-modes:0";
2157 + eth_led1 = <ðernet>,"microchip,led-modes:4";
2161 +++ b/arch/arm/boot/dts/overlays/Makefile
2163 +# Overlays for the Raspberry Pi platform
2165 +dtbo-$(CONFIG_ARCH_BCM2835) += \
2166 + adau1977-adc.dtbo \
2167 + adau7002-simple.dtbo \
2171 + akkordion-iqdacplus.dtbo \
2172 + allo-boss-dac-pcm512x-audio.dtbo \
2173 + allo-digione.dtbo \
2174 + allo-katana-dac-audio.dtbo \
2175 + allo-piano-dac-pcm512x-audio.dtbo \
2176 + allo-piano-dac-plus-pcm512x-audio.dtbo \
2177 + applepi-dac.dtbo \
2179 + audioinjector-addons.dtbo \
2180 + audioinjector-wm8731-audio.dtbo \
2183 + bmp085_i2c-sensor.dtbo \
2185 + dionaudio-loco.dtbo \
2186 + dionaudio-loco-v2.dtbo \
2192 + enc28j60-spi2.dtbo \
2194 + fe-pi-audio.dtbo \
2196 + googlevoicehat-soundcard.dtbo \
2200 + gpio-no-irq.dtbo \
2201 + gpio-poweroff.dtbo \
2202 + gpio-shutdown.dtbo \
2203 + hifiberry-amp.dtbo \
2204 + hifiberry-dac.dtbo \
2205 + hifiberry-dacplus.dtbo \
2206 + hifiberry-digi.dtbo \
2207 + hifiberry-digi-pro.dtbo \
2210 + i2c-bcm2708.dtbo \
2213 + i2c-pwm-pca9685a.dtbo \
2215 + i2c-rtc-gpio.dtbo \
2217 + i2c0-bcm2708.dtbo \
2218 + i2c1-bcm2708.dtbo \
2219 + i2s-gpio28-31.dtbo \
2220 + iqaudio-dac.dtbo \
2221 + iqaudio-dacplus.dtbo \
2222 + iqaudio-digi-wm8804-audio.dtbo \
2223 + jedec-spi-nor.dtbo \
2224 + justboom-dac.dtbo \
2225 + justboom-digi.dtbo \
2231 + mcp2515-can0.dtbo \
2232 + mcp2515-can1.dtbo \
2235 + media-center.dtbo \
2242 + pi3-act-led.dtbo \
2243 + pi3-disable-bt.dtbo \
2244 + pi3-disable-wifi.dtbo \
2245 + pi3-miniuart-bt.dtbo \
2251 + pitft28-capacitive.dtbo \
2252 + pitft28-resistive.dtbo \
2253 + pitft35-resistive.dtbo \
2259 + rotary-encoder.dtbo \
2260 + rpi-backlight.dtbo \
2261 + rpi-cirrus-wm5102.dtbo \
2263 + rpi-display.dtbo \
2268 + rra-digidac1-wm8741-audio.dtbo \
2269 + sc16is750-i2c.dtbo \
2270 + sc16is752-i2c.dtbo \
2271 + sc16is752-spi1.dtbo \
2279 + spi-gpio35-39.dtbo \
2289 + superaudioboard.dtbo \
2295 + upstream-aux-interrupt.dtbo \
2296 + vc4-fkms-v3d.dtbo \
2297 + vc4-kms-v3d.dtbo \
2300 + w1-gpio-pullup.dtbo \
2303 +targets += dtbs dtbs_install
2304 +targets += $(dtbo-y)
2306 +always := $(dtbo-y)
2307 +clean-files := *.dtbo
2309 +++ b/arch/arm/boot/dts/overlays/README
2314 +This directory contains Device Tree overlays. Device Tree makes it possible
2315 +to support many hardware configurations with a single kernel and without the
2316 +need to explicitly load or blacklist kernel modules. Note that this isn't a
2317 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
2318 +are still configured by the board support code, but the intention is to
2319 +eventually reach that goal.
2321 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
2322 +default, the Raspberry Pi kernel boots with device tree enabled. You can
2323 +completely disable DT usage (for now) by adding:
2327 +to your config.txt, which should cause your Pi to revert to the old way of
2328 +doing things after a reboot.
2330 +In /boot you will find a .dtb for each base platform. This describes the
2331 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
2332 +siblings) selects the .dtb file appropriate for the platform by name, and reads
2333 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
2334 +are disabled, but they can be enabled using Device Tree parameters:
2336 + dtparam=i2c=on,i2s=on,spi=on
2338 +However, this shouldn't be necessary in many use cases because loading an
2339 +overlay that requires one of those interfaces will cause it to be enabled
2340 +automatically, and it is advisable to only enable interfaces if they are
2343 +Configuring additional, optional hardware is done using Device Tree overlays
2346 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
2347 +not the physical pin numbers.
2352 +The Advanced Options section of the raspi-config utility can enable and disable
2353 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
2354 +is possible to both enable an interface and blacklist the driver, if for some
2355 +reason you should want to defer the loading.
2360 +As well as describing the hardware, Device Tree also gives enough information
2361 +to allow suitable driver modules to be located and loaded, with the corollary
2362 +that unneeded modules are not loaded. As a result it should be possible to
2363 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
2364 +have its contents deleted (or commented out).
2369 +Overlays are loaded using the "dtoverlay" directive. As an example, consider
2370 +the popular lirc-rpi module, the Linux Infrared Remote Control driver. In the
2371 +pre-DT world this would be loaded from /etc/modules, with an explicit
2372 +"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled,
2373 +this becomes a line in config.txt:
2375 + dtoverlay=lirc-rpi
2377 +This causes the file /boot/overlays/lirc-rpi.dtbo to be loaded. By
2378 +default it will use GPIOs 17 (out) and 18 (in), but this can be modified using
2381 + dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13
2383 +Parameters always have default values, although in some cases (e.g. "w1-gpio")
2384 +it is necessary to provided multiple overlays in order to get the desired
2385 +behaviour. See the list of overlays below for a description of the parameters
2386 +and their defaults.
2388 +The Overlay and Parameter Reference
2389 +===================================
2391 +N.B. When editing this file, please preserve the indentation levels to make it
2392 +simple to parse programmatically. NO HARD TABS.
2395 +Name: <The base DTB>
2396 +Info: Configures the base Raspberry Pi hardware
2397 +Load: <loaded automatically>
2399 + audio Set to "on" to enable the onboard ALSA audio
2400 + interface (default "off")
2402 + eee Enable Energy Efficient Ethernet support for
2403 + compatible devices (default "on"). See also
2406 + eth_led0 Set mode of LED0 (usually orange) (default
2407 + "1"). The legal values are:
2408 + 0=link/activity 1=link1000/activity
2409 + 2=link100/activity 3=link10/activity
2410 + 4=link100/1000/activity 5=link10/1000/activity
2411 + 6=link10/100/activity 14=off 15=on
2413 + eth_led1 Set mode of LED1 (usually green) (default
2414 + "6"). See eth_led0 for legal values.
2416 + i2c_arm Set to "on" to enable the ARM's i2c interface
2419 + i2c_vc Set to "on" to enable the i2c interface
2420 + usually reserved for the VideoCore processor
2423 + i2c An alias for i2c_arm
2425 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
2426 + (default "100000")
2428 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
2429 + (default "100000")
2431 + i2c_baudrate An alias for i2c_arm_baudrate
2433 + i2s Set to "on" to enable the i2s interface
2436 + spi Set to "on" to enable the spi interfaces
2439 + random Set to "on" to enable the hardware random
2440 + number generator (default "on")
2442 + sd_overclock Clock (in MHz) to use when the MMC framework
2445 + sd_force_pio Disable DMA support for SD driver (default off)
2447 + sd_pio_limit Number of blocks above which to use DMA for
2448 + SD card (default 1)
2450 + sd_debug Enable debug output from SD driver (default off)
2452 + sdio_overclock Clock (in MHz) to use when the MMC framework
2453 + requests 50MHz for the SDIO/WiFi interface.
2455 + tx_lpi_timer Set the delay in microseconds between going idle
2456 + and entering the low power state (default 600).
2457 + Requires EEE to be enabled - see "eee".
2459 + uart0 Set to "off" to disable uart0 (default "on")
2461 + uart1 Set to "on" or "off" to enable or disable uart1
2464 + watchdog Set to "on" to enable the hardware watchdog
2467 + act_led_trigger Choose which activity the LED tracks.
2468 + Use "heartbeat" for a nice load indicator.
2471 + act_led_activelow Set to "on" to invert the sense of the LED
2473 + N.B. For Pi3 see pi3-act-led overlay.
2475 + act_led_gpio Set which GPIO to use for the activity LED
2476 + (in case you want to connect it to an external
2478 + (default "16" on a non-Plus board, "47" on a
2480 + N.B. For Pi3 see pi3-act-led overlay.
2485 + As for act_led_*, but using the PWR LED.
2486 + Not available on Model A/B boards.
2488 + N.B. It is recommended to only enable those interfaces that are needed.
2489 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
2490 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
2491 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
2492 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
2493 + but deprecated because the ARM/VC assignments differ between board
2494 + revisions. The same board-specific mapping applies to i2c_baudrate,
2495 + and the other i2c baudrate parameters.
2499 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
2501 +Load: dtoverlay=adau1977-adc
2505 +Name: adau7002-simple
2506 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
2507 +Load: dtoverlay=adau7002-simple,<param>=<val>
2508 +Params: card-name Override the default, "adau7002", card name.
2512 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
2513 +Load: dtoverlay=ads1015,<param>=<val>
2514 +Params: addr I2C bus address of device. Set based on how the
2515 + addr pin is wired. (default=0x48 assumes addr
2517 + cha_enable Enable virtual channel a. (default=true)
2518 + cha_cfg Set the configuration for virtual channel a.
2519 + (default=4 configures this channel for the
2520 + voltage at A0 with respect to GND)
2521 + cha_datarate Set the datarate (samples/sec) for this channel.
2522 + (default=4 sets 1600 sps)
2523 + cha_gain Set the gain of the Programmable Gain
2524 + Amplifier for this channel. (default=2 sets the
2525 + full scale of the channel to 2.048 Volts)
2527 + Channel (ch) parameters can be set for each enabled channel.
2528 + A maximum of 4 channels can be enabled (letters a thru d).
2529 + For more information refer to the device datasheet at:
2530 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
2534 +Info: Texas Instruments ADS1115 ADC
2535 +Load: dtoverlay=ads1115,<param>[=<val>]
2536 +Params: addr I2C bus address of device. Set based on how the
2537 + addr pin is wired. (default=0x48 assumes addr
2539 + cha_enable Enable virtual channel a.
2540 + cha_cfg Set the configuration for virtual channel a.
2541 + (default=4 configures this channel for the
2542 + voltage at A0 with respect to GND)
2543 + cha_datarate Set the datarate (samples/sec) for this channel.
2544 + (default=7 sets 860 sps)
2545 + cha_gain Set the gain of the Programmable Gain
2546 + Amplifier for this channel. (Default 1 sets the
2547 + full scale of the channel to 4.096 Volts)
2549 + Channel parameters can be set for each enabled channel.
2550 + A maximum of 4 channels can be enabled (letters a thru d).
2551 + For more information refer to the device datasheet at:
2552 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
2556 +Info: ADS7846 Touch controller
2557 +Load: dtoverlay=ads7846,<param>=<val>
2558 +Params: cs SPI bus Chip Select (default 1)
2559 + speed SPI bus speed (default 2MHz, max 3.25MHz)
2560 + penirq GPIO used for PENIRQ. REQUIRED
2561 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
2562 + swapxy Swap x and y axis
2563 + xmin Minimum value on the X axis (default 0)
2564 + ymin Minimum value on the Y axis (default 0)
2565 + xmax Maximum value on the X axis (default 4095)
2566 + ymax Maximum value on the Y axis (default 4095)
2567 + pmin Minimum reported pressure value (default 0)
2568 + pmax Maximum reported pressure value (default 65535)
2569 + xohms Touchpanel sensitivity (X-plate resistance)
2572 + penirq is required and usually xohms (60-100) has to be set as well.
2573 + Apart from that, pmax (255) and swapxy are also common.
2574 + The rest of the calibration can be done with xinput-calibrator.
2575 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
2576 + Device Tree binding document:
2577 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
2580 +Name: akkordion-iqdacplus
2581 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
2582 + OEM IQAudIO DAC+ or DAC Zero module).
2583 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
2584 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2585 + Digital volume control. Enable with
2586 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
2587 + (The default behaviour is that the Digital
2588 + volume control is limited to a maximum of
2589 + 0dB. ie. it can attenuate but not provide
2590 + gain. For most users, this will be desired
2591 + as it will prevent clipping. By appending
2592 + the 24db_digital_gain parameter, the Digital
2593 + volume control will allow up to 24dB of
2594 + gain. If this parameter is enabled, it is the
2595 + responsibility of the user to ensure that
2596 + the Digital volume control is set to a value
2597 + that does not result in clipping/distortion!)
2600 +Name: allo-boss-dac-pcm512x-audio
2601 +Info: Configures the Allo Boss DAC audio cards.
2602 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
2603 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2604 + Digital volume control. Enable with
2605 + "dtoverlay=allo-boss-dac-pcm512x-audio,
2606 + 24db_digital_gain"
2607 + (The default behaviour is that the Digital
2608 + volume control is limited to a maximum of
2609 + 0dB. ie. it can attenuate but not provide
2610 + gain. For most users, this will be desired
2611 + as it will prevent clipping. By appending
2612 + the 24db_digital_gain parameter, the Digital
2613 + volume control will allow up to 24dB of
2614 + gain. If this parameter is enabled, it is the
2615 + responsibility of the user to ensure that
2616 + the Digital volume control is set to a value
2617 + that does not result in clipping/distortion!)
2618 + slave Force Boss DAC into slave mode, using Pi a
2619 + master for bit clock and frame clock. Enable
2620 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
2625 +Info: Configures the Allo Digione audio card
2626 +Load: dtoverlay=allo-digione
2630 +Name: allo-katana-dac-audio
2631 +Info: Configures the Allo Katana DAC audio card
2632 +Load: dtoverlay=allo-katana-dac-audio
2636 +Name: allo-piano-dac-pcm512x-audio
2637 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
2638 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
2639 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
2640 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
2641 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2642 + Digital volume control.
2643 + (The default behaviour is that the Digital
2644 + volume control is limited to a maximum of
2645 + 0dB. ie. it can attenuate but not provide
2646 + gain. For most users, this will be desired
2647 + as it will prevent clipping. By appending
2648 + the 24db_digital_gain parameter, the Digital
2649 + volume control will allow up to 24dB of
2650 + gain. If this parameter is enabled, it is the
2651 + responsibility of the user to ensure that
2652 + the Digital volume control is set to a value
2653 + that does not result in clipping/distortion!)
2656 +Name: allo-piano-dac-plus-pcm512x-audio
2657 +Info: Configures the Allo Piano DAC (2.1) audio cards.
2658 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
2659 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2660 + Digital volume control.
2661 + (The default behaviour is that the Digital
2662 + volume control is limited to a maximum of
2663 + 0dB. ie. it can attenuate but not provide
2664 + gain. For most users, this will be desired
2665 + as it will prevent clipping. By appending
2666 + the 24db_digital_gain parameter, the Digital
2667 + volume control will allow up to 24dB of
2668 + gain. If this parameter is enabled, it is the
2669 + responsibility of the user to ensure that
2670 + the Digital volume control is set to a value
2671 + that does not result in clipping/distortion!)
2672 + glb_mclk This option is only with Kali board. If enabled,
2673 + MCLK for Kali is used and PLL is disabled for
2674 + better voice quality. (default Off)
2678 +Info: Configures the Orchard Audio ApplePi-DAC audio card
2679 +Load: dtoverlay=applepi-dac
2684 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
2685 + connected to spi0.0
2686 +Load: dtoverlay=at86rf233,<param>=<val>
2687 +Params: interrupt GPIO used for INT (default 23)
2688 + reset GPIO used for Reset (default 24)
2689 + sleep GPIO used for Sleep (default 25)
2690 + speed SPI bus speed in Hz (default 3000000)
2691 + trim Fine tuning of the internal capacitance
2692 + arrays (0=+0pF, 15=+4.5pF, default 15)
2695 +Name: audioinjector-addons
2696 +Info: Configures the audioinjector.net audio add on soundcards
2697 +Load: dtoverlay=audioinjector-addons,<param>=<val>
2698 +Params: non-stop-clocks Keeps the clocks running even when the stream
2699 + is paused or stopped (default off)
2702 +Name: audioinjector-wm8731-audio
2703 +Info: Configures the audioinjector.net audio add on soundcard
2704 +Load: dtoverlay=audioinjector-wm8731-audio
2709 +Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
2710 +Load: dtoverlay=audremap,<param>=<val>
2711 +Params: swap_lr Reverse the channel allocation, which will also
2712 + swap the audio jack outputs (default off)
2713 + enable_jack Don't switch off the audio jack output
2718 +Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
2720 +Load: dtoverlay=balena-fin
2724 +Name: bmp085_i2c-sensor
2725 +Info: This overlay is now deprecated - see i2c-sensor
2726 +Load: dtoverlay=bmp085_i2c-sensor
2731 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
2732 + Also sometimes found with the part number(s) AM230x.
2733 +Load: dtoverlay=dht11,<param>=<val>
2734 +Params: gpiopin GPIO connected to the sensor's DATA output.
2738 +Name: dionaudio-loco
2739 +Info: Configures the Dion Audio LOCO DAC-AMP
2740 +Load: dtoverlay=dionaudio-loco
2744 +Name: dionaudio-loco-v2
2745 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
2746 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
2747 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2748 + Digital volume control. Enable with
2749 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2750 + (The default behaviour is that the Digital
2751 + volume control is limited to a maximum of
2752 + 0dB. ie. it can attenuate but not provide
2753 + gain. For most users, this will be desired
2754 + as it will prevent clipping. By appending
2755 + the 24dB_digital_gain parameter, the Digital
2756 + volume control will allow up to 24dB of
2757 + gain. If this parameter is enabled, it is the
2758 + responsibility of the user to ensure that
2759 + the Digital volume control is set to a value
2760 + that does not result in clipping/distortion!)
2764 +Info: Overlay for a generic 18-bit DPI display
2765 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
2766 + 2-3 seconds after the kernel has started.
2767 +Load: dtoverlay=dpi18
2772 +Info: Overlay for a generic 24-bit DPI display
2773 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
2774 + 2-3 seconds after the kernel has started.
2775 +Load: dtoverlay=dpi24
2780 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
2781 + is the default on all except the Pi Zero which defaults to dwc2.
2782 +Load: dtoverlay=dwc-otg
2787 +Info: Selects the dwc2 USB controller driver
2788 +Load: dtoverlay=dwc2,<param>=<val>
2789 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
2791 + g-rx-fifo-size Size of rx fifo size in gadget mode
2793 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
2797 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
2801 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
2802 +Load: dtoverlay=enc28j60,<param>=<val>
2803 +Params: int_pin GPIO used for INT (default 25)
2805 + speed SPI bus speed (default 12000000)
2808 +Name: enc28j60-spi2
2809 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
2810 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
2811 +Params: int_pin GPIO used for INT (default 39)
2813 + speed SPI bus speed (default 12000000)
2817 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
2818 + GPIO 4 (pin 7 on GPIO header) for interrupt.
2819 +Load: dtoverlay=exc3000,<param>=<val>
2820 +Params: interrupt GPIO used for interrupt (default 4)
2821 + sizex Touchscreen size x (default 4096)
2822 + sizey Touchscreen size y (default 4096)
2823 + invx Touchscreen inverted x axis
2824 + invy Touchscreen inverted y axis
2825 + swapxy Touchscreen swapped x y axis
2829 +Info: Configures the Fe-Pi Audio Sound Card
2830 +Load: dtoverlay=fe-pi-audio
2835 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
2836 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
2837 +Load: dtoverlay=goodix,<param>=<val>
2838 +Params: interrupt GPIO used for interrupt (default 4)
2839 + reset GPIO used for reset (default 17)
2842 +Name: googlevoicehat-soundcard
2843 +Info: Configures the Google voiceHAT soundcard
2844 +Load: dtoverlay=googlevoicehat-soundcard
2849 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
2850 + based gpio_ir_recv driver maps received keys directly to a
2851 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
2852 + not required! The key mapping and other decoding parameters can be
2853 + configured by "ir-keytable" tool.
2854 +Load: dtoverlay=gpio-ir,<param>=<val>
2855 +Params: gpio_pin Input pin number. Default is 18.
2857 + gpio_pull Desired pull-up/down state (off, down, up)
2858 + Default is "down".
2860 + rc-map-name Default rc keymap (can also be changed by
2861 + ir-keytable), defaults to "rc-rc6-mce"
2865 +Info: Use GPIO pin as bit-banged infrared transmitter output.
2866 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
2867 + a PWM so it can be used together with onboard analog audio.
2868 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
2869 +Params: gpio_pin Output GPIO (default 18)
2871 + invert "1" = invert the output (make it active-low).
2872 + Default is "0" (active-high).
2876 +Info: This is a generic overlay for activating GPIO keypresses using
2877 + the gpio-keys library and this dtoverlay. Multiple keys can be
2878 + set up using multiple calls to the overlay for configuring
2879 + additional buttons or joysticks. You can see available keycodes
2880 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
2881 + linux/input-event-codes.h#L64
2882 +Load: dtoverlay=gpio-key,<param>=<val>
2883 +Params: gpio GPIO pin to trigger on (default 3)
2884 + active_low When this is 1 (active low), a falling
2885 + edge generates a key down event and a
2886 + rising edge generates a key up event.
2887 + When this is 0 (active high), this is
2888 + reversed. The default is 1 (active low)
2889 + gpio_pull Desired pull-up/down state (off, down, up)
2890 + Default is "up". Note that the default pin
2891 + (GPIO3) has an external pullup
2892 + label Set a label for the key
2893 + keycode Set the key code for the button
2897 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
2898 + for user-space GPIO edge detection systems.
2899 +Load: dtoverlay=gpio-no-irq
2903 +Name: gpio-poweroff
2904 +Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
2905 + overlay will prevent the ability to boot by driving GPIO3 low.
2906 +Load: dtoverlay=gpio-poweroff,<param>=<val>
2907 +Params: gpiopin GPIO for signalling (default 26)
2909 + active_low Set if the power control device requires a
2910 + high->low transition to trigger a power-down.
2911 + Note that this will require the support of a
2912 + custom dt-blob.bin to prevent a power-down
2913 + during the boot process, and that a reboot
2914 + will also cause the pin to go low.
2915 + input Set if the gpio pin should be configured as
2917 + export Set to export the configured pin to sysfs
2920 +Name: gpio-shutdown
2921 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
2922 + is configured as an input key that generates KEY_POWER events.
2923 + This event is handled by systemd-logind by initiating a
2924 + shutdown. Systemd versions older than 225 need an udev rule
2925 + enable listening to the input device:
2927 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
2928 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
2929 + ATTRS{keys}=="116", TAG+="power-switch"
2931 + This overlay only handles shutdown. After shutdown, the system
2932 + can be powered up again by driving GPIO3 low. The default
2933 + configuration uses GPIO3 with a pullup, so if you connect a
2934 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
2935 + you get a shutdown and power-up button.
2936 +Load: dtoverlay=gpio-shutdown,<param>=<val>
2937 +Params: gpio_pin GPIO pin to trigger on (default 3)
2939 + active_low When this is 1 (active low), a falling
2940 + edge generates a key down event and a
2941 + rising edge generates a key up event.
2942 + When this is 0 (active high), this is
2943 + reversed. The default is 1 (active low).
2945 + gpio_pull Desired pull-up/down state (off, down, up)
2948 + Note that the default pin (GPIO3) has an
2952 +Name: hifiberry-amp
2953 +Info: Configures the HifiBerry Amp and Amp+ audio cards
2954 +Load: dtoverlay=hifiberry-amp
2958 +Name: hifiberry-dac
2959 +Info: Configures the HifiBerry DAC audio card
2960 +Load: dtoverlay=hifiberry-dac
2964 +Name: hifiberry-dacplus
2965 +Info: Configures the HifiBerry DAC+ audio card
2966 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
2967 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2968 + Digital volume control. Enable with
2969 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2970 + (The default behaviour is that the Digital
2971 + volume control is limited to a maximum of
2972 + 0dB. ie. it can attenuate but not provide
2973 + gain. For most users, this will be desired
2974 + as it will prevent clipping. By appending
2975 + the 24dB_digital_gain parameter, the Digital
2976 + volume control will allow up to 24dB of
2977 + gain. If this parameter is enabled, it is the
2978 + responsibility of the user to ensure that
2979 + the Digital volume control is set to a value
2980 + that does not result in clipping/distortion!)
2981 + slave Force DAC+ Pro into slave mode, using Pi as
2982 + master for bit clock and frame clock.
2985 +Name: hifiberry-digi
2986 +Info: Configures the HifiBerry Digi and Digi+ audio card
2987 +Load: dtoverlay=hifiberry-digi
2991 +Name: hifiberry-digi-pro
2992 +Info: Configures the HifiBerry Digi+ Pro audio card
2993 +Load: dtoverlay=hifiberry-digi-pro
2998 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
2999 + Default values match Texy's display shield
3000 +Load: dtoverlay=hy28a,<param>=<val>
3001 +Params: speed Display SPI bus speed
3003 + rotate Display rotation {0,90,180,270}
3005 + fps Delay between frame updates
3007 + debug Debug output level {0-7}
3009 + xohms Touchpanel sensitivity (X-plate resistance)
3011 + resetgpio GPIO used to reset controller
3013 + ledgpio GPIO used to control backlight
3017 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
3018 + Default values match Texy's display shield
3019 +Load: dtoverlay=hy28b,<param>=<val>
3020 +Params: speed Display SPI bus speed
3022 + rotate Display rotation {0,90,180,270}
3024 + fps Delay between frame updates
3026 + debug Debug output level {0-7}
3028 + xohms Touchpanel sensitivity (X-plate resistance)
3030 + resetgpio GPIO used to reset controller
3032 + ledgpio GPIO used to control backlight
3036 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
3037 +Load: dtoverlay=i2c-bcm2708
3042 +Info: Adds support for software i2c controller on gpio pins
3043 +Load: dtoverlay=i2c-gpio,<param>=<val>
3044 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
3046 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3048 + i2c_gpio_delay_us Clock delay in microseconds
3049 + (default "2" = ~100kHz)
3051 + bus Set to a unique, non-zero value if wanting
3052 + multiple i2c-gpio busses. If set, will be used
3053 + as the preferred bus number (/dev/i2c-<n>). If
3054 + not set, the default value is 0, but the bus
3055 + number will be dynamically assigned - probably
3060 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
3061 +Load: dtoverlay=i2c-mux,<param>=<val>
3062 +Params: pca9542 Select the NXP PCA9542 device
3064 + pca9545 Select the NXP PCA9545 device
3066 + pca9548 Select the NXP PCA9548 device
3068 + addr Change I2C address of the device (default 0x70)
3071 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
3074 +Name: i2c-pwm-pca9685a
3075 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
3076 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
3077 +Params: addr I2C address of PCA9685A (default 0x40)
3081 +Info: Adds support for a number of I2C Real Time Clock devices
3082 +Load: dtoverlay=i2c-rtc,<param>=<val>
3083 +Params: abx80x Select one of the ABx80x family:
3084 + AB0801, AB0803, AB0804, AB0805,
3085 + AB1801, AB1803, AB1804, AB1805
3087 + ds1307 Select the DS1307 device
3089 + ds1339 Select the DS1339 device
3091 + ds3231 Select the DS3231 device
3093 + m41t62 Select the M41T62 device
3095 + mcp7940x Select the MCP7940x device
3097 + mcp7941x Select the MCP7941x device
3099 + pcf2127 Select the PCF2127 device
3101 + pcf8523 Select the PCF8523 device
3103 + pcf8563 Select the PCF8563 device
3105 + trickle-diode-type Diode type for trickle charge - "standard" or
3106 + "schottky" (ABx80x only)
3108 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3111 + wakeup-source Specify that the RTC can be used as a wakeup
3116 +Info: Adds support for a number of I2C Real Time Clock devices
3117 + using the software i2c controller
3118 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
3119 +Params: abx80x Select one of the ABx80x family:
3120 + AB0801, AB0803, AB0804, AB0805,
3121 + AB1801, AB1803, AB1804, AB1805
3123 + ds1307 Select the DS1307 device
3125 + ds1339 Select the DS1339 device
3127 + ds3231 Select the DS3231 device
3129 + mcp7940x Select the MCP7940x device
3131 + mcp7941x Select the MCP7941x device
3133 + pcf2127 Select the PCF2127 device
3135 + pcf8523 Select the PCF8523 device
3137 + pcf8563 Select the PCF8563 device
3139 + trickle-diode-type Diode type for trickle charge - "standard" or
3140 + "schottky" (ABx80x only)
3142 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3145 + wakeup-source Specify that the RTC can be used as a wakeup
3148 + i2c_gpio_sda GPIO used for I2C data (default "23")
3150 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3152 + i2c_gpio_delay_us Clock delay in microseconds
3153 + (default "2" = ~100kHz)
3157 +Info: Adds support for a number of I2C barometric pressure and temperature
3158 + sensors on i2c_arm
3159 +Load: dtoverlay=i2c-sensor,<param>=<val>
3160 +Params: addr Set the address for the BME280, BMP280, DS1621,
3161 + HDC100X, LM75, SHT3x or TMP102
3163 + bme280 Select the Bosch Sensortronic BME280
3164 + Valid addresses 0x76-0x77, default 0x76
3166 + bmp085 Select the Bosch Sensortronic BMP085
3168 + bmp180 Select the Bosch Sensortronic BMP180
3170 + bmp280 Select the Bosch Sensortronic BMP280
3171 + Valid addresses 0x76-0x77, default 0x76
3173 + ds1621 Select the Dallas Semiconductors DS1621 temp
3174 + sensor. Valid addresses 0x48-0x4f, default 0x48
3176 + hdc100x Select the Texas Instruments HDC100x temp sensor
3177 + Valid addresses 0x40-0x43, default 0x40
3179 + htu21 Select the HTU21 temperature and humidity sensor
3181 + lm75 Select the Maxim LM75 temperature sensor
3182 + Valid addresses 0x48-0x4f, default 0x4f
3184 + lm75addr Deprecated - use addr parameter instead
3186 + sht3x Select the Sensiron SHT3x temperature and
3187 + humidity sensor. Valid addresses 0x44-0x45,
3190 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
3191 + temperature sensor
3193 + tmp102 Select the Texas Instruments TMP102 temp sensor
3194 + Valid addresses 0x48-0x4b, default 0x48
3196 + tsl4531 Select the AMS TSL4531 digital ambient light
3199 + veml6070 Select the Vishay VEML6070 ultraviolet light
3204 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
3205 + platforms - platforms other then Compute Modules can only use this
3206 + to disable transaction combining.
3207 +Load: dtoverlay=i2c0-bcm2708,<param>=<val>
3208 +Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
3209 + scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
3210 + pins_0_1 Use pins 0 and 1 (default)
3211 + pins_28_29 Use pins 28 and 29
3212 + pins_44_45 Use pins 44 and 45
3213 + pins_46_47 Use pins 46 and 47
3214 + combine Allow transactions to be combined (default
3219 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
3220 + platforms - platforms other then Compute Modules can only use this
3221 + to disable transaction combining.
3222 +Info: Enable the i2c_bcm2708 driver for the i2c1 bus
3223 +Load: dtoverlay=i2c1-bcm2708,<param>=<val>
3224 +Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2)
3225 + scl1_pin GPIO pin for SCL1 (3 or 45 - default 3)
3226 + pin_func Alternative pin function (4 (alt0), 6 (alt2) -
3228 + combine Allow transactions to be combined (default
3232 +Name: i2s-gpio28-31
3233 +Info: move I2S function block to GPIO 28 to 31
3234 +Load: dtoverlay=i2s-gpio28-31
3239 +Info: Configures the IQaudio DAC audio card
3240 +Load: dtoverlay=iqaudio-dac,<param>
3241 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3242 + Digital volume control. Enable with
3243 + "dtoverlay=iqaudio-dac,24db_digital_gain"
3244 + (The default behaviour is that the Digital
3245 + volume control is limited to a maximum of
3246 + 0dB. ie. it can attenuate but not provide
3247 + gain. For most users, this will be desired
3248 + as it will prevent clipping. By appending
3249 + the 24db_digital_gain parameter, the Digital
3250 + volume control will allow up to 24dB of
3251 + gain. If this parameter is enabled, it is the
3252 + responsibility of the user to ensure that
3253 + the Digital volume control is set to a value
3254 + that does not result in clipping/distortion!)
3257 +Name: iqaudio-dacplus
3258 +Info: Configures the IQaudio DAC+ audio card
3259 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
3260 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3261 + Digital volume control. Enable with
3262 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
3263 + (The default behaviour is that the Digital
3264 + volume control is limited to a maximum of
3265 + 0dB. ie. it can attenuate but not provide
3266 + gain. For most users, this will be desired
3267 + as it will prevent clipping. By appending
3268 + the 24db_digital_gain parameter, the Digital
3269 + volume control will allow up to 24dB of
3270 + gain. If this parameter is enabled, it is the
3271 + responsibility of the user to ensure that
3272 + the Digital volume control is set to a value
3273 + that does not result in clipping/distortion!)
3274 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
3275 + starting/stopping audio playback.
3276 + unmute_amp If specified, unmute the IQaudIO amp once when
3277 + the DAC driver module loads.
3280 +Name: iqaudio-digi-wm8804-audio
3281 +Info: Configures the IQAudIO Digi WM8804 audio card
3282 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
3283 +Params: card_name Override the default, "IQAudIODigi", card name.
3284 + dai_name Override the default, "IQAudIO Digi", dai name.
3285 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
3289 +Name: jedec-spi-nor
3290 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
3291 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
3292 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
3293 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
3294 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
3295 + on SPI<n>, CS#<m>.
3299 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
3301 +Load: dtoverlay=justboom-dac,<param>=<val>
3302 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3303 + Digital volume control. Enable with
3304 + "dtoverlay=justboom-dac,24db_digital_gain"
3305 + (The default behaviour is that the Digital
3306 + volume control is limited to a maximum of
3307 + 0dB. ie. it can attenuate but not provide
3308 + gain. For most users, this will be desired
3309 + as it will prevent clipping. By appending
3310 + the 24dB_digital_gain parameter, the Digital
3311 + volume control will allow up to 24dB of
3312 + gain. If this parameter is enabled, it is the
3313 + responsibility of the user to ensure that
3314 + the Digital volume control is set to a value
3315 + that does not result in clipping/distortion!)
3318 +Name: justboom-digi
3319 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
3320 +Load: dtoverlay=justboom-digi
3325 +Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
3326 + Consult the module documentation for more details.
3327 +Load: dtoverlay=lirc-rpi,<param>=<val>
3328 +Params: gpio_out_pin GPIO for output (default "17")
3330 + gpio_in_pin GPIO for input (default "18")
3332 + gpio_in_pull Pull up/down/off on the input pin
3335 + sense Override the IR receive auto-detection logic:
3336 + "0" = force active-high
3337 + "1" = force active-low
3338 + "-1" = use auto-detection
3341 + softcarrier Turn the software carrier "on" or "off"
3344 + invert "on" = invert the output pin (default "off")
3346 + debug "on" = enable additional debug messages
3351 +Info: Adds support for the ltc294x family of battery gauges
3352 +Load: dtoverlay=ltc294x,<param>=<val>
3353 +Params: ltc2941 Select the ltc2941 device
3355 + ltc2942 Select the ltc2942 device
3357 + ltc2943 Select the ltc2943 device
3359 + ltc2944 Select the ltc2944 device
3361 + resistor-sense The sense resistor value in milli-ohms.
3362 + Can be a 32-bit negative value when the battery
3363 + has been connected to the wrong end of the
3366 + prescaler-exponent Range and accuracy of the gauge. The value is
3367 + programmed into the chip only if it differs
3368 + from the current setting.
3370 + - Default value is 128
3371 + - the exponent is in the range 0-7 (default 7)
3372 + See the datasheet for more information.
3376 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
3377 +Load: dtoverlay=mbed-dac
3382 +Info: Configures the MCP23017 I2C GPIO expander
3383 +Load: dtoverlay=mcp23017,<param>=<val>
3384 +Params: gpiopin Gpio pin connected to the INTA output of the
3385 + MCP23017 (default: 4)
3387 + addr I2C address of the MCP23017 (default: 0x20)
3391 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
3392 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
3393 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3394 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
3395 + device must be the only one present on that SPI bus/CS#.
3396 +Load: dtoverlay=mcp23s17,<param>=<val>
3397 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
3398 + devices present on SPI<n>, CS#<m>
3400 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
3401 + devices present on SPI<n>, CS#<m>
3403 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
3404 + MCP23S08 device on SPI<n>, CS#<m>, specifies
3405 + the GPIO pin to which INT output of MCP23S08
3408 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
3409 + single MCP23S17 device on SPI<n>, CS#<m>,
3410 + specifies the GPIO pin to which either INTA
3411 + or INTB output of MCP23S17 is connected.
3415 +Info: Configures the MCP2515 CAN controller on spi0.0
3416 +Load: dtoverlay=mcp2515-can0,<param>=<val>
3417 +Params: oscillator Clock frequency for the CAN controller (Hz)
3419 + spimaxfrequency Maximum SPI frequence (Hz)
3421 + interrupt GPIO for interrupt signal
3425 +Info: Configures the MCP2515 CAN controller on spi0.1
3426 +Load: dtoverlay=mcp2515-can1,<param>=<val>
3427 +Params: oscillator Clock frequency for the CAN controller (Hz)
3429 + spimaxfrequency Maximum SPI frequence (Hz)
3431 + interrupt GPIO for interrupt signal
3435 +Info: Configures MCP3008 A/D converters
3436 + For devices on spi1 or spi2, the interfaces should be enabled
3437 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3438 +Load: dtoverlay=mcp3008,<param>[=<val>]
3439 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3440 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3444 +Info: Configures MCP3202 A/D converters
3445 + For devices on spi1 or spi2, the interfaces should be enabled
3446 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3447 +Load: dtoverlay=mcp3202,<param>[=<val>]
3448 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3449 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3453 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
3454 +Load: dtoverlay=media-center,<param>=<val>
3455 +Params: speed Display SPI bus speed
3456 + rotate Display rotation {0,90,180,270}
3457 + fps Delay between frame updates
3458 + xohms Touchpanel sensitivity (X-plate resistance)
3459 + swapxy Swap x and y axis
3460 + backlight Change backlight GPIO pin {e.g. 12, 18}
3461 + gpio_out_pin GPIO for output (default "17")
3462 + gpio_in_pin GPIO for input (default "18")
3463 + gpio_in_pull Pull up/down/off on the input pin
3465 + sense Override the IR receive auto-detection logic:
3466 + "0" = force active-high
3467 + "1" = force active-low
3468 + "-1" = use auto-detection
3470 + softcarrier Turn the software carrier "on" or "off"
3472 + invert "on" = invert the output pin (default "off")
3473 + debug "on" = enable additional debug messages
3478 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
3479 + 31.25kbaud, the frequency required for MIDI
3480 +Load: dtoverlay=midi-uart0
3485 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
3486 + 31.25kbaud, the frequency required for MIDI
3487 +Load: dtoverlay=midi-uart1
3492 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
3493 +Load: dtoverlay=mmc,<param>=<val>
3494 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3499 +Info: Overlay for i2c connected mpu6050 imu
3500 +Load: dtoverlay=mpu6050,<param>=<val>
3501 +Params: interrupt GPIO pin for interrupt (default 4)
3505 +Info: MZ61581 display by Tontec
3506 +Load: dtoverlay=mz61581,<param>=<val>
3507 +Params: speed Display SPI bus speed
3509 + rotate Display rotation {0,90,180,270}
3511 + fps Delay between frame updates
3513 + txbuflen Transmit buffer length (default 32768)
3515 + debug Debug output level {0-7}
3517 + xohms Touchpanel sensitivity (X-plate resistance)
3521 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
3522 +Load: dtoverlay=papirus,<param>=<val>
3523 +Params: panel Display panel (required):
3528 + speed Display SPI bus speed
3531 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
3534 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
3537 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
3541 +Info: Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
3542 + from the VPU. There is a special driver for this with a separate DT
3543 + node, which has the unfortunate consequence of breaking the
3544 + act_led_gpio and act_led_activelow dtparams.
3545 + This overlay changes the GPIO controller back to the standard one and
3546 + restores the dtparams.
3547 +Load: dtoverlay=pi3-act-led,<param>=<val>
3548 +Params: activelow Set to "on" to invert the sense of the LED
3551 + gpio Set which GPIO to use for the activity LED
3552 + (in case you want to connect it to an external
3557 +Name: pi3-disable-bt
3558 +Info: Disable Pi3 Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15
3559 + N.B. To disable the systemd service that initialises the modem so it
3560 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
3561 +Load: dtoverlay=pi3-disable-bt
3565 +Name: pi3-disable-wifi
3566 +Info: Disable Pi3 onboard WiFi
3567 +Load: dtoverlay=pi3-disable-wifi
3571 +Name: pi3-miniuart-bt
3572 +Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
3573 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
3575 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
3576 + and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
3577 + that create /dev/serial0 and /dev/serial1, in which case use
3578 + /dev/serial1 instead because it will always be correct. Furthermore,
3579 + you must also set core_freq=250 in config.txt or the miniuart will not
3581 +Load: dtoverlay=pi3-miniuart-bt
3586 +Info: Configures the pibell audio card.
3587 +Load: dtoverlay=pibell,<param>=<val>
3588 +Params: alsaname Set the name as it appears in ALSA (default
3593 +Info: PiScreen display by OzzMaker.com
3594 +Load: dtoverlay=piscreen,<param>=<val>
3595 +Params: speed Display SPI bus speed
3597 + rotate Display rotation {0,90,180,270}
3599 + fps Delay between frame updates
3601 + debug Debug output level {0-7}
3603 + xohms Touchpanel sensitivity (X-plate resistance)
3607 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
3608 +Load: dtoverlay=piscreen2r,<param>=<val>
3609 +Params: speed Display SPI bus speed
3611 + rotate Display rotation {0,90,180,270}
3613 + fps Delay between frame updates
3615 + debug Debug output level {0-7}
3617 + xohms Touchpanel sensitivity (X-plate resistance)
3621 +Info: Configures the Blokas Labs pisound card
3622 +Load: dtoverlay=pisound
3627 +Info: Adafruit PiTFT 2.2" screen
3628 +Load: dtoverlay=pitft22,<param>=<val>
3629 +Params: speed Display SPI bus speed
3631 + rotate Display rotation {0,90,180,270}
3633 + fps Delay between frame updates
3635 + debug Debug output level {0-7}
3638 +Name: pitft28-capacitive
3639 +Info: Adafruit PiTFT 2.8" capacitive touch screen
3640 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
3641 +Params: speed Display SPI bus speed
3643 + rotate Display rotation {0,90,180,270}
3645 + fps Delay between frame updates
3647 + debug Debug output level {0-7}
3649 + touch-sizex Touchscreen size x (default 240)
3651 + touch-sizey Touchscreen size y (default 320)
3653 + touch-invx Touchscreen inverted x axis
3655 + touch-invy Touchscreen inverted y axis
3657 + touch-swapxy Touchscreen swapped x y axis
3660 +Name: pitft28-resistive
3661 +Info: Adafruit PiTFT 2.8" resistive touch screen
3662 +Load: dtoverlay=pitft28-resistive,<param>=<val>
3663 +Params: speed Display SPI bus speed
3665 + rotate Display rotation {0,90,180,270}
3667 + fps Delay between frame updates
3669 + debug Debug output level {0-7}
3672 +Name: pitft35-resistive
3673 +Info: Adafruit PiTFT 3.5" resistive touch screen
3674 +Load: dtoverlay=pitft35-resistive,<param>=<val>
3675 +Params: speed Display SPI bus speed
3677 + rotate Display rotation {0,90,180,270}
3679 + fps Delay between frame updates
3681 + debug Debug output level {0-7}
3685 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
3686 +Load: dtoverlay=pps-gpio,<param>=<val>
3687 +Params: gpiopin Input GPIO (default "18")
3688 + assert_falling_edge When present, assert is indicated by a falling
3689 + edge, rather than by a rising edge (default
3691 + capture_clear Generate clear events on the trailing edge
3696 +Info: Configures a single PWM channel
3697 + Legal pin,function combinations for each channel:
3698 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3699 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3701 + 1) Pin 18 is the only one available on all platforms, and
3702 + it is the one used by the I2S audio interface.
3703 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3704 + 2) The onboard analogue audio output uses both PWM channels.
3705 + 3) So be careful mixing audio and PWM.
3706 + 4) Currently the clock must have been enabled and configured
3708 +Load: dtoverlay=pwm,<param>=<val>
3709 +Params: pin Output pin (default 18) - see table
3710 + func Pin function (default 2 = Alt5) - see above
3711 + clock PWM clock frequency (informational)
3715 +Info: Configures both PWM channels
3716 + Legal pin,function combinations for each channel:
3717 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3718 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3720 + 1) Pin 18 is the only one available on all platforms, and
3721 + it is the one used by the I2S audio interface.
3722 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3723 + 2) The onboard analogue audio output uses both PWM channels.
3724 + 3) So be careful mixing audio and PWM.
3725 + 4) Currently the clock must have been enabled and configured
3727 +Load: dtoverlay=pwm-2chan,<param>=<val>
3728 +Params: pin Output pin (default 18) - see table
3729 + pin2 Output pin for other channel (default 19)
3730 + func Pin function (default 2 = Alt5) - see above
3731 + func2 Function for pin2 (default 2 = Alt5)
3732 + clock PWM clock frequency (informational)
3736 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
3737 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
3738 + of PWM0 to reduce the CPU load during transmission compared to
3739 + gpio-ir-tx which uses bit-banging.
3740 + Legal pin,function combinations are:
3741 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3742 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
3743 +Params: gpio_pin Output GPIO (default 18)
3745 + func Pin function (default 2 = Alt5)
3749 +Info: I2SE's Evaluation Board for PLC Stamp micro
3750 +Load: dtoverlay=qca7000,<param>=<val>
3751 +Params: int_pin GPIO pin for interrupt signal (default 23)
3753 + speed SPI bus speed (default 12 MHz)
3756 +Name: rotary-encoder
3757 +Info: Overlay for GPIO connected rotary encoder.
3758 +Load: dtoverlay=rotary-encoder,<param>=<val>
3759 +Params: pin_a GPIO connected to rotary encoder channel A
3761 + pin_b GPIO connected to rotary encoder channel B
3763 + relative_axis register a relative axis rather than an
3764 + absolute one. Relative axis will only
3765 + generate +1/-1 events on the input device,
3766 + hence no steps need to be passed.
3767 + linux_axis the input subsystem axis to map to this
3768 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
3769 + rollover Automatic rollover when the rotary value
3770 + becomes greater than the specified steps or
3771 + smaller than 0. For absolute axis only.
3772 + steps-per-period Number of steps (stable states) per period.
3773 + The values have the following meaning:
3774 + 1: Full-period mode (default)
3775 + 2: Half-period mode
3776 + 4: Quarter-period mode
3777 + steps Number of steps in a full turnaround of the
3778 + encoder. Only relevant for absolute axis.
3779 + Defaults to 24 which is a typical value for
3781 + wakeup Boolean, rotary encoder can wake up the
3783 + encoding String, the method used to encode steps.
3784 + Supported are "gray" (the default and more
3785 + common) and "binary".
3788 +Name: rpi-backlight
3789 +Info: Raspberry Pi official display backlight driver
3790 +Load: dtoverlay=rpi-backlight
3794 +Name: rpi-cirrus-wm5102
3795 +Info: Configures the Cirrus Logic Audio Card
3796 +Load: dtoverlay=rpi-cirrus-wm5102
3801 +Info: Configures the RPi DAC audio card
3802 +Load: dtoverlay=rpi-dac
3807 +Info: RPi-Display - 2.8" Touch Display by Watterott
3808 +Load: dtoverlay=rpi-display,<param>=<val>
3809 +Params: speed Display SPI bus speed
3810 + rotate Display rotation {0,90,180,270}
3811 + fps Delay between frame updates
3812 + debug Debug output level {0-7}
3813 + xohms Touchpanel sensitivity (X-plate resistance)
3814 + swapxy Swap x and y axis
3815 + backlight Change backlight GPIO pin {e.g. 12, 18}
3819 +Info: Official Raspberry Pi display touchscreen
3820 +Load: dtoverlay=rpi-ft5406,<param>=<val>
3821 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
3822 + touchscreen-size-y Touchscreen Y resolution (default 600);
3823 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
3824 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
3825 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
3829 +Info: Configures the RPi Proto audio card
3830 +Load: dtoverlay=rpi-proto
3835 +Info: Raspberry Pi Sense HAT
3836 +Load: dtoverlay=rpi-sense
3841 +Info: Raspberry Pi TV HAT
3842 +Load: dtoverlay=rpi-tv
3846 +Name: rra-digidac1-wm8741-audio
3847 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
3848 +Load: dtoverlay=rra-digidac1-wm8741-audio
3852 +Name: sc16is750-i2c
3853 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
3854 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3855 + select another address, please refer to table 10 in reference manual.
3856 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
3857 +Params: int_pin GPIO used for IRQ (default 24)
3858 + addr Address (default 0x48)
3861 +Name: sc16is752-i2c
3862 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
3863 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3864 + select another address, please refer to table 10 in reference manual.
3865 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
3866 +Params: int_pin GPIO used for IRQ (default 24)
3867 + addr Address (default 0x48)
3868 + xtal On-board crystal frequency (default 14745600)
3871 +Name: sc16is752-spi1
3872 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
3873 + Enables the chip on SPI1.
3874 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3875 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3877 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
3878 +Params: int_pin GPIO used for IRQ (default 24)
3882 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
3883 + N.B. This overlay is designed for situations where the mmc driver is
3884 + the default, so it disables the other (mmc) interface - this will kill
3885 + WiFi on a Pi3. If this isn't what you want, either use the sdtweak
3886 + overlay or the new sd_* dtparams of the base DTBs.
3887 +Load: dtoverlay=sdhost,<param>=<val>
3888 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3891 + force_pio Disable DMA support (default off)
3893 + pio_limit Number of blocks above which to use DMA
3896 + debug Enable debug output (default off)
3900 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3901 + and enables SDIO via GPIOs 22-27.
3902 +Load: dtoverlay=sdio,<param>=<val>
3903 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3904 + framework requests 50MHz
3906 + poll_once Disable SDIO-device polling every second
3907 + (default on: polling once at boot-time)
3909 + bus_width Set the SDIO host bus width (default 4 bits)
3913 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3914 + and enables 1-bit SDIO via GPIOs 22-25.
3915 +Load: dtoverlay=sdio-1bit,<param>=<val>
3916 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3917 + framework requests 50MHz
3919 + poll_once Disable SDIO-device polling every second
3920 + (default on: polling once at boot-time)
3924 +Info: Tunes the bcm2835-sdhost SD/MMC driver
3925 + N.B. This functionality is now available via the sd_* dtparams in the
3927 +Load: dtoverlay=sdtweak,<param>=<val>
3928 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3931 + force_pio Disable DMA support (default off)
3933 + pio_limit Number of blocks above which to use DMA
3936 + debug Enable debug output (default off)
3938 + poll_once Looks for a card once after booting. Useful
3939 + for network booting scenarios to avoid the
3940 + overhead of continuous polling. N.B. Using
3941 + this option restricts the system to using a
3942 + single card per boot (or none at all).
3945 + enable Set to off to completely disable the interface
3950 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
3951 +Load: dtoverlay=smi
3956 +Info: Enables the userspace interface for the SMI driver
3957 +Load: dtoverlay=smi-dev
3962 +Info: Enables access to NAND flash via the SMI interface
3963 +Load: dtoverlay=smi-nand
3967 +Name: spi-gpio35-39
3968 +Info: Move SPI function block to GPIO 35 to 39
3969 +Load: dtoverlay=spi-gpio35-39
3974 +Info: Adds support for a number of SPI Real Time Clock devices
3975 +Load: dtoverlay=spi-rtc,<param>=<val>
3976 +Params: pcf2123 Select the PCF2123 device
3980 +Info: Allows the (software) CS pins for SPI0 to be changed
3981 +Load: dtoverlay=spi0-cs,<param>=<val>
3982 +Params: cs0_pin GPIO pin for CS0 (default 8)
3983 + cs1_pin GPIO pin for CS1 (default 7)
3987 +Info: Re-enables hardware CS/CE (chip selects) for SPI0
3988 +Load: dtoverlay=spi0-hw-cs
3993 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
3994 + dev node. The gpio pin number for the CS line and spidev device node
3995 + creation are configurable.
3996 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3997 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3998 +Load: dtoverlay=spi1-1cs,<param>=<val>
3999 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4000 + cs0_spidev Set to 'disabled' to stop the creation of a
4001 + userspace device node /dev/spidev1.0 (default
4002 + is 'okay' or enabled).
4006 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
4007 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4008 + creation are configurable.
4009 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
4010 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4011 +Load: dtoverlay=spi1-2cs,<param>=<val>
4012 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4013 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4014 + cs0_spidev Set to 'disabled' to stop the creation of a
4015 + userspace device node /dev/spidev1.0 (default
4016 + is 'okay' or enabled).
4017 + cs1_spidev Set to 'disabled' to stop the creation of a
4018 + userspace device node /dev/spidev1.1 (default
4019 + is 'okay' or enabled).
4023 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
4024 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4025 + creation are configurable.
4026 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
4027 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4028 +Load: dtoverlay=spi1-3cs,<param>=<val>
4029 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4030 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4031 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
4032 + cs0_spidev Set to 'disabled' to stop the creation of a
4033 + userspace device node /dev/spidev1.0 (default
4034 + is 'okay' or enabled).
4035 + cs1_spidev Set to 'disabled' to stop the creation of a
4036 + userspace device node /dev/spidev1.1 (default
4037 + is 'okay' or enabled).
4038 + cs2_spidev Set to 'disabled' to stop the creation of a
4039 + userspace device node /dev/spidev1.2 (default
4040 + is 'okay' or enabled).
4044 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
4045 + dev node. The gpio pin number for the CS line and spidev device node
4046 + creation are configurable.
4047 + N.B.: spi2 is only accessible with the Compute Module.
4048 +Load: dtoverlay=spi2-1cs,<param>=<val>
4049 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4050 + cs0_spidev Set to 'disabled' to stop the creation of a
4051 + userspace device node /dev/spidev2.0 (default
4052 + is 'okay' or enabled).
4056 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
4057 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4058 + creation are configurable.
4059 + N.B.: spi2 is only accessible with the Compute Module.
4060 +Load: dtoverlay=spi2-2cs,<param>=<val>
4061 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4062 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4063 + cs0_spidev Set to 'disabled' to stop the creation of a
4064 + userspace device node /dev/spidev2.0 (default
4065 + is 'okay' or enabled).
4066 + cs1_spidev Set to 'disabled' to stop the creation of a
4067 + userspace device node /dev/spidev2.1 (default
4068 + is 'okay' or enabled).
4072 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
4073 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4074 + creation are configurable.
4075 + N.B.: spi2 is only accessible with the Compute Module.
4076 +Load: dtoverlay=spi2-3cs,<param>=<val>
4077 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4078 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4079 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
4080 + cs0_spidev Set to 'disabled' to stop the creation of a
4081 + userspace device node /dev/spidev2.0 (default
4082 + is 'okay' or enabled).
4083 + cs1_spidev Set to 'disabled' to stop the creation of a
4084 + userspace device node /dev/spidev2.1 (default
4085 + is 'okay' or enabled).
4086 + cs2_spidev Set to 'disabled' to stop the creation of a
4087 + userspace device node /dev/spidev2.2 (default
4088 + is 'okay' or enabled).
4091 +Name: superaudioboard
4092 +Info: Configures the SuperAudioBoard sound card
4093 +Load: dtoverlay=superaudioboard,<param>=<val>
4094 +Params: gpiopin GPIO pin for codec reset
4098 +Info: Configures the Semtech SX150X I2C GPIO expanders.
4099 +Load: dtoverlay=sx150x,<param>=<val>
4100 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
4101 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
4102 + Permissible values of <m> (which is denoted in
4103 + hex) depend on the device variant. For SX1501,
4104 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
4105 + For SX1503 and SX1506, <m> may be 20. For
4106 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
4107 + For SX1508, <m> may be 20, 21, 22 or 23.
4109 + sx150<x>-<n>-<m>-int-gpio
4110 + Integer, enables interrupts on SX150X device on
4111 + I2C#<n> with slave address <m>, specifies
4112 + the GPIO pin to which NINT output of SX150X is
4117 +Info: 3.5" Color TFT Display by www.tinylcd.com
4118 + Options: Touch, RTC, keypad
4119 +Load: dtoverlay=tinylcd35,<param>=<val>
4120 +Params: speed Display SPI bus speed
4122 + rotate Display rotation {0,90,180,270}
4124 + fps Delay between frame updates
4126 + debug Debug output level {0-7}
4128 + touch Enable touch panel
4130 + touchgpio Touch controller IRQ GPIO
4132 + xohms Touchpanel: Resistance of X-plate in ohms
4134 + rtc-pcf PCF8563 Real Time Clock
4136 + rtc-ds DS1307 Real Time Clock
4138 + keypad Enable keypad
4141 + Display with touchpanel, PCF8563 RTC and keypad:
4142 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
4143 + Old touch display:
4144 + dtoverlay=tinylcd35,touch,touchgpio=3
4148 +Info: Change the pin usage of uart0
4149 +Load: dtoverlay=uart0,<param>=<val>
4150 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
4152 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
4154 + pin_func Alternative pin function - 4(Alt0) for 14&15,
4155 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
4159 +Info: Change the pin usage of uart1
4160 +Load: dtoverlay=uart1,<param>=<val>
4161 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
4163 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
4167 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises
4168 + vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
4169 +Load: dtoverlay=upstream
4173 +Name: upstream-aux-interrupt
4174 +Info: Allow usage of downstream .dtb with upstream kernel by binding AUX
4175 + devices directly to the shared AUX interrupt line. One of the parts
4176 + of the 'upstream' overlay
4177 +Load: dtoverlay=upstream-aux-interrupt
4182 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
4184 +Load: dtoverlay=vc4-fkms-v3d,<param>
4185 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4186 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4187 + cma-128 CMA is 128MB, 128MB-aligned
4188 + cma-96 CMA is 96MB, 128MB-aligned
4189 + cma-64 CMA is 64MB, 64MB-aligned
4193 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
4194 + booting to GUI while this overlay is in use will cause interesting
4196 +Load: dtoverlay=vc4-kms-v3d,<param>
4197 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4198 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4199 + cma-128 CMA is 128MB, 128MB-aligned
4200 + cma-96 CMA is 96MB, 128MB-aligned
4201 + cma-64 CMA is 64MB, 64MB-aligned
4205 +Info: Overlay for the Fen Logic VGA666 board
4206 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
4207 + after the kernel has started.
4208 +Load: dtoverlay=vga666
4213 +Info: Configures the w1-gpio Onewire interface module.
4214 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
4215 +Load: dtoverlay=w1-gpio,<param>=<val>
4216 +Params: gpiopin GPIO for I/O (default "4")
4218 + pullup Non-zero, "on", or "y" to enable the parasitic
4219 + power (2-wire, power-on-data) feature
4222 +Name: w1-gpio-pullup
4223 +Info: Configures the w1-gpio Onewire interface module.
4224 + Use this overlay if you *do* need a GPIO to drive an external pullup.
4225 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
4226 +Params: gpiopin GPIO for I/O (default "4")
4228 + pullup Non-zero, "on", or "y" to enable the parasitic
4229 + power (2-wire, power-on-data) feature
4231 + extpullup GPIO for external pullup (default "5")
4235 +Info: Configures the wittypi RTC module.
4236 +Load: dtoverlay=wittypi,<param>=<val>
4237 +Params: led_gpio GPIO for LED (default "17")
4238 + led_trigger Choose which activity the LED tracks (default
4245 +If you are experiencing problems that you think are DT-related, enable DT
4246 +diagnostic output by adding this to /boot/config.txt:
4250 +and rebooting. Then run:
4252 + sudo vcdbg log msg
4254 +and look for relevant messages.
4259 +This is only meant to be a quick introduction to the subject of Device Tree on
4260 +Raspberry Pi. There is a more complete explanation here:
4262 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
4264 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
4266 +// Definitions for ADAU1977 ADC
4271 + compatible = "brcm,bcm2708";
4277 + #address-cells = <1>;
4278 + #size-cells = <0>;
4281 + adau1977: codec@11 {
4282 + compatible = "adi,adau1977";
4284 + reset-gpios = <&gpio 5 0>;
4285 + AVDD-supply = <&vdd_3v3_reg>;
4298 + target = <&sound>;
4300 + compatible = "adi,adau1977-adc";
4301 + i2s-controller = <&i2s>;
4307 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
4313 + compatible = "brcm,bcm2708";
4323 + target-path = "/";
4325 + adau7002_codec: adau7002-codec {
4326 + #sound-dai-cells = <0>;
4327 + compatible = "adi,adau7002";
4328 +/* IOVDD-supply = <&supply>;*/
4335 + target = <&sound>;
4336 + sound_overlay: __overlay__ {
4337 + compatible = "simple-audio-card";
4338 + simple-audio-card,format = "i2s";
4339 + simple-audio-card,name = "adau7002";
4340 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
4341 + simple-audio-card,frame-slave = <&dailink0_slave>;
4342 + simple-audio-card,widgets =
4343 + "Microphone", "Microphone Jack";
4344 + simple-audio-card,routing =
4345 + "PDM_DAT", "Microphone Jack";
4347 + simple-audio-card,cpu {
4348 + sound-dai = <&i2s>;
4350 + dailink0_slave: simple-audio-card,codec {
4351 + sound-dai = <&adau7002_codec>;
4358 + card-name = <&sound_overlay>,"simple-audio-card,name";
4362 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
4365 + * 2016 - Erik Sejr
4371 + compatible = "brcm,bcm2708";
4372 + /* ----------- ADS1015 ------------ */
4374 + target = <&i2c_arm>;
4376 + #address-cells = <1>;
4377 + #size-cells = <0>;
4379 + ads1015: ads1015 {
4380 + compatible = "ti,ads1015";
4382 + #address-cells = <1>;
4383 + #size-cells = <0>;
4390 + target-path = "i2c_arm/ads1015";
4392 + #address-cells = <1>;
4393 + #size-cells = <0>;
4394 + channel_a: channel_a {
4397 + ti,datarate = <4>;
4403 + target-path = "i2c_arm/ads1015";
4405 + #address-cells = <1>;
4406 + #size-cells = <0>;
4407 + channel_b: channel_b {
4410 + ti,datarate = <4>;
4416 + target-path = "i2c_arm/ads1015";
4418 + #address-cells = <1>;
4419 + #size-cells = <0>;
4420 + channel_c: channel_c {
4423 + ti,datarate = <4>;
4429 + target-path = "i2c_arm/ads1015";
4431 + #address-cells = <1>;
4432 + #size-cells = <0>;
4433 + channel_d: channel_d {
4436 + ti,datarate = <4>;
4442 + addr = <&ads1015>,"reg:0";
4443 + cha_enable = <0>,"=1";
4444 + cha_cfg = <&channel_a>,"reg:0";
4445 + cha_gain = <&channel_a>,"ti,gain:0";
4446 + cha_datarate = <&channel_a>,"ti,datarate:0";
4447 + chb_enable = <0>,"=2";
4448 + chb_cfg = <&channel_b>,"reg:0";
4449 + chb_gain = <&channel_b>,"ti,gain:0";
4450 + chb_datarate = <&channel_b>,"ti,datarate:0";
4451 + chc_enable = <0>,"=3";
4452 + chc_cfg = <&channel_c>,"reg:0";
4453 + chc_gain = <&channel_c>,"ti,gain:0";
4454 + chc_datarate = <&channel_c>,"ti,datarate:0";
4455 + chd_enable = <0>,"=4";
4456 + chd_cfg = <&channel_d>,"reg:0";
4457 + chd_gain = <&channel_d>,"ti,gain:0";
4458 + chd_datarate = <&channel_d>,"ti,datarate:0";
4463 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
4466 + * TI ADS1115 multi-channel ADC overlay
4473 + compatible = "brcm,bcm2708";
4476 + target = <&i2c_arm>;
4478 + #address-cells = <1>;
4479 + #size-cells = <0>;
4482 + ads1115: ads1115 {
4483 + compatible = "ti,ads1115";
4485 + #address-cells = <1>;
4486 + #size-cells = <0>;
4493 + target-path = "i2c_arm/ads1115";
4495 + #address-cells = <1>;
4496 + #size-cells = <0>;
4498 + channel_a: channel_a {
4501 + ti,datarate = <7>;
4507 + target-path = "i2c_arm/ads1115";
4509 + #address-cells = <1>;
4510 + #size-cells = <0>;
4512 + channel_b: channel_b {
4515 + ti,datarate = <7>;
4521 + target-path = "i2c_arm/ads1115";
4523 + #address-cells = <1>;
4524 + #size-cells = <0>;
4526 + channel_c: channel_c {
4529 + ti,datarate = <7>;
4535 + target-path = "i2c_arm/ads1115";
4537 + #address-cells = <1>;
4538 + #size-cells = <0>;
4540 + channel_d: channel_d {
4543 + ti,datarate = <7>;
4549 + addr = <&ads1115>,"reg:0";
4550 + cha_enable = <0>,"=1";
4551 + cha_cfg = <&channel_a>,"reg:0";
4552 + cha_gain = <&channel_a>,"ti,gain:0";
4553 + cha_datarate = <&channel_a>,"ti,datarate:0";
4554 + chb_enable = <0>,"=2";
4555 + chb_cfg = <&channel_b>,"reg:0";
4556 + chb_gain = <&channel_b>,"ti,gain:0";
4557 + chb_datarate = <&channel_b>,"ti,datarate:0";
4558 + chc_enable = <0>,"=3";
4559 + chc_cfg = <&channel_c>,"reg:0";
4560 + chc_gain = <&channel_c>,"ti,gain:0";
4561 + chc_datarate = <&channel_c>,"ti,datarate:0";
4562 + chd_enable = <0>,"=4";
4563 + chd_cfg = <&channel_d>,"reg:0";
4564 + chd_gain = <&channel_d>,"ti,gain:0";
4565 + chd_datarate = <&channel_d>,"ti,datarate:0";
4569 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
4572 + * Generic Device Tree overlay for the ADS7846 touch controller
4580 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
4590 + target = <&spidev0>;
4592 + status = "disabled";
4597 + target = <&spidev1>;
4599 + status = "disabled";
4606 + ads7846_pins: ads7846_pins {
4607 + brcm,pins = <255>; /* illegal default value */
4608 + brcm,function = <0>; /* in */
4609 + brcm,pull = <0>; /* none */
4617 + /* needed to avoid dtc warning */
4618 + #address-cells = <1>;
4619 + #size-cells = <0>;
4621 + ads7846: ads7846@1 {
4622 + compatible = "ti,ads7846";
4624 + pinctrl-names = "default";
4625 + pinctrl-0 = <&ads7846_pins>;
4627 + spi-max-frequency = <2000000>;
4628 + interrupts = <255 2>; /* high-to-low edge triggered */
4629 + interrupt-parent = <&gpio>;
4630 + pendown-gpio = <&gpio 255 0>;
4632 + /* driver defaults */
4633 + ti,x-min = /bits/ 16 <0>;
4634 + ti,y-min = /bits/ 16 <0>;
4635 + ti,x-max = /bits/ 16 <0x0FFF>;
4636 + ti,y-max = /bits/ 16 <0x0FFF>;
4637 + ti,pressure-min = /bits/ 16 <0>;
4638 + ti,pressure-max = /bits/ 16 <0xFFFF>;
4639 + ti,x-plate-ohms = /bits/ 16 <400>;
4644 + cs = <&ads7846>,"reg:0";
4645 + speed = <&ads7846>,"spi-max-frequency:0";
4646 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
4647 + <&ads7846>,"interrupts:0",
4648 + <&ads7846>,"pendown-gpio:4";
4649 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
4650 + swapxy = <&ads7846>,"ti,swap-xy?";
4651 + xmin = <&ads7846>,"ti,x-min;0";
4652 + ymin = <&ads7846>,"ti,y-min;0";
4653 + xmax = <&ads7846>,"ti,x-max;0";
4654 + ymax = <&ads7846>,"ti,y-max;0";
4655 + pmin = <&ads7846>,"ti,pressure-min;0";
4656 + pmax = <&ads7846>,"ti,pressure-max;0";
4657 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
4661 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
4663 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
4668 + compatible = "brcm,bcm2708";
4680 + #address-cells = <1>;
4681 + #size-cells = <0>;
4685 + #sound-dai-cells = <0>;
4686 + compatible = "ti,pcm5122";
4688 + AVDD-supply = <&vdd_3v3_reg>;
4689 + DVDD-supply = <&vdd_3v3_reg>;
4690 + CPVDD-supply = <&vdd_3v3_reg>;
4697 + target = <&sound>;
4698 + frag2: __overlay__ {
4699 + compatible = "iqaudio,iqaudio-dac";
4700 + card_name = "Akkordion";
4701 + dai_name = "IQaudIO DAC";
4702 + dai_stream_name = "IQaudIO DAC HiFi";
4703 + i2s-controller = <&i2s>;
4709 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
4713 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
4716 + * Definitions for Allo Boss DAC board
4723 + compatible = "brcm,bcm2708";
4726 + target-path = "/clocks";
4728 + boss_osc: boss_osc {
4729 + compatible = "allo,dac-clk";
4730 + #clock-cells = <0>;
4745 + #address-cells = <1>;
4746 + #size-cells = <0>;
4750 + #sound-dai-cells = <0>;
4751 + compatible = "ti,pcm5122";
4752 + clocks = <&boss_osc>;
4760 + target = <&sound>;
4761 + boss_dac: __overlay__ {
4762 + compatible = "allo,boss-dac";
4763 + i2s-controller = <&i2s>;
4764 + mute-gpios = <&gpio 6 1>;
4770 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
4771 + slave = <&boss_dac>,"allo,slave?";
4775 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
4777 +// Definitions for Allo DigiOne
4782 + compatible = "brcm,bcm2708";
4794 + #address-cells = <1>;
4795 + #size-cells = <0>;
4799 + #sound-dai-cells = <0>;
4800 + compatible = "wlf,wm8804";
4802 + PVDD-supply = <&vdd_3v3_reg>;
4803 + DVDD-supply = <&vdd_3v3_reg>;
4805 + wlf,reset-gpio = <&gpio 17 0>;
4811 + target = <&sound>;
4813 + compatible = "allo,allo-digione";
4814 + i2s-controller = <&i2s>;
4816 + clock44-gpio = <&gpio 5 0>;
4817 + clock48-gpio = <&gpio 6 0>;
4822 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
4825 + * Definitions for Allo Katana DAC boards
4832 + compatible = "brcm,bcm2708";
4837 + #sound-dai-cells = <0>;
4840 + cpu_endpoint: endpoint {
4841 + remote-endpoint = <&codec_endpoint>;
4842 + bitclock-master = <&codec_endpoint>;
4843 + frame-master = <&codec_endpoint>;
4844 + dai-format = "i2s";
4853 + #address-cells = <1>;
4854 + #size-cells = <0>;
4857 + allo-katana-codec@30 {
4858 + #sound-dai-cells = <0>;
4859 + compatible = "allo,allo-katana-codec";
4862 + codec_endpoint: endpoint {
4863 + remote-endpoint = <&cpu_endpoint>;
4871 + target = <&sound>;
4872 + katana_dac: __overlay__ {
4873 + compatible = "audio-graph-card";
4874 + label = "Allo Katana";
4875 + dais = <&cpu_port>;
4882 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
4885 + * Definitions for Allo Piano DAC (2.0/2.1) boards
4887 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
4888 + * (left/right) and the other provides a subwoofer output, using DSP on the
4889 + * chip for digital high/low pass crossover.
4890 + * The initial support for this hardware, that doesn't require any codec driver
4891 + * modifications, uses only one DAC chip for stereo (left/right) output, the
4892 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
4899 + compatible = "brcm,bcm2708";
4911 + #address-cells = <1>;
4912 + #size-cells = <0>;
4916 + #sound-dai-cells = <0>;
4917 + compatible = "ti,pcm5142";
4925 + target = <&sound>;
4926 + piano_dac: __overlay__ {
4927 + compatible = "allo,piano-dac";
4928 + i2s-controller = <&i2s>;
4934 + 24db_digital_gain =
4935 + <&piano_dac>,"allo,24db_digital_gain?";
4939 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
4941 +// Definitions for Piano DAC
4946 + compatible = "brcm,bcm2708";
4958 + #address-cells = <1>;
4959 + #size-cells = <0>;
4962 + allo_pcm5122_4c: pcm5122@4c {
4963 + #sound-dai-cells = <0>;
4964 + compatible = "ti,pcm5122";
4968 + allo_pcm5122_4d: pcm5122@4d {
4969 + #sound-dai-cells = <0>;
4970 + compatible = "ti,pcm5122";
4978 + target = <&sound>;
4979 + piano_dac: __overlay__ {
4980 + compatible = "allo,piano-dac-plus";
4981 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
4982 + i2s-controller = <&i2s>;
4983 + mute1-gpios = <&gpio 6 1>;
4984 + mute2-gpios = <&gpio 25 1>;
4990 + 24db_digital_gain =
4991 + <&piano_dac>,"allo,24db_digital_gain?";
4993 + <&piano_dac>,"allo,glb_mclk?";
4997 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
5003 + compatible = "brcm,bcm2708";
5006 + target = <&sound>;
5008 + compatible = "simple-audio-card";
5009 + simple-audio-card,name = "ApplePi-DAC";
5013 + playback_link: simple-audio-card,dai-link@1 {
5017 + sound-dai = <&i2s>;
5018 + dai-tdm-slot-num = <2>;
5019 + dai-tdm-slot-width = <32>;
5022 + p_codec_dai: codec {
5023 + sound-dai = <&codec_out>;
5030 + target-path = "/";
5032 + codec_out: pcm1794a-codec {
5033 + #sound-dai-cells = <0>;
5034 + compatible = "ti,pcm1794a";
5043 + #sound-dai-cells = <0>;
5050 + Written by: Leonid Ayzenshtat
5051 + Company: Orchard Audio (www.orchardaudio.com)
5054 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
5057 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
5062 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
5065 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
5070 + #address-cells = <1>;
5071 + #size-cells = <0>;
5075 + lowpan0: at86rf233@0 {
5076 + compatible = "atmel,at86rf233";
5078 + interrupt-parent = <&gpio>;
5079 + interrupts = <23 4>; /* active high */
5080 + reset-gpio = <&gpio 24 1>;
5081 + sleep-gpio = <&gpio 25 1>;
5082 + spi-max-frequency = <3000000>;
5083 + xtal-trim = /bits/ 8 <0xf>;
5089 + target = <&spidev0>;
5091 + status = "disabled";
5098 + lowpan0_pins: lowpan0_pins {
5099 + brcm,pins = <23 24 25>;
5100 + brcm,function = <0 1 1>; /* in out out */
5106 + interrupt = <&lowpan0>, "interrupts:0",
5107 + <&lowpan0_pins>, "brcm,pins:0";
5108 + reset = <&lowpan0>, "reset-gpio:4",
5109 + <&lowpan0_pins>, "brcm,pins:4";
5110 + sleep = <&lowpan0>, "sleep-gpio:4",
5111 + <&lowpan0_pins>, "brcm,pins:8";
5112 + speed = <&lowpan0>, "spi-max-frequency:0";
5113 + trim = <&lowpan0>, "xtal-trim.0";
5117 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
5119 +// Definitions for audioinjector.net audio add on soundcard
5124 + compatible = "brcm,bcm2708";
5136 + #address-cells = <1>;
5137 + #size-cells = <0>;
5140 + cs42448: cs42448@48 {
5141 + #sound-dai-cells = <0>;
5142 + compatible = "cirrus,cs42448";
5144 + clocks = <&cs42448_mclk>;
5145 + clock-names = "mclk";
5146 + VA-supply = <&vdd_5v0_reg>;
5147 + VD-supply = <&vdd_3v3_reg>;
5148 + VLS-supply = <&vdd_3v3_reg>;
5149 + VLC-supply = <&vdd_3v3_reg>;
5153 + cs42448_mclk: codec-mclk {
5154 + compatible = "fixed-clock";
5155 + #clock-cells = <0>;
5156 + clock-frequency = <49152000>;
5162 + target = <&sound>;
5163 + snd: __overlay__ {
5164 + compatible = "ai,audioinjector-octo-soundcard";
5165 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
5167 + reset-gpios = <&gpio 5 0>;
5168 + i2s-controller = <&i2s>;
5169 + codec = <&cs42448>;
5175 + non-stop-clocks = <&snd>, "non-stop-clocks?";
5179 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
5181 +// Definitions for audioinjector.net audio add on soundcard
5186 + compatible = "brcm,bcm2708";
5198 + #address-cells = <1>;
5199 + #size-cells = <0>;
5203 + #sound-dai-cells = <0>;
5204 + compatible = "wlf,wm8731";
5212 + target = <&sound>;
5214 + compatible = "ai,audioinjector-pi-soundcard";
5215 + i2s-controller = <&i2s>;
5221 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
5227 + compatible = "brcm,bcm2708";
5230 + target = <&audio_pins>;
5231 + frag0: __overlay__ {
5232 + brcm,pins = < 12 13 >;
5233 + brcm,function = < 4 >; /* alt0 alt0 */
5238 + swap_lr = <&frag0>, "swap_lr?";
5239 + enable_jack = <&frag0>, "enable_jack?";
5243 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
5249 + compatible = "brcm,bcm2708";
5253 + sdio_wifi: __overlay__ {
5254 + pinctrl-names = "default";
5255 + pinctrl-0 = <&sdio_pins>;
5257 + brcm,overclock-50 = <35>;
5265 + sdio_pins: sdio_pins {
5266 + brcm,pins = <34 35 36 37 38 39>;
5267 + brcm,function = <7>; /* ALT3 = SD1 */
5268 + brcm,pull = <0 2 2 2 2 2>;
5271 + power_ctrl_pins: power_ctrl_pins {
5273 + brcm,function = <1>; // out
5279 + target-path = "/";
5281 + // We should investigate how to switch to mmc-pwrseq-sd8787
5282 + // Currently that module requires two GPIOs to function since it
5283 + // targets a slightly different chip
5284 + power_ctrl: power_ctrl {
5285 + compatible = "gpio-poweroff";
5286 + gpios = <&gpio 40 1>;
5291 + compatible = "i2c-gpio";
5292 + gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>;
5293 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
5294 + #address-cells = <1>;
5295 + #size-cells = <0>;
5301 + target = <&i2c_soft>;
5303 + #address-cells = <1>;
5304 + #size-cells = <0>;
5307 + gpio_expander: gpio_expander@20 {
5308 + compatible = "nxp,pca9554";
5310 + #gpio-cells = <2>;
5316 + ds1307: ds1307@68 {
5317 + compatible = "maxim,ds1307";
5325 +++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
5327 +// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
5332 + compatible = "brcm,bcm2708";
5335 + target = <&i2c_arm>;
5337 + #address-cells = <1>;
5338 + #size-cells = <0>;
5342 + compatible = "bosch,bmp085";
5344 + default-oversampling = <3>;
5351 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
5354 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
5360 + compatible = "brcm,bcm2708";
5363 + target-path = "/";
5367 + compatible = "dht11";
5368 + pinctrl-names = "default";
5369 + pinctrl-0 = <&dht11_pins>;
5370 + gpios = <&gpio 4 0>;
5379 + dht11_pins: dht11_pins {
5381 + brcm,function = <0>; // in
5382 + brcm,pull = <0>; // off
5388 + gpiopin = <&dht11_pins>,"brcm,pins:0",
5389 + <&dht11>,"gpios:4";
5393 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
5395 +// Definitions for Dion Audio LOCO DAC-AMP
5398 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
5405 + compatible = "brcm,bcm2708";
5415 + target-path = "/";
5418 + #sound-dai-cells = <0>;
5419 + compatible = "ti,pcm5102a";
5426 + target = <&sound>;
5428 + compatible = "dionaudio,loco-pcm5242-tpa3118";
5429 + i2s-controller = <&i2s>;
5435 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
5438 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
5439 + * eg. dtoverlay=dionaudio-loco-v2
5441 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
5448 + compatible = "brcm,bcm2708";
5451 + target = <&sound>;
5452 + frag0: __overlay__ {
5453 + compatible = "dionaudio,dionaudio-loco-v2";
5454 + i2s-controller = <&i2s>;
5469 + #address-cells = <1>;
5470 + #size-cells = <0>;
5474 + #sound-dai-cells = <0>;
5475 + compatible = "ti,pcm5122";
5483 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
5487 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
5493 + compatible = "brcm,bcm2708";
5495 + // There is no DPI driver module, but we need a platform device
5496 + // node (that doesn't already use pinctrl) to hang the pinctrl
5497 + // reference on - leds will do
5502 + pinctrl-names = "default";
5503 + pinctrl-0 = <&dpi18_pins>;
5510 + dpi18_pins: dpi18_pins {
5511 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5512 + 12 13 14 15 16 17 18 19 20
5514 + brcm,function = <6>; /* alt2 */
5515 + brcm,pull = <0>; /* no pull */
5521 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
5527 + compatible = "brcm,bcm2708";
5529 + // There is no DPI driver module, but we need a platform device
5530 + // node (that doesn't already use pinctrl) to hang the pinctrl
5531 + // reference on - leds will do
5536 + pinctrl-names = "default";
5537 + pinctrl-0 = <&dpi24_pins>;
5544 + dpi24_pins: dpi24_pins {
5545 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5546 + 12 13 14 15 16 17 18 19 20
5547 + 21 22 23 24 25 26 27>;
5548 + brcm,function = <6>; /* alt2 */
5549 + brcm,pull = <0>; /* no pull */
5555 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
5561 + compatible = "brcm,bcm2708";
5565 + #address-cells = <1>;
5566 + #size-cells = <1>;
5568 + compatible = "brcm,bcm2708-usb";
5569 + reg = <0x7e980000 0x10000>,
5570 + <0x7e006000 0x1000>;
5571 + interrupts = <2 0>,
5578 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
5584 + compatible = "brcm,bcm2708";
5588 + #address-cells = <1>;
5589 + #size-cells = <1>;
5590 + dwc2_usb: __overlay__ {
5591 + compatible = "brcm,bcm2835-usb";
5592 + reg = <0x7e980000 0x10000>;
5593 + interrupts = <1 9>;
5595 + g-np-tx-fifo-size = <32>;
5596 + g-rx-fifo-size = <256>;
5597 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
5603 + dr_mode = <&dwc2_usb>, "dr_mode";
5604 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
5605 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
5609 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
5611 +// Overlay for the Microchip ENC28J60 Ethernet Controller
5616 + compatible = "brcm,bcm2708";
5621 + /* needed to avoid dtc warning */
5622 + #address-cells = <1>;
5623 + #size-cells = <0>;
5628 + compatible = "microchip,enc28j60";
5629 + reg = <0>; /* CE0 */
5630 + pinctrl-names = "default";
5631 + pinctrl-0 = <ð1_pins>;
5632 + interrupt-parent = <&gpio>;
5633 + interrupts = <25 0x2>; /* falling edge */
5634 + spi-max-frequency = <12000000>;
5641 + target = <&spidev0>;
5643 + status = "disabled";
5650 + eth1_pins: eth1_pins {
5652 + brcm,function = <0>; /* in */
5653 + brcm,pull = <0>; /* none */
5659 + int_pin = <ð1>, "interrupts:0",
5660 + <ð1_pins>, "brcm,pins:0";
5661 + speed = <ð1>, "spi-max-frequency:0";
5665 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
5667 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
5668 +// Interrupt pin: 39
5673 + compatible = "brcm,bcm2708";
5678 + /* needed to avoid dtc warning */
5679 + #address-cells = <1>;
5680 + #size-cells = <0>;
5685 + compatible = "microchip,enc28j60";
5686 + reg = <0>; /* CE0 */
5687 + pinctrl-names = "default";
5688 + pinctrl-0 = <ð1_pins>;
5689 + interrupt-parent = <&gpio>;
5690 + interrupts = <39 0x2>; /* falling edge */
5691 + spi-max-frequency = <12000000>;
5700 + eth1_pins: eth1_pins {
5702 + brcm,function = <0>; /* in */
5703 + brcm,pull = <0>; /* none */
5709 + int_pin = <ð1>, "interrupts:0",
5710 + <ð1_pins>, "brcm,pins:0";
5711 + speed = <ð1>, "spi-max-frequency:0";
5715 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
5717 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
5722 + compatible = "brcm,bcm2708";
5727 + exc3000_pins: exc3000_pins {
5728 + brcm,pins = <4>; // interrupt
5729 + brcm,function = <0>; // in
5730 + brcm,pull = <2>; // pull-up
5738 + #address-cells = <1>;
5739 + #size-cells = <0>;
5742 + exc3000: exc3000@2a {
5743 + compatible = "eeti,exc3000";
5745 + pinctrl-names = "default";
5746 + pinctrl-0 = <&exc3000_pins>;
5747 + interrupt-parent = <&gpio>;
5748 + interrupts = <4 8>; // active low level-sensitive
5749 + touchscreen-size-x = <4096>;
5750 + touchscreen-size-y = <4096>;
5756 + interrupt = <&exc3000_pins>,"brcm,pins:0",
5757 + <&exc3000>,"interrupts:0";
5758 + sizex = <&exc3000>,"touchscreen-size-x:0";
5759 + sizey = <&exc3000>,"touchscreen-size-y:0";
5760 + invx = <&exc3000>,"touchscreen-inverted-x?";
5761 + invy = <&exc3000>,"touchscreen-inverted-y?";
5762 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
5766 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
5768 +// Definitions for Fe-Pi Audio
5773 + compatible = "brcm,bcm2708";
5776 + target = <&clocks>;
5778 + sgtl5000_mclk: sgtl5000_mclk {
5779 + compatible = "fixed-clock";
5780 + #clock-cells = <0>;
5781 + clock-frequency = <12288000>;
5782 + clock-output-names = "sgtl5000-mclk";
5790 + reg_1v8: reg_1v8@0 {
5791 + compatible = "regulator-fixed";
5792 + regulator-name = "1V8";
5793 + regulator-min-microvolt = <1800000>;
5794 + regulator-max-microvolt = <1800000>;
5795 + regulator-always-on;
5803 + #address-cells = <1>;
5804 + #size-cells = <0>;
5808 + #sound-dai-cells = <0>;
5809 + compatible = "fepi,sgtl5000";
5811 + clocks = <&sgtl5000_mclk>;
5812 + micbias-resistor-k-ohms = <2>;
5813 + micbias-voltage-m-volts = <3000>;
5814 + VDDA-supply = <&vdd_3v3_reg>;
5815 + VDDIO-supply = <&vdd_3v3_reg>;
5816 + VDDD-supply = <®_1v8>;
5830 + target = <&sound>;
5832 + compatible = "fe-pi,fe-pi-audio";
5833 + i2s-controller = <&i2s>;
5839 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
5841 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
5846 + compatible = "brcm,bcm2708";
5851 + goodix_pins: goodix_pins {
5852 + brcm,pins = <4 17>; // interrupt and reset
5853 + brcm,function = <0 0>; // in
5854 + brcm,pull = <2 2>; // pull-up
5862 + #address-cells = <1>;
5863 + #size-cells = <0>;
5866 + gt9271: gt9271@14 {
5867 + compatible = "goodix,gt9271";
5869 + pinctrl-names = "default";
5870 + pinctrl-0 = <&goodix_pins>;
5871 + interrupt-parent = <&gpio>;
5872 + interrupts = <4 2>; // high-to-low edge triggered
5873 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
5874 + reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
5880 + interrupt = <&goodix_pins>,"brcm,pins:0",
5881 + <>9271>,"interrupts:0",
5882 + <>9271>,"irq-gpios:4";
5883 + reset = <&goodix_pins>,"brcm,pins:4",
5884 + <>9271>,"reset-gpios:4";
5888 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
5890 +// Definitions for Google voiceHAT v1 soundcard overlay
5895 + compatible = "brcm,bcm2708";
5907 + googlevoicehat_pins: googlevoicehat_pins {
5909 + brcm,function = <1>; /* out */
5910 + brcm,pull = <0>; /* up */
5917 + target-path = "/";
5920 + #sound-dai-cells = <0>;
5921 + compatible = "google,voicehat";
5922 + pinctrl-names = "default";
5923 + pinctrl-0 = <&googlevoicehat_pins>;
5924 + sdmode-gpios= <&gpio 16 0>;
5931 + target = <&sound>;
5933 + compatible = "googlevoicehat,googlevoicehat-soundcard";
5934 + i2s-controller = <&i2s>;
5940 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
5942 +// Definitions for ir-gpio module
5947 + compatible = "brcm,bcm2708";
5950 + target-path = "/";
5952 + gpio_ir: ir-receiver@12 {
5953 + compatible = "gpio-ir-receiver";
5954 + pinctrl-names = "default";
5955 + pinctrl-0 = <&gpio_ir_pins>;
5957 + // pin number, high or low
5958 + gpios = <&gpio 18 1>;
5960 + // parameter for keymap name
5961 + linux,rc-map-name = "rc-rc6-mce";
5971 + gpio_ir_pins: gpio_ir_pins@12 {
5972 + brcm,pins = <18>; // pin 18
5973 + brcm,function = <0>; // in
5974 + brcm,pull = <1>; // down
5981 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
5982 + <&gpio_ir>,"reg:0",
5983 + <&gpio_ir_pins>,"brcm,pins:0",
5984 + <&gpio_ir_pins>,"reg:0";
5985 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
5987 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
5991 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
5997 + compatible = "brcm,bcm2708";
6002 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
6004 + brcm,function = <1>; // out
6010 + target-path = "/";
6012 + gpio_ir_tx: gpio-ir-transmitter@12 {
6013 + compatible = "gpio-ir-tx";
6014 + pinctrl-names = "default";
6015 + pinctrl-0 = <&gpio_ir_tx_pins>;
6016 + gpios = <&gpio 18 0>;
6022 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
6023 + <&gpio_ir_tx>, "reg:0",
6024 + <&gpio_ir_tx_pins>, "brcm,pins:0",
6025 + <&gpio_ir_tx_pins>, "reg:0";
6026 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
6030 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
6032 +// Definitions for gpio-key module
6037 + compatible = "brcm,bcm2708";
6040 + // Configure the gpio pin controller
6043 + pin_state: button_pins@0 {
6044 + brcm,pins = <3>; // gpio number
6045 + brcm,function = <0>; // 0 = input, 1 = output
6046 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6051 + target-path = "/";
6053 + button: button@0 {
6054 + compatible = "gpio-keys";
6055 + pinctrl-names = "default";
6056 + pinctrl-0 = <&pin_state>;
6060 + linux,code = <116>;
6061 + gpios = <&gpio 3 1>;
6062 + label = "KEY_POWER";
6069 + gpio = <&key>,"gpios:4",
6070 + <&button>,"reg:0",
6071 + <&pin_state>,"brcm,pins:0",
6072 + <&pin_state>,"reg:0";
6073 + label = <&key>,"label";
6074 + keycode = <&key>,"linux,code:0";
6075 + gpio_pull = <&pin_state>,"brcm,pull:0";
6076 + active_low = <&key>,"gpios:8";
6081 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
6087 + compatible = "brcm,bcm2835";
6090 + // Configure the gpio pin controller
6098 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
6100 +// Definitions for gpio-poweroff module
6105 + compatible = "brcm,bcm2708";
6108 + target-path = "/";
6110 + power_ctrl: power_ctrl {
6111 + compatible = "gpio-poweroff";
6112 + gpios = <&gpio 26 0>;
6121 + power_ctrl_pins: power_ctrl_pins {
6123 + brcm,function = <1>; // out
6129 + gpiopin = <&power_ctrl>,"gpios:4",
6130 + <&power_ctrl_pins>,"brcm,pins:0";
6131 + active_low = <&power_ctrl>,"gpios:8";
6132 + input = <&power_ctrl>,"input?";
6133 + export = <&power_ctrl>,"export?";
6137 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
6139 +// Definitions for gpio-poweroff module
6143 +// This overlay sets up an input device that generates KEY_POWER events
6144 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
6145 +// also be used to wake up (start) the Rpi again after shutdown. Since
6146 +// wakeup is active-low, this defaults to active-low with a pullup
6147 +// enabled, but all of this can be changed using overlay parameters (but
6148 +// note that GPIO3 has an external pullup on at least some boards).
6151 + compatible = "brcm,bcm2708";
6154 + // Configure the gpio pin controller
6157 + // Define a pinctrl state, that sets up the gpio
6158 + // as an input with a pullup enabled. This does
6159 + // not take effect by itself, only when referenced
6160 + // by a "pinctrl client", as is done below. See:
6161 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
6162 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
6163 + pin_state: shutdown_button_pins {
6164 + brcm,pins = <3>; // gpio number
6165 + brcm,function = <0>; // 0 = input, 1 = output
6166 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6171 + // Add a new device to the /soc devicetree node
6172 + target-path = "/soc";
6175 + // Let the gpio-keys driver handle this device. See:
6176 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
6177 + compatible = "gpio-keys";
6179 + // Declare a single pinctrl state (referencing the one declared above) and name it
6180 + // default, so it is activated automatically.
6181 + pinctrl-names = "default";
6182 + pinctrl-0 = <&pin_state>;
6184 + // Enable this device
6187 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
6188 + // (keycode 116, see
6189 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
6190 + button: shutdown {
6191 + label = "shutdown";
6192 + linux,code = <116>; // KEY_POWER
6193 + gpios = <&gpio 3 1>;
6199 + // This defines parameters that can be specified when loading
6200 + // the overlay. Each foo = line specifies one parameter, named
6201 + // foo. The rest of the specification gives properties where the
6202 + // parameter value is inserted into (changing the values above
6203 + // or adding new ones).
6205 + // Allow overriding the GPIO number.
6206 + gpio_pin = <&button>,"gpios:4",
6207 + <&pin_state>,"brcm,pins:0";
6209 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
6210 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
6211 + // on some boards).
6212 + gpio_pull = <&pin_state>,"brcm,pull:0";
6214 + // Allow setting the active_low flag. 0 = active high, 1 = active low
6215 + active_low = <&button>,"gpios:8";
6220 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
6222 +// Definitions for HiFiBerry Amp/Amp+
6227 + compatible = "brcm,bcm2708";
6239 + #address-cells = <1>;
6240 + #size-cells = <0>;
6244 + #sound-dai-cells = <0>;
6245 + compatible = "ti,tas5713";
6253 + target = <&sound>;
6255 + compatible = "hifiberry,hifiberry-amp";
6256 + i2s-controller = <&i2s>;
6262 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
6264 +// Definitions for HiFiBerry DAC
6269 + compatible = "brcm,bcm2708";
6279 + target-path = "/";
6282 + #sound-dai-cells = <0>;
6283 + compatible = "ti,pcm5102a";
6290 + target = <&sound>;
6292 + compatible = "hifiberry,hifiberry-dac";
6293 + i2s-controller = <&i2s>;
6299 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
6301 +// Definitions for HiFiBerry DAC+
6306 + compatible = "brcm,bcm2708";
6309 + target-path = "/clocks";
6311 + dacpro_osc: dacpro_osc {
6312 + compatible = "hifiberry,dacpro-clk";
6313 + #clock-cells = <0>;
6328 + #address-cells = <1>;
6329 + #size-cells = <0>;
6333 + #sound-dai-cells = <0>;
6334 + compatible = "ti,pcm5122";
6336 + clocks = <&dacpro_osc>;
6337 + AVDD-supply = <&vdd_3v3_reg>;
6338 + DVDD-supply = <&vdd_3v3_reg>;
6339 + CPVDD-supply = <&vdd_3v3_reg>;
6346 + target = <&sound>;
6347 + hifiberry_dacplus: __overlay__ {
6348 + compatible = "hifiberry,hifiberry-dacplus";
6349 + i2s-controller = <&i2s>;
6355 + 24db_digital_gain =
6356 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
6357 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
6361 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
6363 +// Definitions for HiFiBerry Digi
6368 + compatible = "brcm,bcm2708";
6380 + #address-cells = <1>;
6381 + #size-cells = <0>;
6385 + #sound-dai-cells = <0>;
6386 + compatible = "wlf,wm8804";
6388 + PVDD-supply = <&vdd_3v3_reg>;
6389 + DVDD-supply = <&vdd_3v3_reg>;
6396 + target = <&sound>;
6398 + compatible = "hifiberry,hifiberry-digi";
6399 + i2s-controller = <&i2s>;
6405 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
6407 +// Definitions for HiFiBerry Digi Pro
6412 + compatible = "brcm,bcm2708";
6424 + #address-cells = <1>;
6425 + #size-cells = <0>;
6429 + #sound-dai-cells = <0>;
6430 + compatible = "wlf,wm8804";
6432 + PVDD-supply = <&vdd_3v3_reg>;
6433 + DVDD-supply = <&vdd_3v3_reg>;
6440 + target = <&sound>;
6442 + compatible = "hifiberry,hifiberry-digi";
6443 + i2s-controller = <&i2s>;
6445 + clock44-gpio = <&gpio 5 0>;
6446 + clock48-gpio = <&gpio 6 0>;
6451 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
6454 + * Device Tree overlay for HY28A display
6462 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6472 + target = <&spidev0>;
6474 + status = "disabled";
6479 + target = <&spidev1>;
6481 + status = "disabled";
6488 + hy28a_pins: hy28a_pins {
6489 + brcm,pins = <17 25 18>;
6490 + brcm,function = <0 1 1>; /* in out out */
6498 + /* needed to avoid dtc warning */
6499 + #address-cells = <1>;
6500 + #size-cells = <0>;
6503 + compatible = "ilitek,ili9320";
6505 + pinctrl-names = "default";
6506 + pinctrl-0 = <&hy28a_pins>;
6508 + spi-max-frequency = <32000000>;
6515 + startbyte = <0x70>;
6516 + reset-gpios = <&gpio 25 0>;
6517 + led-gpios = <&gpio 18 1>;
6521 + hy28a_ts: hy28a-ts@1 {
6522 + compatible = "ti,ads7846";
6525 + spi-max-frequency = <2000000>;
6526 + interrupts = <17 2>; /* high-to-low edge triggered */
6527 + interrupt-parent = <&gpio>;
6528 + pendown-gpio = <&gpio 17 0>;
6529 + ti,x-plate-ohms = /bits/ 16 <100>;
6530 + ti,pressure-max = /bits/ 16 <255>;
6535 + speed = <&hy28a>,"spi-max-frequency:0";
6536 + rotate = <&hy28a>,"rotate:0";
6537 + fps = <&hy28a>,"fps:0";
6538 + debug = <&hy28a>,"debug:0";
6539 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
6540 + resetgpio = <&hy28a>,"reset-gpios:4",
6541 + <&hy28a_pins>, "brcm,pins:4";
6542 + ledgpio = <&hy28a>,"led-gpios:4",
6543 + <&hy28a_pins>, "brcm,pins:8";
6547 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
6550 + * Device Tree overlay for HY28b display shield by Texy
6558 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6568 + target = <&spidev0>;
6570 + status = "disabled";
6575 + target = <&spidev1>;
6577 + status = "disabled";
6584 + hy28b_pins: hy28b_pins {
6585 + brcm,pins = <17 25 18>;
6586 + brcm,function = <0 1 1>; /* in out out */
6594 + /* needed to avoid dtc warning */
6595 + #address-cells = <1>;
6596 + #size-cells = <0>;
6599 + compatible = "ilitek,ili9325";
6601 + pinctrl-names = "default";
6602 + pinctrl-0 = <&hy28b_pins>;
6604 + spi-max-frequency = <48000000>;
6611 + startbyte = <0x70>;
6612 + reset-gpios = <&gpio 25 0>;
6613 + led-gpios = <&gpio 18 1>;
6615 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
6617 + init = <0x10000e7 0x0010
6672 + hy28b_ts: hy28b-ts@1 {
6673 + compatible = "ti,ads7846";
6676 + spi-max-frequency = <2000000>;
6677 + interrupts = <17 2>; /* high-to-low edge triggered */
6678 + interrupt-parent = <&gpio>;
6679 + pendown-gpio = <&gpio 17 0>;
6680 + ti,x-plate-ohms = /bits/ 16 <100>;
6681 + ti,pressure-max = /bits/ 16 <255>;
6686 + speed = <&hy28b>,"spi-max-frequency:0";
6687 + rotate = <&hy28b>,"rotate:0";
6688 + fps = <&hy28b>,"fps:0";
6689 + debug = <&hy28b>,"debug:0";
6690 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
6691 + resetgpio = <&hy28b>,"reset-gpios:4",
6692 + <&hy28b_pins>, "brcm,pins:4";
6693 + ledgpio = <&hy28b>,"led-gpios:4",
6694 + <&hy28b_pins>, "brcm,pins:8";
6698 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
6704 + compatible = "brcm,bcm2708";
6707 + target = <&i2c_arm>;
6709 + compatible = "brcm,bcm2708-i2c";
6714 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
6716 +// Overlay for i2c_gpio bitbanging host bus.
6721 + compatible = "brcm,bcm2708";
6724 + target-path = "/";
6727 + compatible = "i2c-gpio";
6728 + gpios = <&gpio 23 0 /* sda */
6729 + &gpio 24 0 /* scl */
6731 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6732 + #address-cells = <1>;
6733 + #size-cells = <0>;
6739 + target-path = "/aliases";
6741 + i2c_gpio = "/i2c@0";
6746 + target-path = "/__symbols__";
6748 + i2c_gpio = "/i2c@0";
6753 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
6754 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
6755 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
6756 + bus = <&i2c_gpio>, "reg:0";
6760 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
6762 +// Umbrella I2C Mux overlay
6768 + compatible = "brcm,bcm2708";
6771 + target = <&i2c_arm>;
6773 + #address-cells = <1>;
6774 + #size-cells = <0>;
6778 + compatible = "nxp,pca9542";
6780 + #address-cells = <1>;
6781 + #size-cells = <0>;
6784 + #address-cells = <1>;
6785 + #size-cells = <0>;
6789 + #address-cells = <1>;
6790 + #size-cells = <0>;
6798 + target = <&i2c_arm>;
6800 + #address-cells = <1>;
6801 + #size-cells = <0>;
6805 + compatible = "nxp,pca9545";
6807 + #address-cells = <1>;
6808 + #size-cells = <0>;
6811 + #address-cells = <1>;
6812 + #size-cells = <0>;
6816 + #address-cells = <1>;
6817 + #size-cells = <0>;
6821 + #address-cells = <1>;
6822 + #size-cells = <0>;
6826 + #address-cells = <1>;
6827 + #size-cells = <0>;
6835 + target = <&i2c_arm>;
6837 + #address-cells = <1>;
6838 + #size-cells = <0>;
6842 + compatible = "nxp,pca9548";
6844 + #address-cells = <1>;
6845 + #size-cells = <0>;
6848 + #address-cells = <1>;
6849 + #size-cells = <0>;
6853 + #address-cells = <1>;
6854 + #size-cells = <0>;
6858 + #address-cells = <1>;
6859 + #size-cells = <0>;
6863 + #address-cells = <1>;
6864 + #size-cells = <0>;
6868 + #address-cells = <1>;
6869 + #size-cells = <0>;
6873 + #address-cells = <1>;
6874 + #size-cells = <0>;
6878 + #address-cells = <1>;
6879 + #size-cells = <0>;
6883 + #address-cells = <1>;
6884 + #size-cells = <0>;
6892 + pca9542 = <0>, "+0";
6893 + pca9545 = <0>, "+1";
6894 + pca9548 = <0>, "+2";
6896 + addr = <&pca9542>,"reg:0",
6897 + <&pca9545>,"reg:0",
6898 + <&pca9548>,"reg:0";
6902 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
6904 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
6909 + compatible = "brcm,bcm2708";
6912 + target = <&i2c_arm>;
6914 + #address-cells = <1>;
6915 + #size-cells = <0>;
6919 + compatible = "nxp,pca9685";
6927 + addr = <&pca>,"reg:0";
6931 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
6933 +// Definitions for several I2C based Real Time Clocks
6934 +// Available through i2c-gpio
6939 + compatible = "brcm,bcm2708";
6942 + target-path = "/";
6944 + i2c_gpio: i2c-gpio-rtc@0 {
6945 + compatible = "i2c-gpio";
6946 + gpios = <&gpio 23 0 /* sda */
6947 + &gpio 24 0 /* scl */
6949 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6950 + #address-cells = <1>;
6951 + #size-cells = <0>;
6957 + target = <&i2c_gpio>;
6959 + #address-cells = <1>;
6960 + #size-cells = <0>;
6963 + abx80x: abx80x@69 {
6964 + compatible = "abracon,abx80x";
6966 + abracon,tc-diode = "standard";
6967 + abracon,tc-resistor = <0>;
6974 + target = <&i2c_gpio>;
6976 + #address-cells = <1>;
6977 + #size-cells = <0>;
6980 + ds1307: ds1307@68 {
6981 + compatible = "maxim,ds1307";
6989 + target = <&i2c_gpio>;
6991 + #address-cells = <1>;
6992 + #size-cells = <0>;
6995 + ds1339: ds1339@68 {
6996 + compatible = "dallas,ds1339";
6997 + trickle-resistor-ohms = <0>;
7005 + target = <&i2c_gpio>;
7007 + #address-cells = <1>;
7008 + #size-cells = <0>;
7011 + ds3231: ds3231@68 {
7012 + compatible = "maxim,ds3231";
7020 + target = <&i2c_gpio>;
7022 + #address-cells = <1>;
7023 + #size-cells = <0>;
7026 + mcp7940x: mcp7940x@6f {
7027 + compatible = "microchip,mcp7940x";
7035 + target = <&i2c_gpio>;
7037 + #address-cells = <1>;
7038 + #size-cells = <0>;
7041 + mcp7941x: mcp7941x@6f {
7042 + compatible = "microchip,mcp7941x";
7050 + target = <&i2c_gpio>;
7052 + #address-cells = <1>;
7053 + #size-cells = <0>;
7056 + pcf2127: pcf2127@51 {
7057 + compatible = "nxp,pcf2127";
7065 + target = <&i2c_gpio>;
7067 + #address-cells = <1>;
7068 + #size-cells = <0>;
7071 + pcf8523: pcf8523@68 {
7072 + compatible = "nxp,pcf8523";
7080 + target = <&i2c_gpio>;
7082 + #address-cells = <1>;
7083 + #size-cells = <0>;
7086 + pcf8563: pcf8563@51 {
7087 + compatible = "nxp,pcf8563";
7095 + abx80x = <0>,"+1";
7096 + ds1307 = <0>,"+2";
7097 + ds1339 = <0>,"+3";
7098 + ds3231 = <0>,"+4";
7099 + mcp7940x = <0>,"+5";
7100 + mcp7941x = <0>,"+6";
7101 + pcf2127 = <0>,"+7";
7102 + pcf8523 = <0>,"+8";
7103 + pcf8563 = <0>,"+9";
7104 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7105 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7106 + <&abx80x>,"abracon,tc-resistor";
7107 + wakeup-source = <&ds1339>,"wakeup-source?",
7108 + <&ds3231>,"wakeup-source?",
7109 + <&mcp7940x>,"wakeup-source?",
7110 + <&mcp7941x>,"wakeup-source?";
7111 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
7112 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
7113 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
7117 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
7119 +// Definitions for several I2C based Real Time Clocks
7124 + compatible = "brcm,bcm2708";
7127 + target = <&i2c_arm>;
7129 + #address-cells = <1>;
7130 + #size-cells = <0>;
7133 + abx80x: abx80x@69 {
7134 + compatible = "abracon,abx80x";
7136 + abracon,tc-diode = "standard";
7137 + abracon,tc-resistor = <0>;
7144 + target = <&i2c_arm>;
7146 + #address-cells = <1>;
7147 + #size-cells = <0>;
7150 + ds1307: ds1307@68 {
7151 + compatible = "maxim,ds1307";
7159 + target = <&i2c_arm>;
7161 + #address-cells = <1>;
7162 + #size-cells = <0>;
7165 + ds1339: ds1339@68 {
7166 + compatible = "dallas,ds1339";
7167 + trickle-resistor-ohms = <0>;
7175 + target = <&i2c_arm>;
7177 + #address-cells = <1>;
7178 + #size-cells = <0>;
7181 + ds3231: ds3231@68 {
7182 + compatible = "maxim,ds3231";
7190 + target = <&i2c_arm>;
7192 + #address-cells = <1>;
7193 + #size-cells = <0>;
7196 + mcp7940x: mcp7940x@6f {
7197 + compatible = "microchip,mcp7940x";
7205 + target = <&i2c_arm>;
7207 + #address-cells = <1>;
7208 + #size-cells = <0>;
7211 + mcp7941x: mcp7941x@6f {
7212 + compatible = "microchip,mcp7941x";
7220 + target = <&i2c_arm>;
7222 + #address-cells = <1>;
7223 + #size-cells = <0>;
7226 + pcf2127: pcf2127@51 {
7227 + compatible = "nxp,pcf2127";
7235 + target = <&i2c_arm>;
7237 + #address-cells = <1>;
7238 + #size-cells = <0>;
7241 + pcf8523: pcf8523@68 {
7242 + compatible = "nxp,pcf8523";
7250 + target = <&i2c_arm>;
7252 + #address-cells = <1>;
7253 + #size-cells = <0>;
7256 + pcf8563: pcf8563@51 {
7257 + compatible = "nxp,pcf8563";
7265 + target = <&i2c_arm>;
7267 + #address-cells = <1>;
7268 + #size-cells = <0>;
7271 + m41t62: m41t62@68 {
7272 + compatible = "st,m41t62";
7280 + abx80x = <0>,"+0";
7281 + ds1307 = <0>,"+1";
7282 + ds1339 = <0>,"+2";
7283 + ds3231 = <0>,"+3";
7284 + mcp7940x = <0>,"+4";
7285 + mcp7941x = <0>,"+5";
7286 + pcf2127 = <0>,"+6";
7287 + pcf8523 = <0>,"+7";
7288 + pcf8563 = <0>,"+8";
7289 + m41t62 = <0>,"+9";
7290 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7291 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7292 + <&abx80x>,"abracon,tc-resistor";
7293 + wakeup-source = <&ds1339>,"wakeup-source?",
7294 + <&ds3231>,"wakeup-source?",
7295 + <&mcp7940x>,"wakeup-source?",
7296 + <&mcp7941x>,"wakeup-source?",
7297 + <&m41t62>,"wakeup-source?";
7301 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
7303 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
7308 + compatible = "brcm,bcm2708";
7311 + target = <&i2c_arm>;
7313 + #address-cells = <1>;
7314 + #size-cells = <0>;
7317 + bme280: bme280@76 {
7318 + compatible = "bosch,bme280";
7326 + target = <&i2c_arm>;
7328 + #address-cells = <1>;
7329 + #size-cells = <0>;
7332 + bmp085: bmp085@77 {
7333 + compatible = "bosch,bmp085";
7335 + default-oversampling = <3>;
7342 + target = <&i2c_arm>;
7344 + #address-cells = <1>;
7345 + #size-cells = <0>;
7348 + bmp180: bmp180@77 {
7349 + compatible = "bosch,bmp180";
7357 + target = <&i2c_arm>;
7359 + #address-cells = <1>;
7360 + #size-cells = <0>;
7363 + bmp280: bmp280@76 {
7364 + compatible = "bosch,bmp280";
7372 + target = <&i2c_arm>;
7374 + #address-cells = <1>;
7375 + #size-cells = <0>;
7379 + compatible = "htu21";
7387 + target = <&i2c_arm>;
7389 + #address-cells = <1>;
7390 + #size-cells = <0>;
7394 + compatible = "lm75";
7402 + target = <&i2c_arm>;
7404 + #address-cells = <1>;
7405 + #size-cells = <0>;
7408 + si7020: si7020@40 {
7409 + compatible = "si7020";
7417 + target = <&i2c_arm>;
7419 + #address-cells = <1>;
7420 + #size-cells = <0>;
7423 + tmp102: tmp102@48 {
7424 + compatible = "ti,tmp102";
7432 + target = <&i2c_arm>;
7434 + #address-cells = <1>;
7435 + #size-cells = <0>;
7438 + hdc100x: hdc100x@40 {
7439 + compatible = "hdc100x";
7447 + target = <&i2c_arm>;
7449 + #address-cells = <1>;
7450 + #size-cells = <0>;
7453 + tsl4531: tsl4531@29 {
7454 + compatible = "tsl4531";
7462 + target = <&i2c_arm>;
7464 + #address-cells = <1>;
7465 + #size-cells = <0>;
7468 + veml6070: veml6070@38 {
7469 + compatible = "veml6070";
7477 + target = <&i2c_arm>;
7479 + #address-cells = <1>;
7480 + #size-cells = <0>;
7484 + compatible = "sht3x";
7492 + target = <&i2c_arm>;
7494 + #address-cells = <1>;
7495 + #size-cells = <0>;
7498 + ds1621: ds1621@48 {
7499 + compatible = "ds1621";
7507 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
7508 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
7509 + <&ds1621>,"reg:0";
7510 + bme280 = <0>,"+0";
7511 + bmp085 = <0>,"+1";
7512 + bmp180 = <0>,"+2";
7513 + bmp280 = <0>,"+3";
7516 + lm75addr = <&lm75>,"reg:0";
7517 + si7020 = <0>,"+6";
7518 + tmp102 = <0>,"+7";
7519 + hdc100x = <0>,"+8";
7520 + tsl4531 = <0>,"+9";
7521 + veml6070 = <0>,"+10";
7522 + sht3x = <0>,"+11";
7523 + ds1621 = <0>,"+12";
7527 +++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
7530 + * Device tree overlay for i2c_bcm2708, i2c0 bus
7533 + * dtc -@ -I dts -O dtb -o i2c0-bcm2708-overlay.dtb i2c0-bcm2708-overlay.dts
7540 + compatible = "brcm,bcm2708";
7550 + target = <&i2c0_pins>;
7551 + frag1: __overlay__ {
7552 + brcm,pins = <0 1>;
7553 + brcm,function = <4>; /* alt0 */
7558 + target = <&i2c0_pins>;
7560 + brcm,pins = <28 29>;
7561 + brcm,function = <4>; /* alt0 */
7566 + target = <&i2c0_pins>;
7568 + brcm,pins = <44 45>;
7569 + brcm,function = <5>; /* alt1 */
7574 + target = <&i2c0_pins>;
7576 + brcm,pins = <46 47>;
7577 + brcm,function = <4>; /* alt0 */
7584 + compatible = "brcm,bcm2708-i2c";
7589 + sda0_pin = <&frag1>,"brcm,pins:0";
7590 + scl0_pin = <&frag1>,"brcm,pins:4";
7591 + pins_0_1 = <0>,"+1-2-3-4";
7592 + pins_28_29 = <0>,"-1+2-3-4";
7593 + pins_44_45 = <0>,"-1-2+3-4";
7594 + pins_46_47 = <0>,"-1-2-3+4";
7595 + combine = <0>, "!5";
7599 +++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
7602 + * Device tree overlay for i2c_bcm2708, i2c1 bus
7605 + * dtc -@ -I dts -O dtb -o i2c1-bcm2708-overlay.dtb i2c1-bcm2708-overlay.dts
7612 + compatible = "brcm,bcm2708";
7617 + pinctrl-0 = <&i2c1_pins>;
7623 + target = <&i2c1_pins>;
7624 + pins: __overlay__ {
7625 + brcm,pins = <2 3>;
7626 + brcm,function = <4>; /* alt 0 */
7633 + compatible = "brcm,bcm2708-i2c";
7638 + sda1_pin = <&pins>,"brcm,pins:0";
7639 + scl1_pin = <&pins>,"brcm,pins:4";
7640 + pin_func = <&pins>,"brcm,function:0";
7641 + combine = <0>, "!2";
7645 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
7648 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
7655 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
7658 + target = <&i2s_pins>;
7660 + brcm,pins = <28 29 30 31>;
7661 + brcm,function = <6>; /* alt2 */
7666 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
7668 +// Definitions for IQaudIO DAC
7673 + compatible = "brcm,bcm2708";
7685 + #address-cells = <1>;
7686 + #size-cells = <0>;
7690 + #sound-dai-cells = <0>;
7691 + compatible = "ti,pcm5122";
7693 + AVDD-supply = <&vdd_3v3_reg>;
7694 + DVDD-supply = <&vdd_3v3_reg>;
7695 + CPVDD-supply = <&vdd_3v3_reg>;
7702 + target = <&sound>;
7703 + frag2: __overlay__ {
7704 + compatible = "iqaudio,iqaudio-dac";
7705 + i2s-controller = <&i2s>;
7711 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
7715 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
7717 +// Definitions for IQaudIO DAC+
7722 + compatible = "brcm,bcm2708";
7734 + #address-cells = <1>;
7735 + #size-cells = <0>;
7739 + #sound-dai-cells = <0>;
7740 + compatible = "ti,pcm5122";
7742 + AVDD-supply = <&vdd_3v3_reg>;
7743 + DVDD-supply = <&vdd_3v3_reg>;
7744 + CPVDD-supply = <&vdd_3v3_reg>;
7751 + target = <&sound>;
7752 + iqaudio_dac: __overlay__ {
7753 + compatible = "iqaudio,iqaudio-dac";
7754 + i2s-controller = <&i2s>;
7755 + mute-gpios = <&gpio 22 0>;
7761 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
7762 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
7763 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
7767 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
7769 +// Definitions for IQAudIO Digi WM8804 audio board
7774 + compatible = "brcm,bcm2708";
7786 + #address-cells = <1>;
7787 + #size-cells = <0>;
7791 + #sound-dai-cells = <0>;
7792 + compatible = "wlf,wm8804";
7795 + DVDD-supply = <&vdd_3v3_reg>;
7796 + PVDD-supply = <&vdd_3v3_reg>;
7802 + target = <&sound>;
7803 + wm8804_digi: __overlay__ {
7804 + compatible = "iqaudio,wm8804-digi";
7805 + i2s-controller = <&i2s>;
7811 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
7812 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
7813 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
7817 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
7819 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
7822 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
7823 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
7825 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7827 +// Example: A single flash device with fast read capability on SPI0, CS#0:
7828 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
7834 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
7836 + // disable spi-dev on spi0.0
7838 + target = <&spidev0>;
7840 + status = "disabled";
7844 + // disable spi-dev on spi0.1
7846 + target = <&spidev1>;
7848 + status = "disabled";
7852 + // disable spi-dev on spi1.0
7854 + target-path = "spi1/spidev@0";
7856 + status = "disabled";
7860 + // disable spi-dev on spi1.1
7862 + target-path = "spi1/spidev@1";
7864 + status = "disabled";
7868 + // disable spi-dev on spi1.2
7870 + target-path = "spi1/spidev@2";
7872 + status = "disabled";
7876 + // disable spi-dev on spi2.0
7878 + target-path = "spi2/spidev@0";
7880 + status = "disabled";
7884 + // disable spi-dev on spi2.1
7886 + target-path = "spi2/spidev@1";
7888 + status = "disabled";
7892 + // disable spi-dev on spi2.2
7894 + target-path = "spi2/spidev@2";
7896 + status = "disabled";
7900 + // enable flash on spi0.0
7905 + #address-cells = <1>;
7906 + #size-cells = <0>;
7907 + spi_nor_00: spi_nor@0 {
7908 + #address-cells = <1>;
7909 + #size-cells = <1>;
7910 + compatible = "jedec,spi-nor";
7912 + spi-max-frequency = <500000>;
7917 + // enable flash on spi0.1
7922 + #address-cells = <1>;
7923 + #size-cells = <0>;
7924 + spi_nor_01: spi_nor@1 {
7925 + #address-cells = <1>;
7926 + #size-cells = <1>;
7927 + compatible = "jedec,spi-nor";
7929 + spi-max-frequency = <500000>;
7934 + // enable flash on spi1.0
7939 + #address-cells = <1>;
7940 + #size-cells = <0>;
7941 + spi_nor_10: spi_nor@0 {
7942 + #address-cells = <1>;
7943 + #size-cells = <1>;
7944 + compatible = "jedec,spi-nor";
7946 + spi-max-frequency = <500000>;
7951 + // enable flash on spi1.1
7956 + #address-cells = <1>;
7957 + #size-cells = <0>;
7958 + spi_nor_11: spi_nor@1 {
7959 + #address-cells = <1>;
7960 + #size-cells = <1>;
7961 + compatible = "jedec,spi-nor";
7963 + spi-max-frequency = <500000>;
7968 + // enable flash on spi1.2
7973 + #address-cells = <1>;
7974 + #size-cells = <0>;
7975 + spi_nor_12: spi_nor@2 {
7976 + #address-cells = <1>;
7977 + #size-cells = <1>;
7978 + compatible = "jedec,spi-nor";
7980 + spi-max-frequency = <500000>;
7985 + // enable flash on spi2.0
7990 + #address-cells = <1>;
7991 + #size-cells = <0>;
7992 + spi_nor_20: spi_nor@0 {
7993 + #address-cells = <1>;
7994 + #size-cells = <1>;
7995 + compatible = "jedec,spi-nor";
7997 + spi-max-frequency = <500000>;
8002 + // enable flash on spi2.1
8007 + #address-cells = <1>;
8008 + #size-cells = <0>;
8009 + spi_nor_21: spi_nor@1 {
8010 + #address-cells = <1>;
8011 + #size-cells = <1>;
8012 + compatible = "jedec,spi-nor";
8014 + spi-max-frequency = <500000>;
8019 + // enable flash on spi2.2
8024 + #address-cells = <1>;
8025 + #size-cells = <0>;
8026 + spi_nor_22: spi_nor@2 {
8027 + #address-cells = <1>;
8028 + #size-cells = <1>;
8029 + compatible = "jedec,spi-nor";
8031 + spi-max-frequency = <500000>;
8036 + // Enable fast read for device on spi0.0.
8037 + // Use default active low interrupt signalling.
8039 + target = <&spi_nor_00>;
8045 + // Enable fast read for device on spi0.1.
8046 + // Use default active low interrupt signalling.
8048 + target = <&spi_nor_01>;
8054 + // Enable fast read for device on spi1.0.
8055 + // Use default active low interrupt signalling.
8057 + target = <&spi_nor_10>;
8063 + // Enable fast read for device on spi1.1.
8064 + // Use default active low interrupt signalling.
8066 + target = <&spi_nor_11>;
8072 + // Enable fast read for device on spi1.2.
8073 + // Use default active low interrupt signalling.
8075 + target = <&spi_nor_12>;
8081 + // Enable fast read for device on spi2.0.
8082 + // Use default active low interrupt signalling.
8084 + target = <&spi_nor_20>;
8090 + // Enable fast read for device on spi2.1.
8091 + // Use default active low interrupt signalling.
8093 + target = <&spi_nor_21>;
8099 + // Enable fast read for device on spi2.2.
8100 + // Use default active low interrupt signalling.
8102 + target = <&spi_nor_22>;
8109 + flash-spi0-0 = <0>,"+0+8";
8110 + flash-spi0-1 = <0>,"+1+9";
8111 + flash-spi1-0 = <0>,"+2+10";
8112 + flash-spi1-1 = <0>,"+3+11";
8113 + flash-spi1-2 = <0>,"+4+12";
8114 + flash-spi2-0 = <0>,"+5+13";
8115 + flash-spi2-1 = <0>,"+6+14";
8116 + flash-spi2-2 = <0>,"+7+15";
8117 + flash-fastr-spi0-0 = <0>,"+0+8+16";
8118 + flash-fastr-spi0-1 = <0>,"+1+9+17";
8119 + flash-fastr-spi1-0 = <0>,"+2+10+18";
8120 + flash-fastr-spi1-1 = <0>,"+3+11+19";
8121 + flash-fastr-spi1-2 = <0>,"+4+12+20";
8122 + flash-fastr-spi2-0 = <0>,"+5+13+21";
8123 + flash-fastr-spi2-1 = <0>,"+6+14+22";
8124 + flash-fastr-spi2-2 = <0>,"+7+15+23";
8129 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
8131 +// Definitions for JustBoom DAC
8136 + compatible = "brcm,bcm2708";
8148 + #address-cells = <1>;
8149 + #size-cells = <0>;
8153 + #sound-dai-cells = <0>;
8154 + compatible = "ti,pcm5122";
8156 + AVDD-supply = <&vdd_3v3_reg>;
8157 + DVDD-supply = <&vdd_3v3_reg>;
8158 + CPVDD-supply = <&vdd_3v3_reg>;
8165 + target = <&sound>;
8166 + frag2: __overlay__ {
8167 + compatible = "justboom,justboom-dac";
8168 + i2s-controller = <&i2s>;
8174 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
8178 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
8180 +// Definitions for JustBoom Digi
8185 + compatible = "brcm,bcm2708";
8197 + #address-cells = <1>;
8198 + #size-cells = <0>;
8202 + #sound-dai-cells = <0>;
8203 + compatible = "wlf,wm8804";
8205 + PVDD-supply = <&vdd_3v3_reg>;
8206 + DVDD-supply = <&vdd_3v3_reg>;
8213 + target = <&sound>;
8215 + compatible = "justboom,justboom-digi";
8216 + i2s-controller = <&i2s>;
8222 +++ b/arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
8224 +// Definitions for lirc-rpi module
8229 + compatible = "brcm,bcm2708";
8232 + target-path = "/";
8234 + lirc_rpi: lirc_rpi {
8235 + compatible = "rpi,lirc-rpi";
8236 + pinctrl-names = "default";
8237 + pinctrl-0 = <&lirc_pins>;
8240 + // Override autodetection of IR receiver circuit
8241 + // (0 = active high, 1 = active low, -1 = no override )
8242 + rpi,sense = <0xffffffff>;
8244 + // Software carrier
8245 + // (0 = off, 1 = on)
8246 + rpi,softcarrier = <1>;
8249 + // (0 = off, 1 = on)
8252 + // Enable debugging messages
8253 + // (0 = off, 1 = on)
8262 + lirc_pins: lirc_pins {
8263 + brcm,pins = <17 18>;
8264 + brcm,function = <1 0>; // out in
8265 + brcm,pull = <0 1>; // off down
8271 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
8272 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
8273 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
8275 + sense = <&lirc_rpi>,"rpi,sense:0";
8276 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
8277 + invert = <&lirc_rpi>,"rpi,invert:0";
8278 + debug = <&lirc_rpi>,"rpi,debug:0";
8282 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
8289 + compatible = "brcm,bcm2835";
8292 + target = <&i2c_arm>;
8294 + #address-cells = <1>;
8295 + #size-cells = <0>;
8298 + ltc2941: ltc2941@64 {
8299 + compatible = "lltc,ltc2941";
8301 + lltc,resistor-sense = <50>;
8302 + lltc,prescaler-exponent = <7>;
8308 + target = <&i2c_arm>;
8310 + #address-cells = <1>;
8311 + #size-cells = <0>;
8314 + ltc2942: ltc2942@64 {
8315 + compatible = "lltc,ltc2942";
8317 + lltc,resistor-sense = <50>;
8318 + lltc,prescaler-exponent = <7>;
8324 + target = <&i2c_arm>;
8326 + #address-cells = <1>;
8327 + #size-cells = <0>;
8330 + ltc2943: ltc2943@64 {
8331 + compatible = "lltc,ltc2943";
8333 + lltc,resistor-sense = <50>;
8334 + lltc,prescaler-exponent = <7>;
8340 + target = <&i2c_arm>;
8342 + #address-cells = <1>;
8343 + #size-cells = <0>;
8346 + ltc2944: ltc2944@64 {
8347 + compatible = "lltc,ltc2944";
8349 + lltc,resistor-sense = <50>;
8350 + lltc,prescaler-exponent = <7>;
8356 + ltc2941 = <0>,"+0";
8357 + ltc2942 = <0>,"+1";
8358 + ltc2943 = <0>,"+2";
8359 + ltc2944 = <0>,"+3";
8360 + resistor-sense = <<c2941>, "lltc,resistor-sense:0",
8361 + <<c2942>, "lltc,resistor-sense:0",
8362 + <<c2943>, "lltc,resistor-sense:0",
8363 + <<c2944>, "lltc,resistor-sense:0";
8364 + prescaler-exponent = <<c2941>, "lltc,prescaler-exponent:0",
8365 + <<c2942>, "lltc,prescaler-exponent:0",
8366 + <<c2943>, "lltc,prescaler-exponent:0",
8367 + <<c2944>, "lltc,prescaler-exponent:0";
8371 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
8373 +// Definitions for mbed DAC
8378 + compatible = "brcm,bcm2708";
8390 + #address-cells = <1>;
8391 + #size-cells = <0>;
8394 + tlv320aic23: codec@1a {
8395 + #sound-dai-cells = <0>;
8397 + compatible = "ti,tlv320aic23";
8404 + target = <&sound>;
8406 + compatible = "simple-audio-card";
8407 + i2s-controller = <&i2s>;
8410 + simple-audio-card,name = "mbed-DAC";
8412 + simple-audio-card,widgets =
8413 + "Microphone", "Mic Jack",
8414 + "Line", "Line In",
8415 + "Headphone", "Headphone Jack";
8417 + simple-audio-card,routing =
8418 + "Headphone Jack", "LHPOUT",
8419 + "Headphone Jack", "RHPOUT",
8420 + "LLINEIN", "Line In",
8421 + "RLINEIN", "Line In",
8422 + "MICIN", "Mic Jack";
8424 + simple-audio-card,format = "i2s";
8426 + simple-audio-card,cpu {
8427 + sound-dai = <&i2s>;
8430 + sound_master: simple-audio-card,codec {
8431 + sound-dai = <&tlv320aic23>;
8432 + system-clock-frequency = <12288000>;
8438 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
8440 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
8446 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8458 + mcp23017_pins: mcp23017_pins {
8460 + brcm,function = <0>;
8468 + #address-cells = <1>;
8469 + #size-cells = <0>;
8471 + mcp23017: mcp@20 {
8472 + compatible = "microchip,mcp23017";
8475 + #gpio-cells = <2>;
8476 + #interrupt-cells=<2>;
8477 + interrupt-parent = <&gpio>;
8478 + interrupts = <4 2>;
8479 + interrupt-controller;
8480 + microchip,irq-mirror;
8488 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
8489 + <&mcp23017>,"interrupts:0";
8490 + addr = <&mcp23017>,"reg:0";
8495 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
8497 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
8500 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
8501 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
8502 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
8503 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
8505 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
8506 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
8508 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
8509 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
8511 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
8512 +// dtoverlay=spi1-2cs
8513 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
8519 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8521 + // disable spi-dev on spi0.0
8523 + target = <&spidev0>;
8525 + status = "disabled";
8529 + // disable spi-dev on spi0.1
8531 + target = <&spidev1>;
8533 + status = "disabled";
8537 + // disable spi-dev on spi1.0
8539 + target-path = "spi1/spidev@0";
8541 + status = "disabled";
8545 + // disable spi-dev on spi1.1
8547 + target-path = "spi1/spidev@1";
8549 + status = "disabled";
8553 + // disable spi-dev on spi1.2
8555 + target-path = "spi1/spidev@2";
8557 + status = "disabled";
8561 + // disable spi-dev on spi2.0
8563 + target-path = "spi2/spidev@0";
8565 + status = "disabled";
8569 + // disable spi-dev on spi2.1
8571 + target-path = "spi2/spidev@1";
8573 + status = "disabled";
8577 + // disable spi-dev on spi2.2
8579 + target-path = "spi2/spidev@2";
8581 + status = "disabled";
8585 + // enable one or more mcp23s08s on spi0.0
8590 + #address-cells = <1>;
8591 + #size-cells = <0>;
8592 + mcp23s08_00: mcp23s08@0 {
8593 + compatible = "microchip,mcp23s08";
8595 + #gpio-cells = <2>;
8596 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
8598 + spi-max-frequency = <500000>;
8600 + #interrupt-cells=<2>;
8601 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
8606 + // enable one or more mcp23s08s on spi0.1
8611 + #address-cells = <1>;
8612 + #size-cells = <0>;
8613 + mcp23s08_01: mcp23s08@1 {
8614 + compatible = "microchip,mcp23s08";
8616 + #gpio-cells = <2>;
8617 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
8619 + spi-max-frequency = <500000>;
8621 + #interrupt-cells=<2>;
8622 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
8627 + // enable one or more mcp23s08s on spi1.0
8632 + #address-cells = <1>;
8633 + #size-cells = <0>;
8634 + mcp23s08_10: mcp23s08@0 {
8635 + compatible = "microchip,mcp23s08";
8637 + #gpio-cells = <2>;
8638 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
8640 + spi-max-frequency = <500000>;
8642 + #interrupt-cells=<2>;
8643 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
8648 + // enable one or more mcp23s08s on spi1.1
8653 + #address-cells = <1>;
8654 + #size-cells = <0>;
8655 + mcp23s08_11: mcp23s08@1 {
8656 + compatible = "microchip,mcp23s08";
8658 + #gpio-cells = <2>;
8659 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
8661 + spi-max-frequency = <500000>;
8663 + #interrupt-cells=<2>;
8664 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
8669 + // enable one or more mcp23s08s on spi1.2
8674 + #address-cells = <1>;
8675 + #size-cells = <0>;
8676 + mcp23s08_12: mcp23s08@2 {
8677 + compatible = "microchip,mcp23s08";
8679 + #gpio-cells = <2>;
8680 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
8682 + spi-max-frequency = <500000>;
8684 + #interrupt-cells=<2>;
8685 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
8690 + // enable one or more mcp23s08s on spi2.0
8695 + #address-cells = <1>;
8696 + #size-cells = <0>;
8697 + mcp23s08_20: mcp23s08@0 {
8698 + compatible = "microchip,mcp23s08";
8700 + #gpio-cells = <2>;
8701 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
8703 + spi-max-frequency = <500000>;
8705 + #interrupt-cells=<2>;
8706 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
8711 + // enable one or more mcp23s08s on spi2.1
8716 + #address-cells = <1>;
8717 + #size-cells = <0>;
8718 + mcp23s08_21: mcp23s08@1 {
8719 + compatible = "microchip,mcp23s08";
8721 + #gpio-cells = <2>;
8722 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
8724 + spi-max-frequency = <500000>;
8726 + #interrupt-cells=<2>;
8727 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
8732 + // enable one or more mcp23s08s on spi2.2
8737 + #address-cells = <1>;
8738 + #size-cells = <0>;
8739 + mcp23s08_22: mcp23s08@2 {
8740 + compatible = "microchip,mcp23s08";
8742 + #gpio-cells = <2>;
8743 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
8745 + spi-max-frequency = <500000>;
8747 + #interrupt-cells=<2>;
8748 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
8753 + // enable one or more mcp23s17s on spi0.0
8758 + #address-cells = <1>;
8759 + #size-cells = <0>;
8760 + mcp23s17_00: mcp23s17@0 {
8761 + compatible = "microchip,mcp23s17";
8763 + #gpio-cells = <2>;
8764 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
8766 + spi-max-frequency = <500000>;
8768 + #interrupt-cells=<2>;
8769 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
8774 + // enable one or more mcp23s17s on spi0.1
8779 + #address-cells = <1>;
8780 + #size-cells = <0>;
8781 + mcp23s17_01: mcp23s17@1 {
8782 + compatible = "microchip,mcp23s17";
8784 + #gpio-cells = <2>;
8785 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
8787 + spi-max-frequency = <500000>;
8789 + #interrupt-cells=<2>;
8790 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
8795 + // enable one or more mcp23s17s on spi1.0
8800 + #address-cells = <1>;
8801 + #size-cells = <0>;
8802 + mcp23s17_10: mcp23s17@0 {
8803 + compatible = "microchip,mcp23s17";
8805 + #gpio-cells = <2>;
8806 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
8808 + spi-max-frequency = <500000>;
8810 + #interrupt-cells=<2>;
8811 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
8816 + // enable one or more mcp23s17s on spi1.1
8821 + #address-cells = <1>;
8822 + #size-cells = <0>;
8823 + mcp23s17_11: mcp23s17@1 {
8824 + compatible = "microchip,mcp23s17";
8826 + #gpio-cells = <2>;
8827 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
8829 + spi-max-frequency = <500000>;
8831 + #interrupt-cells=<2>;
8832 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
8837 + // enable one or more mcp23s17s on spi1.2
8842 + #address-cells = <1>;
8843 + #size-cells = <0>;
8844 + mcp23s17_12: mcp23s17@2 {
8845 + compatible = "microchip,mcp23s17";
8847 + #gpio-cells = <2>;
8848 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
8850 + spi-max-frequency = <500000>;
8852 + #interrupt-cells=<2>;
8853 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
8858 + // enable one or more mcp23s17s on spi2.0
8863 + #address-cells = <1>;
8864 + #size-cells = <0>;
8865 + mcp23s17_20: mcp23s17@0 {
8866 + compatible = "microchip,mcp23s17";
8868 + #gpio-cells = <2>;
8869 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
8871 + spi-max-frequency = <500000>;
8873 + #interrupt-cells=<2>;
8874 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
8879 + // enable one or more mcp23s17s on spi2.1
8884 + #address-cells = <1>;
8885 + #size-cells = <0>;
8886 + mcp23s17_21: mcp23s17@1 {
8887 + compatible = "microchip,mcp23s17";
8889 + #gpio-cells = <2>;
8890 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
8892 + spi-max-frequency = <500000>;
8894 + #interrupt-cells=<2>;
8895 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
8900 + // enable one or more mcp23s17s on spi2.2
8905 + #address-cells = <1>;
8906 + #size-cells = <0>;
8907 + mcp23s17_22: mcp23s17@2 {
8908 + compatible = "microchip,mcp23s17";
8910 + #gpio-cells = <2>;
8911 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
8913 + spi-max-frequency = <500000>;
8915 + #interrupt-cells=<2>;
8916 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
8921 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
8925 + spi0_0_int_pins: spi0_0_int_pins {
8926 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
8927 + brcm,function = <0>;
8933 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
8937 + spi0_1_int_pins: spi0_1_int_pins {
8938 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
8939 + brcm,function = <0>;
8945 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
8949 + spi1_0_int_pins: spi1_0_int_pins {
8950 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
8951 + brcm,function = <0>;
8957 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
8961 + spi1_1_int_pins: spi1_1_int_pins {
8962 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
8963 + brcm,function = <0>;
8969 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
8973 + spi1_2_int_pins: spi1_2_int_pins {
8974 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
8975 + brcm,function = <0>;
8981 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
8985 + spi2_0_int_pins: spi2_0_int_pins {
8986 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
8987 + brcm,function = <0>;
8993 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
8997 + spi2_1_int_pins: spi2_1_int_pins {
8998 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
8999 + brcm,function = <0>;
9005 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
9009 + spi2_2_int_pins: spi2_2_int_pins {
9010 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
9011 + brcm,function = <0>;
9017 + // Enable interrupts for a mcp23s08 on spi0.0.
9018 + // Use default active low interrupt signalling.
9020 + target = <&mcp23s08_00>;
9022 + interrupt-parent = <&gpio>;
9023 + interrupt-controller;
9027 + // Enable interrupts for a mcp23s08 on spi0.1.
9028 + // Use default active low interrupt signalling.
9030 + target = <&mcp23s08_01>;
9032 + interrupt-parent = <&gpio>;
9033 + interrupt-controller;
9037 + // Enable interrupts for a mcp23s08 on spi1.0.
9038 + // Use default active low interrupt signalling.
9040 + target = <&mcp23s08_10>;
9042 + interrupt-parent = <&gpio>;
9043 + interrupt-controller;
9047 + // Enable interrupts for a mcp23s08 on spi1.1.
9048 + // Use default active low interrupt signalling.
9050 + target = <&mcp23s08_11>;
9052 + interrupt-parent = <&gpio>;
9053 + interrupt-controller;
9057 + // Enable interrupts for a mcp23s08 on spi1.2.
9058 + // Use default active low interrupt signalling.
9060 + target = <&mcp23s08_12>;
9062 + interrupt-parent = <&gpio>;
9063 + interrupt-controller;
9067 + // Enable interrupts for a mcp23s08 on spi2.0.
9068 + // Use default active low interrupt signalling.
9070 + target = <&mcp23s08_20>;
9072 + interrupt-parent = <&gpio>;
9073 + interrupt-controller;
9077 + // Enable interrupts for a mcp23s08 on spi2.1.
9078 + // Use default active low interrupt signalling.
9080 + target = <&mcp23s08_21>;
9082 + interrupt-parent = <&gpio>;
9083 + interrupt-controller;
9087 + // Enable interrupts for a mcp23s08 on spi2.2.
9088 + // Use default active low interrupt signalling.
9090 + target = <&mcp23s08_22>;
9092 + interrupt-parent = <&gpio>;
9093 + interrupt-controller;
9097 + // Enable interrupts for a mcp23s17 on spi0.0.
9098 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9099 + // Use default active low interrupt signalling.
9101 + target = <&mcp23s17_00>;
9103 + interrupt-parent = <&gpio>;
9104 + interrupt-controller;
9105 + microchip,irq-mirror;
9109 + // Enable interrupts for a mcp23s17 on spi0.1.
9110 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9111 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9113 + target = <&mcp23s17_01>;
9115 + interrupt-parent = <&gpio>;
9116 + interrupt-controller;
9117 + microchip,irq-mirror;
9121 + // Enable interrupts for a mcp23s17 on spi1.0.
9122 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9123 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9125 + target = <&mcp23s17_10>;
9127 + interrupt-parent = <&gpio>;
9128 + interrupt-controller;
9129 + microchip,irq-mirror;
9133 + // Enable interrupts for a mcp23s17 on spi1.1.
9134 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9135 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9137 + target = <&mcp23s17_11>;
9139 + interrupt-parent = <&gpio>;
9140 + interrupt-controller;
9141 + microchip,irq-mirror;
9145 + // Enable interrupts for a mcp23s17 on spi1.2.
9146 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9147 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9149 + target = <&mcp23s17_12>;
9151 + interrupt-parent = <&gpio>;
9152 + interrupt-controller;
9153 + microchip,irq-mirror;
9157 + // Enable interrupts for a mcp23s17 on spi2.0.
9158 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9159 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9161 + target = <&mcp23s17_20>;
9163 + interrupt-parent = <&gpio>;
9164 + interrupt-controller;
9165 + microchip,irq-mirror;
9169 + // Enable interrupts for a mcp23s17 on spi2.1.
9170 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9171 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9173 + target = <&mcp23s17_21>;
9175 + interrupt-parent = <&gpio>;
9176 + interrupt-controller;
9177 + microchip,irq-mirror;
9181 + // Enable interrupts for a mcp23s17 on spi2.2.
9182 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9183 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9185 + target = <&mcp23s17_22>;
9187 + interrupt-parent = <&gpio>;
9188 + interrupt-controller;
9189 + microchip,irq-mirror;
9194 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
9195 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
9196 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
9197 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
9198 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
9199 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
9200 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
9201 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
9202 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
9203 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
9204 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
9205 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
9206 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
9207 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
9208 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
9209 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
9210 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
9211 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
9212 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
9213 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
9214 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
9215 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
9216 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
9217 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
9218 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
9219 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
9220 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
9221 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
9222 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
9223 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
9224 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
9225 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
9230 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
9233 + * Device tree overlay for mcp251x/can0 on spi0.0
9240 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9241 + /* disable spi-dev for spi0.0 */
9250 + target = <&spidev0>;
9252 + status = "disabled";
9256 + /* the interrupt pin of the can-controller */
9260 + can0_pins: can0_pins {
9262 + brcm,function = <0>; /* input */
9267 + /* the clock/oscillator of the can-controller */
9269 + target-path = "/clocks";
9271 + /* external oscillator of mcp2515 on SPI0.0 */
9272 + can0_osc: can0_osc {
9273 + compatible = "fixed-clock";
9274 + #clock-cells = <0>;
9275 + clock-frequency = <16000000>;
9280 + /* the spi config of the can-controller itself binding everything together */
9284 + /* needed to avoid dtc warning */
9285 + #address-cells = <1>;
9286 + #size-cells = <0>;
9289 + compatible = "microchip,mcp2515";
9290 + pinctrl-names = "default";
9291 + pinctrl-0 = <&can0_pins>;
9292 + spi-max-frequency = <10000000>;
9293 + interrupt-parent = <&gpio>;
9294 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9295 + clocks = <&can0_osc>;
9300 + oscillator = <&can0_osc>,"clock-frequency:0";
9301 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
9302 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
9306 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
9309 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
9316 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9317 + /* disable spi-dev for spi0.1 */
9326 + target = <&spidev1>;
9328 + status = "disabled";
9332 + /* the interrupt pin of the can-controller */
9336 + can1_pins: can1_pins {
9338 + brcm,function = <0>; /* input */
9343 + /* the clock/oscillator of the can-controller */
9345 + target-path = "/clocks";
9347 + /* external oscillator of mcp2515 on spi0.1 */
9348 + can1_osc: can1_osc {
9349 + compatible = "fixed-clock";
9350 + #clock-cells = <0>;
9351 + clock-frequency = <16000000>;
9356 + /* the spi config of the can-controller itself binding everything together */
9360 + /* needed to avoid dtc warning */
9361 + #address-cells = <1>;
9362 + #size-cells = <0>;
9365 + compatible = "microchip,mcp2515";
9366 + pinctrl-names = "default";
9367 + pinctrl-0 = <&can1_pins>;
9368 + spi-max-frequency = <10000000>;
9369 + interrupt-parent = <&gpio>;
9370 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9371 + clocks = <&can1_osc>;
9376 + oscillator = <&can1_osc>,"clock-frequency:0";
9377 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
9378 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
9382 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
9385 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
9392 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9395 + target = <&spidev0>;
9397 + status = "disabled";
9402 + target = <&spidev1>;
9404 + status = "disabled";
9409 + target-path = "spi1/spidev@0";
9411 + status = "disabled";
9416 + target-path = "spi1/spidev@1";
9418 + status = "disabled";
9423 + target-path = "spi1/spidev@2";
9425 + status = "disabled";
9430 + target-path = "spi2/spidev@0";
9432 + status = "disabled";
9437 + target-path = "spi2/spidev@1";
9439 + status = "disabled";
9444 + target-path = "spi2/spidev@2";
9446 + status = "disabled";
9454 + #address-cells = <1>;
9455 + #size-cells = <0>;
9457 + mcp3008_00: mcp3008@0 {
9458 + compatible = "mcp3008";
9460 + spi-max-frequency = <1600000>;
9469 + #address-cells = <1>;
9470 + #size-cells = <0>;
9472 + mcp3008_01: mcp3008@1 {
9473 + compatible = "mcp3008";
9475 + spi-max-frequency = <1600000>;
9484 + #address-cells = <1>;
9485 + #size-cells = <0>;
9487 + mcp3008_10: mcp3008@0 {
9488 + compatible = "mcp3008";
9490 + spi-max-frequency = <1600000>;
9499 + #address-cells = <1>;
9500 + #size-cells = <0>;
9502 + mcp3008_11: mcp3008@1 {
9503 + compatible = "mcp3008";
9505 + spi-max-frequency = <1600000>;
9514 + #address-cells = <1>;
9515 + #size-cells = <0>;
9517 + mcp3008_12: mcp3008@2 {
9518 + compatible = "mcp3008";
9520 + spi-max-frequency = <1600000>;
9529 + #address-cells = <1>;
9530 + #size-cells = <0>;
9532 + mcp3008_20: mcp3008@0 {
9533 + compatible = "mcp3008";
9535 + spi-max-frequency = <1600000>;
9544 + #address-cells = <1>;
9545 + #size-cells = <0>;
9547 + mcp3008_21: mcp3008@1 {
9548 + compatible = "mcp3008";
9550 + spi-max-frequency = <1600000>;
9559 + #address-cells = <1>;
9560 + #size-cells = <0>;
9562 + mcp3008_22: mcp3008@2 {
9563 + compatible = "mcp3008";
9565 + spi-max-frequency = <1600000>;
9571 + spi0-0-present = <0>, "+0+8";
9572 + spi0-1-present = <0>, "+1+9";
9573 + spi1-0-present = <0>, "+2+10";
9574 + spi1-1-present = <0>, "+3+11";
9575 + spi1-2-present = <0>, "+4+12";
9576 + spi2-0-present = <0>, "+5+13";
9577 + spi2-1-present = <0>, "+6+14";
9578 + spi2-2-present = <0>, "+7+15";
9579 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
9580 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
9581 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
9582 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
9583 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
9584 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
9585 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
9586 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
9590 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
9593 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
9600 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9603 + target = <&spidev0>;
9605 + status = "disabled";
9610 + target = <&spidev1>;
9612 + status = "disabled";
9617 + target-path = "spi1/spidev@0";
9619 + status = "disabled";
9624 + target-path = "spi1/spidev@1";
9626 + status = "disabled";
9631 + target-path = "spi1/spidev@2";
9633 + status = "disabled";
9638 + target-path = "spi2/spidev@0";
9640 + status = "disabled";
9645 + target-path = "spi2/spidev@1";
9647 + status = "disabled";
9652 + target-path = "spi2/spidev@2";
9654 + status = "disabled";
9662 + #address-cells = <1>;
9663 + #size-cells = <0>;
9665 + mcp3202_00: mcp3202@0 {
9666 + compatible = "mcp3202";
9668 + spi-max-frequency = <1600000>;
9677 + #address-cells = <1>;
9678 + #size-cells = <0>;
9680 + mcp3202_01: mcp3202@1 {
9681 + compatible = "mcp3202";
9683 + spi-max-frequency = <1600000>;
9692 + #address-cells = <1>;
9693 + #size-cells = <0>;
9695 + mcp3202_10: mcp3202@0 {
9696 + compatible = "mcp3202";
9698 + spi-max-frequency = <1600000>;
9707 + #address-cells = <1>;
9708 + #size-cells = <0>;
9710 + mcp3202_11: mcp3202@1 {
9711 + compatible = "mcp3202";
9713 + spi-max-frequency = <1600000>;
9722 + #address-cells = <1>;
9723 + #size-cells = <0>;
9725 + mcp3202_12: mcp3202@2 {
9726 + compatible = "mcp3202";
9728 + spi-max-frequency = <1600000>;
9737 + #address-cells = <1>;
9738 + #size-cells = <0>;
9740 + mcp3202_20: mcp3202@0 {
9741 + compatible = "mcp3202";
9743 + spi-max-frequency = <1600000>;
9752 + #address-cells = <1>;
9753 + #size-cells = <0>;
9755 + mcp3202_21: mcp3202@1 {
9756 + compatible = "mcp3202";
9758 + spi-max-frequency = <1600000>;
9767 + #address-cells = <1>;
9768 + #size-cells = <0>;
9770 + mcp3202_22: mcp3202@2 {
9771 + compatible = "mcp3202";
9773 + spi-max-frequency = <1600000>;
9779 + spi0-0-present = <0>, "+0+8";
9780 + spi0-1-present = <0>, "+1+9";
9781 + spi1-0-present = <0>, "+2+10";
9782 + spi1-1-present = <0>, "+3+11";
9783 + spi1-2-present = <0>, "+4+12";
9784 + spi2-0-present = <0>, "+5+13";
9785 + spi2-1-present = <0>, "+6+14";
9786 + spi2-2-present = <0>, "+7+15";
9787 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
9788 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
9789 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
9790 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
9791 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
9792 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
9793 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
9794 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
9798 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
9801 + * Device Tree overlay for Media Center HAT by Pi Supply
9809 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9817 + status = "disabled";
9821 + status = "disabled";
9829 + rpi_display_pins: rpi_display_pins {
9830 + brcm,pins = <12 23 24 25>;
9831 + brcm,function = <1 1 1 0>; /* out out out in */
9832 + brcm,pull = <0 0 0 2>; /* - - - up */
9840 + /* needed to avoid dtc warning */
9841 + #address-cells = <1>;
9842 + #size-cells = <0>;
9844 + rpidisplay: rpi-display@0{
9845 + compatible = "ilitek,ili9341";
9847 + pinctrl-names = "default";
9848 + pinctrl-0 = <&rpi_display_pins>;
9850 + spi-max-frequency = <32000000>;
9855 + reset-gpios = <&gpio 23 0>;
9856 + dc-gpios = <&gpio 24 0>;
9857 + led-gpios = <&gpio 12 1>;
9861 + rpidisplay_ts: rpi-display-ts@1 {
9862 + compatible = "ti,ads7846";
9865 + spi-max-frequency = <2000000>;
9866 + interrupts = <25 2>; /* high-to-low edge triggered */
9867 + interrupt-parent = <&gpio>;
9868 + pendown-gpio = <&gpio 25 0>;
9869 + ti,x-plate-ohms = /bits/ 16 <60>;
9870 + ti,pressure-max = /bits/ 16 <255>;
9876 + target-path = "/";
9878 + lirc_rpi: lirc_rpi {
9879 + compatible = "rpi,lirc-rpi";
9880 + pinctrl-names = "default";
9881 + pinctrl-0 = <&lirc_pins>;
9884 + // Override autodetection of IR receiver circuit
9885 + // (0 = active high, 1 = active low, -1 = no override )
9886 + rpi,sense = <0xffffffff>;
9888 + // Software carrier
9889 + // (0 = off, 1 = on)
9890 + rpi,softcarrier = <1>;
9893 + // (0 = off, 1 = on)
9896 + // Enable debugging messages
9897 + // (0 = off, 1 = on)
9906 + lirc_pins: lirc_pins {
9907 + brcm,pins = <6 5>;
9908 + brcm,function = <1 0>; // out in
9909 + brcm,pull = <0 1>; // off down
9915 + speed = <&rpidisplay>,"spi-max-frequency:0";
9916 + rotate = <&rpidisplay>,"rotate:0";
9917 + fps = <&rpidisplay>,"fps:0";
9918 + debug = <&rpidisplay>,"debug:0",
9919 + <&lirc_rpi>,"rpi,debug:0";
9920 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
9921 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
9922 + backlight = <&rpidisplay>,"led-gpios:4",
9923 + <&rpi_display_pins>,"brcm,pins:0";
9925 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
9926 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
9927 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
9929 + sense = <&lirc_rpi>,"rpi,sense:0";
9930 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
9931 + invert = <&lirc_rpi>,"rpi,invert:0";
9935 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
9940 +#include <dt-bindings/clock/bcm2835.h>
9943 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9944 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9945 + * 38.4kHz results in an actual 31.25kHz.
9947 + * 48000000*38400/31250 = 58982400
9951 + compatible = "brcm,bcm2835";
9954 + target-path = "/clocks";
9956 + midi_clk: midi_clk {
9957 + compatible = "fixed-clock";
9958 + #clock-cells = <0>;
9959 + clock-output-names = "uart0_pclk";
9960 + clock-frequency = <58982400>;
9966 + target = <&uart0>;
9968 + clocks = <&midi_clk>,
9969 + <&clocks BCM2835_CLOCK_VPU>;
9974 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
9979 +#include <dt-bindings/clock/bcm2835-aux.h>
9982 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9983 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9984 + * 38.4kHz results in an actual 31.25kHz.
9986 + * 48000000*38400/31250 = 58982400
9990 + compatible = "brcm,bcm2835";
9993 + target-path = "/clocks";
9995 + midi_clk: clock@5 {
9996 + compatible = "fixed-factor-clock";
9997 + #clock-cells = <0>;
9998 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
9999 + clock-mult = <38400>;
10000 + clock-div = <31250>;
10006 + target = <&uart1>;
10008 + clocks = <&midi_clk>;
10015 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
10020 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
10026 + compatible = "brcm,bcm2708";
10030 + frag0: __overlay__ {
10031 + pinctrl-names = "default";
10032 + pinctrl-0 = <&mmc_pins>;
10034 + brcm,overclock-50 = <0>;
10040 + target = <&gpio>;
10042 + mmc_pins: mmc_pins {
10043 + brcm,pins = <48 49 50 51 52 53>;
10044 + brcm,function = <7>; /* alt3 */
10045 + brcm,pull = <0 2 2 2 2 2>;
10051 + target = <&sdhost>;
10053 + status = "disabled";
10058 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
10062 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
10064 +// Definitions for MPU6050
10069 + compatible = "brcm,bcm2708";
10072 + target = <&i2c1>;
10074 + #address-cells = <1>;
10075 + #size-cells = <0>;
10077 + clock-frequency = <400000>;
10079 + mpu6050: mpu6050@68 {
10080 + compatible = "invensense,mpu6050";
10082 + interrupt-parent = <&gpio>;
10083 + interrupts = <4 1>;
10089 + interrupt = <&mpu6050>,"interrupts:0";
10093 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
10096 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
10104 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10107 + target = <&spi0>;
10114 + target = <&spidev0>;
10116 + status = "disabled";
10121 + target = <&spidev1>;
10123 + status = "disabled";
10128 + target = <&gpio>;
10130 + mz61581_pins: mz61581_pins {
10131 + brcm,pins = <4 15 18 25>;
10132 + brcm,function = <0 1 1 1>; /* in out out out */
10138 + target = <&spi0>;
10140 + /* needed to avoid dtc warning */
10141 + #address-cells = <1>;
10142 + #size-cells = <0>;
10144 + mz61581: mz61581@0{
10145 + compatible = "samsung,s6d02a1";
10147 + pinctrl-names = "default";
10148 + pinctrl-0 = <&mz61581_pins>;
10150 + spi-max-frequency = <128000000>;
10160 + txbuflen = <32768>;
10162 + reset-gpios = <&gpio 15 0>;
10163 + dc-gpios = <&gpio 25 0>;
10164 + led-gpios = <&gpio 18 0>;
10166 + init = <0x10000b0 00
10169 + 0x10000b3 0x02 0x00 0x00 0x00
10170 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
10171 + 0x10000c1 0x08 0x16 0x08 0x08
10172 + 0x10000c4 0x11 0x07 0x03 0x03
10174 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
10178 + 0x1000044 0x00 0x01
10179 + 0x10000d0 0x07 0x07 0x1d 0x03
10180 + 0x10000d1 0x03 0x30 0x10
10181 + 0x10000d2 0x03 0x14 0x04
10185 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
10189 + mz61581_ts: mz61581_ts@1 {
10190 + compatible = "ti,ads7846";
10193 + spi-max-frequency = <2000000>;
10194 + interrupts = <4 2>; /* high-to-low edge triggered */
10195 + interrupt-parent = <&gpio>;
10196 + pendown-gpio = <&gpio 4 0>;
10198 + ti,x-plate-ohms = /bits/ 16 <60>;
10199 + ti,pressure-max = /bits/ 16 <255>;
10204 + speed = <&mz61581>, "spi-max-frequency:0";
10205 + rotate = <&mz61581>, "rotate:0";
10206 + fps = <&mz61581>, "fps:0";
10207 + txbuflen = <&mz61581>, "txbuflen:0";
10208 + debug = <&mz61581>, "debug:0";
10209 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
10213 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
10215 +/* PaPiRus ePaper Screen by Pi Supply */
10221 + compatible = "brcm,bcm2708";
10224 + target = <&i2c_arm>;
10226 + #address-cells = <1>;
10227 + #size-cells = <0>;
10230 + display_temp: lm75@48 {
10231 + compatible = "lm75b";
10234 + #thermal-sensor-cells = <0>;
10240 + target-path = "/";
10244 + polling-delay-passive = <0>;
10245 + polling-delay = <0>;
10246 + thermal-sensors = <&display_temp>;
10253 + target = <&spi0>;
10258 + status = "disabled";
10264 + target = <&gpio>;
10266 + repaper_pins: repaper_pins {
10267 + brcm,pins = <14 15 23 24 25>;
10268 + brcm,function = <1 1 1 1 0>; /* out out out out in */
10274 + target = <&spi0>;
10276 + /* needed to avoid dtc warning */
10277 + #address-cells = <1>;
10278 + #size-cells = <0>;
10280 + repaper: repaper@0{
10281 + compatible = "not_set";
10283 + pinctrl-names = "default";
10284 + pinctrl-0 = <&repaper_pins>;
10286 + spi-max-frequency = <8000000>;
10288 + panel-on-gpios = <&gpio 23 0>;
10289 + border-gpios = <&gpio 14 0>;
10290 + discharge-gpios = <&gpio 15 0>;
10291 + reset-gpios = <&gpio 24 0>;
10292 + busy-gpios = <&gpio 25 0>;
10294 + repaper-thermal-zone = "display";
10300 + panel = <&repaper>, "compatible";
10301 + speed = <&repaper>, "spi-max-frequency:0";
10305 +++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
10310 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
10311 + from the VPU. There is a special driver for this with a separate DT node,
10312 + which has the unfortunate consequence of breaking the act_led_gpio and
10313 + act_led_activelow dtparams.
10315 + This overlay changes the GPIO controller back to the standard one and
10316 + restores the dtparams.
10320 + compatible = "brcm,bcm2708";
10323 + target = <&act_led>;
10324 + frag0: __overlay__ {
10325 + gpios = <&gpio 0 0>;
10330 + gpio = <&frag0>,"gpios:4";
10331 + activelow = <&frag0>,"gpios:8";
10335 +++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
10340 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
10341 + To disable the systemd service that initialises the modem so it doesn't use
10344 + sudo systemctl disable hciuart
10348 + compatible = "brcm,bcm2708";
10351 + target = <&uart1>;
10353 + status = "disabled";
10358 + target = <&uart0>;
10360 + pinctrl-names = "default";
10361 + pinctrl-0 = <&uart0_pins>;
10367 + target = <&uart0_pins>;
10376 + target-path = "/aliases";
10378 + serial0 = "/soc/serial@7e201000";
10379 + serial1 = "/soc/serial@7e215040";
10384 +++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
10390 + compatible = "brcm,bcm2708";
10395 + status = "disabled";
10400 +++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
10405 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
10406 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
10409 + It is also necessary to edit /lib/systemd/system/hciuart.service and
10410 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
10411 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
10412 + instead because it will always be correct.
10414 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
10415 + then the firmware will replace with the appropriate port whether or not
10416 + this overlay is used.
10420 + compatible = "brcm,bcm2708";
10423 + target = <&uart0>;
10425 + pinctrl-names = "default";
10426 + pinctrl-0 = <&uart0_pins>;
10432 + target = <&uart1>;
10434 + pinctrl-names = "default";
10435 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
10441 + target = <&uart0_pins>;
10450 + target = <&uart1_pins>;
10452 + brcm,pins = <32 33>;
10453 + brcm,function = <2>; /* alt5=UART1 */
10454 + brcm,pull = <0 2>;
10459 + target = <&gpio>;
10461 + fake_bt_cts: fake_bt_cts {
10462 + brcm,pins = <31>;
10463 + brcm,function = <1>; /* output */
10469 + target-path = "/aliases";
10471 + serial0 = "/soc/serial@7e201000";
10472 + serial1 = "/soc/serial@7e215040";
10477 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
10483 + compatible = "brcm,bcm2708";
10486 + target-path = "/";
10488 + codec_out: spdif-transmitter {
10489 + #address-cells = <0>;
10490 + #size-cells = <0>;
10491 + #sound-dai-cells = <0>;
10492 + compatible = "linux,spdif-dit";
10496 + codec_in: card-codec {
10497 + #sound-dai-cells = <0>;
10498 + compatible = "invensense,ics43432";
10507 + #sound-dai-cells = <0>;
10513 + target = <&sound>;
10514 + snd: __overlay__ {
10515 + compatible = "simple-audio-card";
10516 + simple-audio-card,name = "PiBell";
10520 + capture_link: simple-audio-card,dai-link@0 {
10524 + sound-dai = <&i2s>;
10526 +/* example TDM slot configuration
10527 + dai-tdm-slot-num = <2>;
10528 + dai-tdm-slot-width = <32>;
10532 + r_codec_dai: codec {
10533 + sound-dai = <&codec_in>;
10537 + playback_link: simple-audio-card,dai-link@1 {
10541 + sound-dai = <&i2s>;
10543 +/* example TDM slot configuration
10544 + dai-tdm-slot-num = <2>;
10545 + dai-tdm-slot-width = <32>;
10549 + p_codec_dai: codec {
10550 + sound-dai = <&codec_out>;
10557 + alsaname = <&snd>, "simple-audio-card,name";
10561 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
10564 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
10572 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10575 + target = <&spi0>;
10582 + target = <&spidev0>;
10584 + status = "disabled";
10589 + target = <&spidev1>;
10591 + status = "disabled";
10596 + target = <&gpio>;
10598 + piscreen_pins: piscreen_pins {
10599 + brcm,pins = <17 25 24 22>;
10600 + brcm,function = <0 1 1 1>; /* in out out out */
10606 + target = <&spi0>;
10608 + /* needed to avoid dtc warning */
10609 + #address-cells = <1>;
10610 + #size-cells = <0>;
10612 + piscreen: piscreen@0{
10613 + compatible = "ilitek,ili9486";
10615 + pinctrl-names = "default";
10616 + pinctrl-0 = <&piscreen_pins>;
10618 + spi-max-frequency = <24000000>;
10624 + reset-gpios = <&gpio 25 0>;
10625 + dc-gpios = <&gpio 24 0>;
10626 + led-gpios = <&gpio 22 1>;
10629 + init = <0x10000b0 0x00
10635 + 0x10000c5 0x00 0x00 0x00 0x00
10636 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
10637 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10638 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10643 + piscreen_ts: piscreen-ts@1 {
10644 + compatible = "ti,ads7846";
10647 + spi-max-frequency = <2000000>;
10648 + interrupts = <17 2>; /* high-to-low edge triggered */
10649 + interrupt-parent = <&gpio>;
10650 + pendown-gpio = <&gpio 17 0>;
10652 + ti,x-plate-ohms = /bits/ 16 <100>;
10653 + ti,pressure-max = /bits/ 16 <255>;
10658 + speed = <&piscreen>,"spi-max-frequency:0";
10659 + rotate = <&piscreen>,"rotate:0";
10660 + fps = <&piscreen>,"fps:0";
10661 + debug = <&piscreen>,"debug:0";
10662 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
10666 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
10669 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
10677 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10680 + target = <&spi0>;
10687 + target = <&spidev0>;
10689 + status = "disabled";
10694 + target = <&spidev1>;
10696 + status = "disabled";
10701 + target = <&gpio>;
10703 + piscreen2_pins: piscreen2_pins {
10704 + brcm,pins = <17 25 24 22>;
10705 + brcm,function = <0 1 1 1>; /* in out out out */
10711 + target = <&spi0>;
10713 + /* needed to avoid dtc warning */
10714 + #address-cells = <1>;
10715 + #size-cells = <0>;
10717 + piscreen2: piscreen2@0{
10718 + compatible = "ilitek,ili9486";
10720 + pinctrl-names = "default";
10721 + pinctrl-0 = <&piscreen2_pins>;
10723 + spi-max-frequency = <64000000>;
10728 + txbuflen = <32768>;
10729 + reset-gpios = <&gpio 25 0>;
10730 + dc-gpios = <&gpio 24 0>;
10731 + led-gpios = <&gpio 22 1>;
10734 + init = <0x10000b0 0x00
10739 + 0x10000c0 0x11 0x09
10741 + 0x10000c5 0x00 0x00 0x00 0x00
10742 + 0x10000b6 0x00 0x02
10743 + 0x10000f7 0xa9 0x51 0x2c 0x2
10744 + 0x10000be 0x00 0x04
10751 + piscreen2_ts: piscreen2-ts@1 {
10752 + compatible = "ti,ads7846";
10755 + spi-max-frequency = <2000000>;
10756 + interrupts = <17 2>; /* high-to-low edge triggered */
10757 + interrupt-parent = <&gpio>;
10758 + pendown-gpio = <&gpio 17 0>;
10760 + ti,x-plate-ohms = /bits/ 16 <100>;
10761 + ti,pressure-max = /bits/ 16 <255>;
10766 + speed = <&piscreen2>,"spi-max-frequency:0";
10767 + rotate = <&piscreen2>,"rotate:0";
10768 + fps = <&piscreen2>,"fps:0";
10769 + debug = <&piscreen2>,"debug:0";
10770 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
10775 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
10778 + * Pisound Linux kernel module.
10779 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
10781 + * This program is free software; you can redistribute it and/or
10782 + * modify it under the terms of the GNU General Public License
10783 + * as published by the Free Software Foundation; version 2 of the
10786 + * This program is distributed in the hope that it will be useful,
10787 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
10788 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10789 + * GNU General Public License for more details.
10791 + * You should have received a copy of the GNU General Public License
10792 + * along with this program; if not, write to the Free Software
10793 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
10799 +#include <dt-bindings/gpio/gpio.h>
10802 + compatible = "brcm,bcm2708";
10805 + target = <&spi0>;
10812 + target = <&spidev0>;
10814 + status = "disabled";
10819 + target = <&spidev1>;
10826 + target = <&spi0>;
10828 + #address-cells = <1>;
10829 + #size-cells = <0>;
10831 + pisound_spi: pisound_spi@0{
10832 + compatible = "blokaslabs,pisound-spi";
10834 + pinctrl-names = "default";
10835 + pinctrl-0 = <&spi0_pins>;
10836 + spi-max-frequency = <1000000>;
10842 + target-path = "/";
10845 + #sound-dai-cells = <0>;
10846 + compatible = "ti,pcm5102a";
10853 + target = <&sound>;
10855 + compatible = "blokaslabs,pisound";
10856 + i2s-controller = <&i2s>;
10859 + pinctrl-0 = <&pisound_button_pins>;
10862 + <&gpio 13 GPIO_ACTIVE_HIGH>,
10863 + <&gpio 26 GPIO_ACTIVE_HIGH>,
10864 + <&gpio 16 GPIO_ACTIVE_HIGH>;
10867 + <&gpio 12 GPIO_ACTIVE_HIGH>,
10868 + <&gpio 24 GPIO_ACTIVE_HIGH>;
10870 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
10872 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
10877 + target = <&gpio>;
10879 + pinctrl-names = "default";
10880 + pinctrl-0 = <&pisound_button_pins>;
10882 + pisound_button_pins: pisound_button_pins {
10883 + brcm,pins = <17>;
10884 + brcm,function = <0>; // Input
10885 + brcm,pull = <2>; // Pull-Up
10898 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
10901 + * Device Tree overlay for pitft by Adafruit
10909 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10912 + target = <&spi0>;
10917 + status = "disabled";
10921 + status = "disabled";
10927 + target = <&gpio>;
10929 + pitft_pins: pitft_pins {
10930 + brcm,pins = <25>;
10931 + brcm,function = <1>; /* out */
10932 + brcm,pull = <0>; /* none */
10938 + target = <&spi0>;
10940 + /* needed to avoid dtc warning */
10941 + #address-cells = <1>;
10942 + #size-cells = <0>;
10945 + compatible = "ilitek,ili9340";
10947 + pinctrl-names = "default";
10948 + pinctrl-0 = <&pitft_pins>;
10950 + spi-max-frequency = <32000000>;
10955 + dc-gpios = <&gpio 25 0>;
10963 + speed = <&pitft>,"spi-max-frequency:0";
10964 + rotate = <&pitft>,"rotate:0";
10965 + fps = <&pitft>,"fps:0";
10966 + debug = <&pitft>,"debug:0";
10970 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
10973 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
10981 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10984 + target = <&spi0>;
10991 + target = <&spidev0>;
10993 + status = "disabled";
10998 + target = <&gpio>;
11000 + pitft_pins: pitft_pins {
11001 + brcm,pins = <24 25>;
11002 + brcm,function = <0 1>; /* in out */
11003 + brcm,pull = <2 0>; /* pullup none */
11009 + target = <&spi0>;
11011 + /* needed to avoid dtc warning */
11012 + #address-cells = <1>;
11013 + #size-cells = <0>;
11016 + compatible = "ilitek,ili9340";
11018 + pinctrl-names = "default";
11019 + pinctrl-0 = <&pitft_pins>;
11021 + spi-max-frequency = <32000000>;
11026 + dc-gpios = <&gpio 25 0>;
11033 + target = <&i2c1>;
11035 + /* needed to avoid dtc warning */
11036 + #address-cells = <1>;
11037 + #size-cells = <0>;
11039 + ft6236: ft6236@38 {
11040 + compatible = "focaltech,ft6236";
11043 + interrupt-parent = <&gpio>;
11044 + interrupts = <24 2>;
11045 + touchscreen-size-x = <240>;
11046 + touchscreen-size-y = <320>;
11052 + speed = <&pitft>,"spi-max-frequency:0";
11053 + rotate = <&pitft>,"rotate:0";
11054 + fps = <&pitft>,"fps:0";
11055 + debug = <&pitft>,"debug:0";
11056 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
11057 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
11058 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
11059 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
11060 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
11064 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
11067 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
11075 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11078 + target = <&spi0>;
11085 + target = <&spidev0>;
11087 + status = "disabled";
11092 + target = <&spidev1>;
11094 + status = "disabled";
11099 + target = <&gpio>;
11101 + pitft_pins: pitft_pins {
11102 + brcm,pins = <24 25>;
11103 + brcm,function = <0 1>; /* in out */
11104 + brcm,pull = <2 0>; /* pullup none */
11110 + target = <&spi0>;
11112 + /* needed to avoid dtc warning */
11113 + #address-cells = <1>;
11114 + #size-cells = <0>;
11117 + compatible = "ilitek,ili9340";
11119 + pinctrl-names = "default";
11120 + pinctrl-0 = <&pitft_pins>;
11122 + spi-max-frequency = <32000000>;
11127 + dc-gpios = <&gpio 25 0>;
11132 + #address-cells = <1>;
11133 + #size-cells = <0>;
11134 + compatible = "st,stmpe610";
11137 + spi-max-frequency = <500000>;
11138 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11139 + interrupts = <24 2>; /* high-to-low edge triggered */
11140 + interrupt-parent = <&gpio>;
11141 + interrupt-controller;
11143 + stmpe_touchscreen {
11144 + compatible = "st,stmpe-ts";
11145 + st,sample-time = <4>;
11146 + st,mod-12b = <1>;
11147 + st,ref-sel = <0>;
11148 + st,adc-freq = <2>;
11149 + st,ave-ctrl = <3>;
11150 + st,touch-det-delay = <4>;
11151 + st,settling = <2>;
11152 + st,fraction-z = <7>;
11153 + st,i-drive = <0>;
11156 + stmpe_gpio: stmpe_gpio {
11157 + #gpio-cells = <2>;
11158 + compatible = "st,stmpe-gpio";
11160 + * only GPIO2 is wired/available
11161 + * and it is wired to the backlight
11163 + st,norequest-mask = <0x7b>;
11170 + target-path = "/soc";
11173 + compatible = "gpio-backlight";
11174 + gpios = <&stmpe_gpio 2 0>;
11181 + speed = <&pitft>,"spi-max-frequency:0";
11182 + rotate = <&pitft>,"rotate:0";
11183 + fps = <&pitft>,"fps:0";
11184 + debug = <&pitft>,"debug:0";
11188 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
11191 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
11199 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11202 + target = <&spi0>;
11209 + target = <&spidev0>;
11211 + status = "disabled";
11216 + target = <&spidev1>;
11218 + status = "disabled";
11223 + target = <&gpio>;
11225 + pitft_pins: pitft_pins {
11226 + brcm,pins = <24 25>;
11227 + brcm,function = <0 1>; /* in out */
11228 + brcm,pull = <2 0>; /* pullup none */
11234 + target = <&spi0>;
11236 + /* needed to avoid dtc warning */
11237 + #address-cells = <1>;
11238 + #size-cells = <0>;
11241 + compatible = "himax,hx8357d";
11243 + pinctrl-names = "default";
11244 + pinctrl-0 = <&pitft_pins>;
11246 + spi-max-frequency = <32000000>;
11251 + dc-gpios = <&gpio 25 0>;
11256 + #address-cells = <1>;
11257 + #size-cells = <0>;
11258 + compatible = "st,stmpe610";
11261 + spi-max-frequency = <500000>;
11262 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11263 + interrupts = <24 2>; /* high-to-low edge triggered */
11264 + interrupt-parent = <&gpio>;
11265 + interrupt-controller;
11267 + stmpe_touchscreen {
11268 + compatible = "st,stmpe-ts";
11269 + st,sample-time = <4>;
11270 + st,mod-12b = <1>;
11271 + st,ref-sel = <0>;
11272 + st,adc-freq = <2>;
11273 + st,ave-ctrl = <3>;
11274 + st,touch-det-delay = <4>;
11275 + st,settling = <2>;
11276 + st,fraction-z = <7>;
11277 + st,i-drive = <0>;
11280 + stmpe_gpio: stmpe_gpio {
11281 + #gpio-cells = <2>;
11282 + compatible = "st,stmpe-gpio";
11284 + * only GPIO2 is wired/available
11285 + * and it is wired to the backlight
11287 + st,norequest-mask = <0x7b>;
11294 + target-path = "/soc";
11297 + compatible = "gpio-backlight";
11298 + gpios = <&stmpe_gpio 2 0>;
11305 + speed = <&pitft>,"spi-max-frequency:0";
11306 + rotate = <&pitft>,"rotate:0";
11307 + fps = <&pitft>,"fps:0";
11308 + debug = <&pitft>,"debug:0";
11312 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
11318 + compatible = "brcm,bcm2708";
11320 + target-path = "/";
11323 + compatible = "pps-gpio";
11324 + pinctrl-names = "default";
11325 + pinctrl-0 = <&pps_pins>;
11326 + gpios = <&gpio 18 0>;
11333 + target = <&gpio>;
11335 + pps_pins: pps_pins@12 {
11336 + brcm,pins = <18>;
11337 + brcm,function = <0>; // in
11338 + brcm,pull = <0>; // off
11344 + gpiopin = <&pps>,"gpios:4",
11346 + <&pps_pins>,"brcm,pins:0",
11347 + <&pps_pins>,"reg:0";
11348 + assert_falling_edge = <&pps>,"assert-falling-edge?";
11349 + capture_clear = <&pps>,"capture-clear?";
11353 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
11359 +This is the 2-channel overlay - only use it if you need both channels.
11361 +Legal pin,function combinations for each channel:
11362 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11363 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11366 + 1) Pin 18 is the only one available on all platforms, and
11367 + it is the one used by the I2S audio interface.
11368 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11369 + 2) The onboard analogue audio output uses both PWM channels.
11370 + 3) So be careful mixing audio and PWM.
11375 + target = <&gpio>;
11377 + pwm_pins: pwm_pins {
11378 + brcm,pins = <18 19>;
11379 + brcm,function = <2 2>; /* Alt5 */
11386 + frag1: __overlay__ {
11387 + pinctrl-names = "default";
11388 + pinctrl-0 = <&pwm_pins>;
11389 + assigned-clock-rates = <100000000>;
11395 + pin = <&pwm_pins>,"brcm,pins:0";
11396 + pin2 = <&pwm_pins>,"brcm,pins:4";
11397 + func = <&pwm_pins>,"brcm,function:0";
11398 + func2 = <&pwm_pins>,"brcm,function:4";
11399 + clock = <&frag1>,"assigned-clock-rates:0";
11403 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
11409 + compatible = "brcm,bcm2708";
11412 + target = <&gpio>;
11414 + pwm0_pins: pwm0_pins {
11415 + brcm,pins = <18>;
11416 + brcm,function = <2>; /* Alt5 */
11424 + pinctrl-names = "default";
11425 + pinctrl-0 = <&pwm0_pins>;
11431 + target-path = "/";
11433 + pwm-ir-transmitter {
11434 + compatible = "pwm-ir-tx";
11435 + pwms = <&pwm 0 100>;
11441 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
11442 + func = <&pwm0_pins>,"brcm,function:0";
11446 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
11452 +Legal pin,function combinations for each channel:
11453 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11454 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11457 + 1) Pin 18 is the only one available on all platforms, and
11458 + it is the one used by the I2S audio interface.
11459 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11460 + 2) The onboard analogue audio output uses both PWM channels.
11461 + 3) So be careful mixing audio and PWM.
11466 + target = <&gpio>;
11468 + pwm_pins: pwm_pins {
11469 + brcm,pins = <18>;
11470 + brcm,function = <2>; /* Alt5 */
11477 + frag1: __overlay__ {
11478 + pinctrl-names = "default";
11479 + pinctrl-0 = <&pwm_pins>;
11480 + assigned-clock-rates = <100000000>;
11486 + pin = <&pwm_pins>,"brcm,pins:0";
11487 + func = <&pwm_pins>,"brcm,function:0";
11488 + clock = <&frag1>,"assigned-clock-rates:0";
11492 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
11494 +// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
11495 +// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
11501 + compatible = "brcm,bcm2708";
11504 + target = <&spi0>;
11506 + /* needed to avoid dtc warning */
11507 + #address-cells = <1>;
11508 + #size-cells = <0>;
11513 + status = "disabled";
11516 + eth1: qca7000@0 {
11517 + compatible = "qca,qca7000";
11518 + reg = <0>; /* CE0 */
11519 + pinctrl-names = "default";
11520 + pinctrl-0 = <ð1_pins>;
11521 + interrupt-parent = <&gpio>;
11522 + interrupts = <23 0x1>; /* rising edge */
11523 + spi-max-frequency = <12000000>;
11530 + target = <&gpio>;
11532 + eth1_pins: eth1_pins {
11533 + brcm,pins = <23>;
11534 + brcm,function = <0>; /* in */
11535 + brcm,pull = <0>; /* none */
11541 + int_pin = <ð1>, "interrupts:0",
11542 + <ð1_pins>, "brcm,pins:0";
11543 + speed = <ð1>, "spi-max-frequency:0";
11547 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
11549 +// Device tree overlay for GPIO connected rotary encoder.
11554 + compatible = "brcm,bcm2708";
11557 + target = <&gpio>;
11559 + rotary_pins: rotary_pins@4 {
11560 + brcm,pins = <4 17>; /* gpio 4 17 */
11561 + brcm,function = <0 0>; /* input */
11562 + brcm,pull = <2 2>; /* pull-up */
11569 + target-path = "/";
11571 + rotary: rotary@4 {
11572 + compatible = "rotary-encoder";
11574 + pinctrl-names = "default";
11575 + pinctrl-0 = <&rotary_pins>;
11576 + gpios = <&gpio 4 0>, <&gpio 17 0>;
11577 + linux,axis = <0>; /* REL_X */
11578 + rotary-encoder,encoding = "gray";
11579 + rotary-encoder,steps = <24>; /* 24 default */
11580 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
11587 + pin_a = <&rotary>,"gpios:4",
11588 + <&rotary_pins>,"brcm,pins:0",
11589 + /* modify reg values to allow multiple instantiation */
11590 + <&rotary>,"reg:0",
11591 + <&rotary_pins>,"reg:0";
11592 + pin_b = <&rotary>,"gpios:16",
11593 + <&rotary_pins>,"brcm,pins:4";
11594 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
11595 + linux_axis = <&rotary>,"linux,axis:0";
11596 + rollover = <&rotary>,"rotary-encoder,rollover?";
11597 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
11598 + steps = <&rotary>,"rotary-encoder,steps:0";
11599 + wakeup = <&rotary>,"wakeup-source?";
11600 + encoding = <&rotary>,"rotary-encoder,encoding";
11601 + /* legacy parameters*/
11602 + rotary0_pin_a = <&rotary>,"gpios:4",
11603 + <&rotary_pins>,"brcm,pins:0";
11604 + rotary0_pin_b = <&rotary>,"gpios:16",
11605 + <&rotary_pins>,"brcm,pins:4";
11609 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
11612 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
11613 + * backlight controller
11619 + compatible = "brcm,bcm2708";
11622 + target-path = "/";
11624 + rpi_backlight: rpi_backlight {
11625 + compatible = "raspberrypi,rpi-backlight";
11626 + firmware = <&firmware>;
11633 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
11635 +// Definitions for the Cirrus Logic Audio Card
11638 +#include <dt-bindings/pinctrl/bcm2835.h>
11639 +#include <dt-bindings/gpio/gpio.h>
11640 +#include <dt-bindings/mfd/arizona.h>
11643 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11653 + target = <&gpio>;
11655 + wlf_pins: wlf_pins {
11656 + brcm,pins = <17 22 27 8>;
11657 + brcm,function = <
11658 + BCM2835_FSEL_GPIO_OUT
11659 + BCM2835_FSEL_GPIO_OUT
11660 + BCM2835_FSEL_GPIO_IN
11661 + BCM2835_FSEL_GPIO_OUT
11668 + target-path = "/";
11670 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
11671 + compatible = "regulator-fixed";
11672 + regulator-name = "RPi-Cirrus 1v8";
11673 + regulator-min-microvolt = <1800000>;
11674 + regulator-max-microvolt = <1800000>;
11675 + regulator-always-on;
11681 + target = <&spi0>;
11683 + #address-cells = <1>;
11684 + #size-cells = <0>;
11688 + status = "disabled";
11692 + status = "disabled";
11696 + compatible = "wlf,wm5102";
11699 + spi-max-frequency = <500000>;
11701 + interrupt-parent = <&gpio>;
11702 + interrupts = <27 8>;
11703 + interrupt-controller;
11704 + #interrupt-cells = <2>;
11707 + #gpio-cells = <2>;
11709 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
11710 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
11711 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
11712 + DBVDD2-supply = <&vdd_3v3_reg>;
11713 + DBVDD3-supply = <&vdd_3v3_reg>;
11714 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
11715 + SPKVDDL-supply = <&vdd_5v0_reg>;
11716 + SPKVDDR-supply = <&vdd_5v0_reg>;
11717 + DCVDD-supply = <&arizona_ldo1>;
11719 + wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>;
11720 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
11721 + wlf,gpio-defaults = <
11722 + ARIZONA_GP_DEFAULT
11723 + ARIZONA_GP_DEFAULT
11724 + ARIZONA_GP_DEFAULT
11725 + ARIZONA_GP_DEFAULT
11726 + ARIZONA_GP_DEFAULT
11728 + wlf,micd-configs = <0 1 0>;
11730 + ARIZONA_DMIC_MICVDD
11731 + ARIZONA_DMIC_MICBIAS2
11732 + ARIZONA_DMIC_MICVDD
11733 + ARIZONA_DMIC_MICVDD
11736 + ARIZONA_INMODE_DIFF
11737 + ARIZONA_INMODE_DMIC
11738 + ARIZONA_INMODE_SE
11739 + ARIZONA_INMODE_DIFF
11743 + arizona_ldo1: ldo1 {
11744 + regulator-name = "LDO1";
11745 + // default constraints as in
11746 + // arizona-ldo1.c
11747 + regulator-min-microvolt = <1200000>;
11748 + regulator-max-microvolt = <1800000>;
11755 + target = <&i2c1>;
11758 + #address-cells = <1>;
11759 + #size-cells = <0>;
11762 + compatible = "wlf,wm8804";
11765 + PVDD-supply = <&vdd_3v3_reg>;
11766 + DVDD-supply = <&vdd_3v3_reg>;
11767 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
11773 + target = <&sound>;
11775 + compatible = "wlf,rpi-cirrus";
11776 + i2s-controller = <&i2s>;
11782 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
11784 +// Definitions for RPi DAC
11789 + compatible = "brcm,bcm2708";
11799 + target-path = "/";
11802 + #sound-dai-cells = <0>;
11803 + compatible = "ti,pcm1794a";
11810 + target = <&sound>;
11812 + compatible = "rpi,rpi-dac";
11813 + i2s-controller = <&i2s>;
11819 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
11822 + * Device Tree overlay for rpi-display by Watterott
11830 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11833 + target = <&spi0>;
11840 + target = <&spidev0>;
11842 + status = "disabled";
11847 + target = <&spidev1>;
11849 + status = "disabled";
11854 + target = <&gpio>;
11856 + rpi_display_pins: rpi_display_pins {
11857 + brcm,pins = <18 23 24 25>;
11858 + brcm,function = <1 1 1 0>; /* out out out in */
11859 + brcm,pull = <0 0 0 2>; /* - - - up */
11865 + target = <&spi0>;
11867 + /* needed to avoid dtc warning */
11868 + #address-cells = <1>;
11869 + #size-cells = <0>;
11871 + rpidisplay: rpi-display@0{
11872 + compatible = "ilitek,ili9341";
11874 + pinctrl-names = "default";
11875 + pinctrl-0 = <&rpi_display_pins>;
11877 + spi-max-frequency = <32000000>;
11882 + reset-gpios = <&gpio 23 0>;
11883 + dc-gpios = <&gpio 24 0>;
11884 + led-gpios = <&gpio 18 1>;
11888 + rpidisplay_ts: rpi-display-ts@1 {
11889 + compatible = "ti,ads7846";
11892 + spi-max-frequency = <2000000>;
11893 + interrupts = <25 2>; /* high-to-low edge triggered */
11894 + interrupt-parent = <&gpio>;
11895 + pendown-gpio = <&gpio 25 0>;
11896 + ti,x-plate-ohms = /bits/ 16 <60>;
11897 + ti,pressure-max = /bits/ 16 <255>;
11902 + speed = <&rpidisplay>,"spi-max-frequency:0";
11903 + rotate = <&rpidisplay>,"rotate:0";
11904 + fps = <&rpidisplay>,"fps:0";
11905 + debug = <&rpidisplay>,"debug:0";
11906 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
11907 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
11908 + backlight = <&rpidisplay>,"led-gpios:4",
11909 + <&rpi_display_pins>,"brcm,pins:0";
11913 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
11919 + compatible = "brcm,bcm2708";
11922 + target-path = "/";
11924 + rpi_ft5406: rpi_ft5406 {
11925 + compatible = "rpi,rpi-ft5406";
11926 + firmware = <&firmware>;
11928 + touchscreen-size-x = <800>;
11929 + touchscreen-size-y = <480>;
11930 + touchscreen-inverted-x = <0>;
11931 + touchscreen-inverted-y = <0>;
11932 + touchscreen-swapped-x-y = <0>;
11938 + touchscreen-size-x = <&rpi_ft5406>,"touchscreen-size-x:0";
11939 + touchscreen-size-y = <&rpi_ft5406>,"touchscreen-size-y:0";
11940 + touchscreen-inverted-x = <&rpi_ft5406>,"touchscreen-inverted-x:0";
11941 + touchscreen-inverted-y = <&rpi_ft5406>,"touchscreen-inverted-y:0";
11942 + touchscreen-swapped-x-y = <&rpi_ft5406>,"touchscreen-swapped-x-y:0";
11946 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
11948 +// Definitions for Rpi-Proto
11953 + compatible = "brcm,bcm2708";
11963 + target = <&i2c1>;
11965 + #address-cells = <1>;
11966 + #size-cells = <0>;
11970 + #sound-dai-cells = <0>;
11971 + compatible = "wlf,wm8731";
11979 + target = <&sound>;
11981 + compatible = "rpi,rpi-proto";
11982 + i2s-controller = <&i2s>;
11988 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
11995 + compatible = "brcm,bcm2708", "brcm,bcm2709";
11998 + target = <&i2c1>;
12000 + #address-cells = <1>;
12001 + #size-cells = <0>;
12005 + compatible = "rpi,rpi-sense";
12007 + keys-int-gpios = <&gpio 23 1>;
12011 + lsm9ds1-magn@1c {
12012 + compatible = "st,lsm9ds1-magn";
12017 + lsm9ds1-accel6a {
12018 + compatible = "st,lsm9ds1-accel";
12023 + lps25h-press@5c {
12024 + compatible = "st,lps25h-press";
12029 + hts221-humid@5f {
12030 + compatible = "st,hts221-humid";
12038 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
12046 + compatible = "brcm,bcm2708", "brcm,bcm2709";
12049 + target = <&spi0>;
12051 + /* needed to avoid dtc warning */
12052 + #address-cells = <1>;
12053 + #size-cells = <0>;
12058 + status = "disabled";
12062 + compatible = "sony,cxd2880";
12063 + reg = <0>; /* CE0 */
12064 + spi-max-frequency = <50000000>;
12072 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
12074 +// Definitions for RRA DigiDAC1 Audio card
12079 + compatible = "brcm,bcm2708";
12089 + target = <&i2c1>;
12091 + #address-cells = <1>;
12092 + #size-cells = <0>;
12096 + #sound-dai-cells = <0>;
12097 + compatible = "wlf,wm8804";
12100 + PVDD-supply = <&vdd_3v3_reg>;
12101 + DVDD-supply = <&vdd_3v3_reg>;
12104 + wm8742: wm8741@1a {
12105 + compatible = "wlf,wm8741";
12108 + AVDD-supply = <&vdd_5v0_reg>;
12109 + DVDD-supply = <&vdd_3v3_reg>;
12115 + target = <&sound>;
12117 + compatible = "rra,digidac1-soundcard";
12118 + i2s-controller = <&i2s>;
12124 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
12130 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12133 + target = <&i2c_arm>;
12135 + #address-cells = <1>;
12136 + #size-cells = <0>;
12139 + sc16is750: sc16is750@48 {
12140 + compatible = "nxp,sc16is750";
12141 + reg = <0x48>; /* address */
12142 + clocks = <&sc16is750_clk>;
12143 + interrupt-parent = <&gpio>;
12144 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12145 + #gpio-cells = <2>;
12147 + sc16is750_clk: sc16is750_clk {
12148 + compatible = "fixed-clock";
12149 + #clock-cells = <0>;
12150 + clock-frequency = <14745600>;
12158 + int_pin = <&sc16is750>,"interrupts:0";
12159 + addr = <&sc16is750>,"reg:0";
12164 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
12170 + compatible = "brcm,bcm2835";
12173 + target = <&i2c1>;
12175 + frag1: __overlay__ {
12176 + #address-cells = <1>;
12177 + #size-cells = <0>;
12180 + sc16is752: sc16is752@48 {
12181 + compatible = "nxp,sc16is752";
12182 + reg = <0x48>; // i2c address
12183 + clocks = <&sc16is752_clk>;
12184 + interrupt-parent = <&gpio>;
12185 + interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
12187 + #gpio-cells = <0>;
12188 + i2c-max-frequency = <400000>;
12191 + sc16is752_clk: sc16is752_clk {
12192 + compatible = "fixed-clock";
12193 + #clock-cells = <0>;
12194 + clock-frequency = <14745600>;
12201 + int_pin = <&sc16is752>,"interrupts:0";
12202 + addr = <&sc16is752>,"reg:0";
12203 + xtal = <&sc16is752>,"clock-frequency:0";
12207 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
12213 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12216 + target = <&gpio>;
12218 + spi1_pins: spi1_pins {
12219 + brcm,pins = <19 20 21>;
12220 + brcm,function = <3>; /* alt4 */
12223 + spi1_cs_pins: spi1_cs_pins {
12224 + brcm,pins = <18>;
12225 + brcm,function = <1>; /* output */
12231 + target = <&spi1>;
12232 + frag1: __overlay__ {
12233 + #address-cells = <1>;
12234 + #size-cells = <0>;
12235 + pinctrl-names = "default";
12236 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12237 + cs-gpios = <&gpio 18 1>;
12240 + sc16is752: sc16is752@0 {
12241 + compatible = "nxp,sc16is752";
12242 + reg = <0>; /* CE0 */
12243 + clocks = <&sc16is752_clk>;
12244 + interrupt-parent = <&gpio>;
12245 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12246 + #gpio-controller;
12247 + #gpio-cells = <2>;
12248 + spi-max-frequency = <4000000>;
12250 + sc16is752_clk: sc16is752_clk {
12251 + compatible = "fixed-clock";
12252 + #clock-cells = <0>;
12253 + clock-frequency = <14745600>;
12267 + int_pin = <&sc16is752>,"interrupts:0";
12271 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
12276 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12279 + compatible = "brcm,bcm2708";
12282 + target = <&sdhost>;
12283 + frag0: __overlay__ {
12284 + brcm,overclock-50 = <0>;
12285 + brcm,pio-limit = <1>;
12293 + status = "disabled";
12298 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12299 + force_pio = <&frag0>,"brcm,force-pio?";
12300 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12301 + debug = <&frag0>,"brcm,debug?";
12305 +++ b/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
12310 +/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */
12313 + compatible = "brcm,bcm2708";
12318 + status = "disabled";
12325 + #address-cells = <1>;
12326 + #size-cells = <1>;
12328 + sdio_1bit: sdio@7e300000 {
12329 + compatible = "brcm,bcm2835-mmc",
12330 + "brcm,bcm2835-sdhci";
12331 + reg = <0x7e300000 0x100>;
12332 + interrupts = <2 30>;
12333 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12334 + dmas = <&dma 11>;
12335 + dma-names = "rx-tx";
12336 + brcm,overclock-50 = <0>;
12338 + pinctrl-names = "default";
12339 + pinctrl-0 = <&sdio_1bit_pins>;
12347 + target = <&gpio>;
12349 + sdio_1bit_pins: sdio_1bit_pins {
12350 + brcm,pins = <22 23 24 25>;
12351 + brcm,function = <7>; /* ALT3 = SD1 */
12352 + brcm,pull = <0 2 2 2>;
12358 + target-path = "/aliases";
12360 + mmc1 = "/soc/sdio@7e300000";
12366 + poll_once = <&sdio_1bit>,"non-removable?";
12367 + sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0";
12371 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
12376 +/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */
12379 + compatible = "brcm,bcm2708";
12384 + status = "disabled";
12391 + #address-cells = <1>;
12392 + #size-cells = <1>;
12394 + sdio_ovl: sdio@7e300000 {
12395 + compatible = "brcm,bcm2835-mmc",
12396 + "brcm,bcm2835-sdhci";
12397 + reg = <0x7e300000 0x100>;
12398 + interrupts = <2 30>;
12399 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12400 + dmas = <&dma 11>;
12401 + dma-names = "rx-tx";
12402 + brcm,overclock-50 = <0>;
12404 + pinctrl-names = "default";
12405 + pinctrl-0 = <&sdio_ovl_pins>;
12413 + target = <&gpio>;
12415 + sdio_ovl_pins: sdio_ovl_pins {
12416 + brcm,pins = <22 23 24 25 26 27>;
12417 + brcm,function = <7>; /* ALT3 = SD1 */
12418 + brcm,pull = <0 2 2 2 2 2>;
12424 + target-path = "/aliases";
12426 + mmc1 = "/soc/sdio@7e300000";
12431 + poll_once = <&sdio_ovl>,"non-removable?";
12432 + bus_width = <&sdio_ovl>,"bus-width:0";
12433 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
12437 +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
12442 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12445 + compatible = "brcm,bcm2708";
12448 + target = <&sdhost>;
12449 + frag0: __overlay__ {
12450 + brcm,overclock-50 = <0>;
12451 + brcm,pio-limit = <1>;
12456 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12457 + force_pio = <&frag0>,"brcm,force-pio?";
12458 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12459 + debug = <&frag0>,"brcm,debug?";
12460 + enable = <&frag0>,"status";
12461 + poll_once = <&frag0>,"non-removable?";
12465 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
12467 +// Description: Overlay to enable character device interface for SMI.
12468 +// Author: Luke Wren <luke@raspberrypi.org>
12478 + compatible = "brcm,bcm2835-smi-dev";
12479 + smi_handle = <&smi>;
12486 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
12488 +// Description: Overlay to enable NAND flash through
12489 +// the secondary memory interface
12490 +// Author: Luke Wren
12496 + compatible = "brcm,bcm2708";
12501 + pinctrl-names = "default";
12502 + pinctrl-0 = <&smi_pins>;
12510 + #address-cells = <1>;
12511 + #size-cells = <1>;
12514 + compatible = "brcm,bcm2835-smi-nand";
12515 + smi_handle = <&smi>;
12516 + #address-cells = <1>;
12517 + #size-cells = <1>;
12521 + label = "stage2";
12523 + reg = <0 0x20000>;
12527 + label = "firmware";
12529 + reg = <0x20000 0x1000000>;
12534 + // 2G (will need to use 64 bit for >=4G)
12535 + reg = <0x1020000 0x80000000>;
12542 + target = <&gpio>;
12544 + smi_pins: smi_pins {
12545 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
12548 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
12550 + /* /CS, /WE and /OE are pulled high, as they are
12551 + generally active low signals */
12552 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
12558 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
12560 +// Description: Overlay to enable the secondary memory interface peripheral
12561 +// Author: Luke Wren
12567 + compatible = "brcm,bcm2708";
12572 + pinctrl-names = "default";
12573 + pinctrl-0 = <&smi_pins>;
12579 + target = <&gpio>;
12581 + smi_pins: smi_pins {
12582 + /* Don't configure the top two address bits, as
12583 + these are already used as ID_SD and ID_SC */
12584 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
12585 + 16 17 18 19 20 21 22 23 24 25>;
12587 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
12588 + 5 5 5 5 5 5 5 5 5>;
12589 + /* /CS, /WE and /OE are pulled high, as they are
12590 + generally active low signals */
12591 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
12598 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
12601 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
12608 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12611 + target = <&spi0>;
12613 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
12618 + target = <&spi0_cs_pins>;
12620 + brcm,pins = <36 35>;
12625 + target = <&spi0_pins>;
12627 + brcm,pins = <37 38 39>;
12632 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
12638 + compatible = "brcm,bcm2708";
12641 + target = <&spidev0>;
12643 + status = "disabled";
12648 + target = <&spi0>;
12650 + #address-cells = <1>;
12651 + #size-cells = <0>;
12655 + compatible = "nxp,rtc-pcf2123";
12656 + spi-max-frequency = <5000000>;
12657 + spi-cs-high = <1>;
12664 + pcf2123 = <0>, "=0=1";
12668 +++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
12675 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12678 + target = <&spi0_cs_pins>;
12679 + frag0: __overlay__ {
12680 + brcm,pins = <8 7>;
12685 + target = <&spi0>;
12686 + frag1: __overlay__ {
12687 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
12693 + cs0_pin = <&frag0>,"brcm,pins:0",
12694 + <&frag1>,"cs-gpios:4";
12695 + cs1_pin = <&frag0>,"brcm,pins:4",
12696 + <&frag1>,"cs-gpios:16";
12700 +++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
12703 + * Device tree overlay to re-enable hardware CS for SPI0
12710 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12713 + target = <&spi0>;
12715 + cs-gpios = <0>, <0>;
12721 + target = <&spi0_cs_pins>;
12723 + brcm,pins = <8 7>;
12724 + brcm,function = <4>; /* alt0 */
12729 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
12736 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12739 + target = <&gpio>;
12741 + spi1_pins: spi1_pins {
12742 + brcm,pins = <19 20 21>;
12743 + brcm,function = <3>; /* alt4 */
12746 + spi1_cs_pins: spi1_cs_pins {
12747 + brcm,pins = <18>;
12748 + brcm,function = <1>; /* output */
12754 + target = <&spi1>;
12755 + frag1: __overlay__ {
12756 + /* needed to avoid dtc warning */
12757 + #address-cells = <1>;
12758 + #size-cells = <0>;
12759 + pinctrl-names = "default";
12760 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12761 + cs-gpios = <&gpio 18 1>;
12764 + spidev1_0: spidev@0 {
12765 + compatible = "spidev";
12766 + reg = <0>; /* CE0 */
12767 + #address-cells = <1>;
12768 + #size-cells = <0>;
12769 + spi-max-frequency = <125000000>;
12783 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12784 + <&frag1>,"cs-gpios:4";
12785 + cs0_spidev = <&spidev1_0>,"status";
12789 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
12796 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12799 + target = <&gpio>;
12801 + spi1_pins: spi1_pins {
12802 + brcm,pins = <19 20 21>;
12803 + brcm,function = <3>; /* alt4 */
12806 + spi1_cs_pins: spi1_cs_pins {
12807 + brcm,pins = <18 17>;
12808 + brcm,function = <1>; /* output */
12814 + target = <&spi1>;
12815 + frag1: __overlay__ {
12816 + /* needed to avoid dtc warning */
12817 + #address-cells = <1>;
12818 + #size-cells = <0>;
12819 + pinctrl-names = "default";
12820 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12821 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
12824 + spidev1_0: spidev@0 {
12825 + compatible = "spidev";
12826 + reg = <0>; /* CE0 */
12827 + #address-cells = <1>;
12828 + #size-cells = <0>;
12829 + spi-max-frequency = <125000000>;
12833 + spidev1_1: spidev@1 {
12834 + compatible = "spidev";
12835 + reg = <1>; /* CE1 */
12836 + #address-cells = <1>;
12837 + #size-cells = <0>;
12838 + spi-max-frequency = <125000000>;
12852 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12853 + <&frag1>,"cs-gpios:4";
12854 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12855 + <&frag1>,"cs-gpios:16";
12856 + cs0_spidev = <&spidev1_0>,"status";
12857 + cs1_spidev = <&spidev1_1>,"status";
12861 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
12868 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12871 + target = <&gpio>;
12873 + spi1_pins: spi1_pins {
12874 + brcm,pins = <19 20 21>;
12875 + brcm,function = <3>; /* alt4 */
12878 + spi1_cs_pins: spi1_cs_pins {
12879 + brcm,pins = <18 17 16>;
12880 + brcm,function = <1>; /* output */
12886 + target = <&spi1>;
12887 + frag1: __overlay__ {
12888 + /* needed to avoid dtc warning */
12889 + #address-cells = <1>;
12890 + #size-cells = <0>;
12891 + pinctrl-names = "default";
12892 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12893 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
12896 + spidev1_0: spidev@0 {
12897 + compatible = "spidev";
12898 + reg = <0>; /* CE0 */
12899 + #address-cells = <1>;
12900 + #size-cells = <0>;
12901 + spi-max-frequency = <125000000>;
12905 + spidev1_1: spidev@1 {
12906 + compatible = "spidev";
12907 + reg = <1>; /* CE1 */
12908 + #address-cells = <1>;
12909 + #size-cells = <0>;
12910 + spi-max-frequency = <125000000>;
12914 + spidev1_2: spidev@2 {
12915 + compatible = "spidev";
12916 + reg = <2>; /* CE2 */
12917 + #address-cells = <1>;
12918 + #size-cells = <0>;
12919 + spi-max-frequency = <125000000>;
12933 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12934 + <&frag1>,"cs-gpios:4";
12935 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12936 + <&frag1>,"cs-gpios:16";
12937 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
12938 + <&frag1>,"cs-gpios:28";
12939 + cs0_spidev = <&spidev1_0>,"status";
12940 + cs1_spidev = <&spidev1_1>,"status";
12941 + cs2_spidev = <&spidev1_2>,"status";
12945 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
12952 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12955 + target = <&gpio>;
12957 + spi2_pins: spi2_pins {
12958 + brcm,pins = <40 41 42>;
12959 + brcm,function = <3>; /* alt4 */
12962 + spi2_cs_pins: spi2_cs_pins {
12963 + brcm,pins = <43>;
12964 + brcm,function = <1>; /* output */
12970 + target = <&spi2>;
12971 + frag1: __overlay__ {
12972 + /* needed to avoid dtc warning */
12973 + #address-cells = <1>;
12974 + #size-cells = <0>;
12975 + pinctrl-names = "default";
12976 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
12977 + cs-gpios = <&gpio 43 1>;
12980 + spidev2_0: spidev@0 {
12981 + compatible = "spidev";
12982 + reg = <0>; /* CE0 */
12983 + #address-cells = <1>;
12984 + #size-cells = <0>;
12985 + spi-max-frequency = <125000000>;
12999 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13000 + <&frag1>,"cs-gpios:4";
13001 + cs0_spidev = <&spidev2_0>,"status";
13005 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
13012 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13015 + target = <&gpio>;
13017 + spi2_pins: spi2_pins {
13018 + brcm,pins = <40 41 42>;
13019 + brcm,function = <3>; /* alt4 */
13022 + spi2_cs_pins: spi2_cs_pins {
13023 + brcm,pins = <43 44>;
13024 + brcm,function = <1>; /* output */
13030 + target = <&spi2>;
13031 + frag1: __overlay__ {
13032 + /* needed to avoid dtc warning */
13033 + #address-cells = <1>;
13034 + #size-cells = <0>;
13035 + pinctrl-names = "default";
13036 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13037 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
13040 + spidev2_0: spidev@0 {
13041 + compatible = "spidev";
13042 + reg = <0>; /* CE0 */
13043 + #address-cells = <1>;
13044 + #size-cells = <0>;
13045 + spi-max-frequency = <125000000>;
13049 + spidev2_1: spidev@1 {
13050 + compatible = "spidev";
13051 + reg = <1>; /* CE1 */
13052 + #address-cells = <1>;
13053 + #size-cells = <0>;
13054 + spi-max-frequency = <125000000>;
13068 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13069 + <&frag1>,"cs-gpios:4";
13070 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13071 + <&frag1>,"cs-gpios:16";
13072 + cs0_spidev = <&spidev2_0>,"status";
13073 + cs1_spidev = <&spidev2_1>,"status";
13077 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
13084 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13087 + target = <&gpio>;
13089 + spi2_pins: spi2_pins {
13090 + brcm,pins = <40 41 42>;
13091 + brcm,function = <3>; /* alt4 */
13094 + spi2_cs_pins: spi2_cs_pins {
13095 + brcm,pins = <43 44 45>;
13096 + brcm,function = <1>; /* output */
13102 + target = <&spi2>;
13103 + frag1: __overlay__ {
13104 + /* needed to avoid dtc warning */
13105 + #address-cells = <1>;
13106 + #size-cells = <0>;
13107 + pinctrl-names = "default";
13108 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13109 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
13112 + spidev2_0: spidev@0 {
13113 + compatible = "spidev";
13114 + reg = <0>; /* CE0 */
13115 + #address-cells = <1>;
13116 + #size-cells = <0>;
13117 + spi-max-frequency = <125000000>;
13121 + spidev2_1: spidev@1 {
13122 + compatible = "spidev";
13123 + reg = <1>; /* CE1 */
13124 + #address-cells = <1>;
13125 + #size-cells = <0>;
13126 + spi-max-frequency = <125000000>;
13130 + spidev2_2: spidev@2 {
13131 + compatible = "spidev";
13132 + reg = <2>; /* CE2 */
13133 + #address-cells = <1>;
13134 + #size-cells = <0>;
13135 + spi-max-frequency = <125000000>;
13149 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13150 + <&frag1>,"cs-gpios:4";
13151 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13152 + <&frag1>,"cs-gpios:16";
13153 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
13154 + <&frag1>,"cs-gpios:28";
13155 + cs0_spidev = <&spidev2_0>,"status";
13156 + cs1_spidev = <&spidev2_1>,"status";
13157 + cs2_spidev = <&spidev2_2>,"status";
13161 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
13163 +// Definitions for SuperAudioBoard
13168 + compatible = "brcm,bcm2708";
13171 + target = <&sound>;
13173 + compatible = "simple-audio-card";
13174 + i2s-controller = <&i2s>;
13177 + simple-audio-card,name = "SuperAudioBoard";
13179 + simple-audio-card,widgets =
13180 + "Line", "Line In",
13181 + "Line", "Line Out";
13183 + simple-audio-card,routing =
13184 + "Line Out","AOUTA+",
13185 + "Line Out","AOUTA-",
13186 + "Line Out","AOUTB+",
13187 + "Line Out","AOUTB-",
13188 + "AINA","Line In",
13189 + "AINB","Line In";
13191 + simple-audio-card,format = "i2s";
13193 + simple-audio-card,bitclock-master = <&sound_master>;
13194 + simple-audio-card,frame-master = <&sound_master>;
13196 + simple-audio-card,cpu {
13197 + sound-dai = <&i2s>;
13198 + dai-tdm-slot-num = <2>;
13199 + dai-tdm-slot-width = <32>;
13202 + sound_master: simple-audio-card,codec {
13203 + sound-dai = <&cs4271>;
13204 + system-clock-frequency = <24576000>;
13217 + target = <&i2c1>;
13219 + #address-cells = <1>;
13220 + #size-cells = <0>;
13223 + cs4271: cs4271@10 {
13224 + #sound-dai-cells = <0>;
13225 + compatible = "cirrus,cs4271";
13228 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
13233 + gpiopin = <&cs4271>,"reset-gpio:4";
13237 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
13239 +// Definitions for SX150x I2C GPIO Expanders from Semtech
13242 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
13243 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
13244 +// depend on the device variant.
13245 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
13246 +// For SX1503 and SX1506, <m> may be 20.
13247 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
13248 +// For SX1508, <m> may be 20, 21, 22 or 23.
13249 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
13250 +// specifies the GPIO pin to which NINT output of SX150X is connected.
13253 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
13254 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
13256 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
13257 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
13263 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13265 + // Enable I2C#0 interface
13267 + target = <&i2c0>;
13273 + // Enable I2C#1 interface
13275 + target = <&i2c1>;
13281 + // Enable a SX1501 on I2C#0 at slave addr 0x20
13283 + target = <&i2c0>;
13285 + #address-cells = <1>;
13286 + #size-cells = <0>;
13288 + sx1501_0_20: sx150x@20 {
13289 + compatible = "semtech,sx1501q";
13292 + #gpio-cells = <2>;
13293 + #interrupt-cells = <2>;
13294 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
13295 + 2nd word is 2 for falling-edge triggered */
13301 + // Enable a SX1501 on I2C#1 at slave addr 0x20
13303 + target = <&i2c1>;
13305 + #address-cells = <1>;
13306 + #size-cells = <0>;
13308 + sx1501_1_20: sx150x@20 {
13309 + compatible = "semtech,sx1501q";
13312 + #gpio-cells = <2>;
13313 + #interrupt-cells = <2>;
13314 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
13315 + 2nd word is 2 for falling-edge triggered */
13321 + // Enable a SX1501 on I2C#0 at slave addr 0x21
13323 + target = <&i2c0>;
13325 + #address-cells = <1>;
13326 + #size-cells = <0>;
13328 + sx1501_0_21: sx150x@21 {
13329 + compatible = "semtech,sx1501q";
13332 + #gpio-cells = <2>;
13333 + #interrupt-cells = <2>;
13334 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
13335 + 2nd word is 2 for falling-edge triggered */
13341 + // Enable a SX1501 on I2C#1 at slave addr 0x21
13343 + target = <&i2c1>;
13345 + #address-cells = <1>;
13346 + #size-cells = <0>;
13348 + sx1501_1_21: sx150x@21 {
13349 + compatible = "semtech,sx1501q";
13352 + #gpio-cells = <2>;
13353 + #interrupt-cells = <2>;
13354 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13355 + 2nd word is 2 for falling-edge triggered */
13361 + // Enable a SX1502 on I2C#0 at slave addr 0x20
13363 + target = <&i2c0>;
13365 + #address-cells = <1>;
13366 + #size-cells = <0>;
13368 + sx1502_0_20: sx150x@20 {
13369 + compatible = "semtech,sx1502q";
13372 + #gpio-cells = <2>;
13373 + #interrupt-cells = <2>;
13374 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
13375 + 2nd word is 2 for falling-edge triggered */
13381 + // Enable a SX1502 on I2C#1 at slave addr 0x20
13383 + target = <&i2c1>;
13385 + #address-cells = <1>;
13386 + #size-cells = <0>;
13388 + sx1502_1_20: sx150x@20 {
13389 + compatible = "semtech,sx1502q";
13392 + #gpio-cells = <2>;
13393 + #interrupt-cells = <2>;
13394 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
13395 + 2nd word is 2 for falling-edge triggered */
13401 + // Enable a SX1502 on I2C#0 at slave addr 0x21
13403 + target = <&i2c0>;
13405 + #address-cells = <1>;
13406 + #size-cells = <0>;
13408 + sx1502_0_21: sx150x@21 {
13409 + compatible = "semtech,sx1502q";
13412 + #gpio-cells = <2>;
13413 + #interrupt-cells = <2>;
13414 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
13415 + 2nd word is 2 for falling-edge triggered */
13421 + // Enable a SX1502 on I2C#1 at slave addr 0x21
13423 + target = <&i2c1>;
13425 + #address-cells = <1>;
13426 + #size-cells = <0>;
13428 + sx1502_1_21: sx150x@21 {
13429 + compatible = "semtech,sx1502q";
13432 + #gpio-cells = <2>;
13433 + #interrupt-cells = <2>;
13434 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13435 + 2nd word is 2 for falling-edge triggered */
13441 + // Enable a SX1503 on I2C#0 at slave addr 0x20
13443 + target = <&i2c0>;
13445 + #address-cells = <1>;
13446 + #size-cells = <0>;
13448 + sx1503_0_20: sx150x@20 {
13449 + compatible = "semtech,sx1503q";
13452 + #gpio-cells = <2>;
13453 + #interrupt-cells = <2>;
13454 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
13455 + 2nd word is 2 for falling-edge triggered */
13461 + // Enable a SX1503 on I2C#1 at slave addr 0x20
13463 + target = <&i2c1>;
13465 + #address-cells = <1>;
13466 + #size-cells = <0>;
13468 + sx1503_1_20: sx150x@20 {
13469 + compatible = "semtech,sx1503q";
13472 + #gpio-cells = <2>;
13473 + #interrupt-cells = <2>;
13474 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
13475 + 2nd word is 2 for falling-edge triggered */
13481 + // Enable a SX1504 on I2C#0 at slave addr 0x20
13483 + target = <&i2c0>;
13485 + #address-cells = <1>;
13486 + #size-cells = <0>;
13488 + sx1504_0_20: sx150x@20 {
13489 + compatible = "semtech,sx1504q";
13492 + #gpio-cells = <2>;
13493 + #interrupt-cells = <2>;
13494 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
13495 + 2nd word is 2 for falling-edge triggered */
13501 + // Enable a SX1504 on I2C#1 at slave addr 0x20
13503 + target = <&i2c1>;
13505 + #address-cells = <1>;
13506 + #size-cells = <0>;
13508 + sx1504_1_20: sx150x@20 {
13509 + compatible = "semtech,sx1504q";
13512 + #gpio-cells = <2>;
13513 + #interrupt-cells = <2>;
13514 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13515 + 2nd word is 2 for falling-edge triggered */
13521 + // Enable a SX1504 on I2C#0 at slave addr 0x21
13523 + target = <&i2c0>;
13525 + #address-cells = <1>;
13526 + #size-cells = <0>;
13528 + sx1504_0_21: sx150x@21 {
13529 + compatible = "semtech,sx1504q";
13532 + #gpio-cells = <2>;
13533 + #interrupt-cells = <2>;
13534 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
13535 + 2nd word is 2 for falling-edge triggered */
13541 + // Enable a SX1504 on I2C#1 at slave addr 0x21
13543 + target = <&i2c1>;
13545 + #address-cells = <1>;
13546 + #size-cells = <0>;
13548 + sx1504_1_21: sx150x@21 {
13549 + compatible = "semtech,sx1504q";
13552 + #gpio-cells = <2>;
13553 + #interrupt-cells = <2>;
13554 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13555 + 2nd word is 2 for falling-edge triggered */
13561 + // Enable a SX1505 on I2C#0 at slave addr 0x20
13563 + target = <&i2c0>;
13565 + #address-cells = <1>;
13566 + #size-cells = <0>;
13568 + sx1505_0_20: sx150x@20 {
13569 + compatible = "semtech,sx1505q";
13572 + #gpio-cells = <2>;
13573 + #interrupt-cells = <2>;
13574 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
13575 + 2nd word is 2 for falling-edge triggered */
13581 + // Enable a SX1505 on I2C#1 at slave addr 0x20
13583 + target = <&i2c1>;
13585 + #address-cells = <1>;
13586 + #size-cells = <0>;
13588 + sx1505_1_20: sx150x@20 {
13589 + compatible = "semtech,sx1505q";
13592 + #gpio-cells = <2>;
13593 + #interrupt-cells = <2>;
13594 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
13595 + 2nd word is 2 for falling-edge triggered */
13601 + // Enable a SX1505 on I2C#0 at slave addr 0x21
13603 + target = <&i2c0>;
13605 + #address-cells = <1>;
13606 + #size-cells = <0>;
13608 + sx1505_0_21: sx150x@21 {
13609 + compatible = "semtech,sx1505q";
13612 + #gpio-cells = <2>;
13613 + #interrupt-cells = <2>;
13614 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
13615 + 2nd word is 2 for falling-edge triggered */
13621 + // Enable a SX1505 on I2C#1 at slave addr 0x21
13623 + target = <&i2c1>;
13625 + #address-cells = <1>;
13626 + #size-cells = <0>;
13628 + sx1505_1_21: sx150x@21 {
13629 + compatible = "semtech,sx1505q";
13632 + #gpio-cells = <2>;
13633 + #interrupt-cells = <2>;
13634 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
13635 + 2nd word is 2 for falling-edge triggered */
13641 + // Enable a SX1506 on I2C#0 at slave addr 0x20
13643 + target = <&i2c0>;
13645 + #address-cells = <1>;
13646 + #size-cells = <0>;
13648 + sx1506_0_20: sx150x@20 {
13649 + compatible = "semtech,sx1506q";
13652 + #gpio-cells = <2>;
13653 + #interrupt-cells = <2>;
13654 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
13655 + 2nd word is 2 for falling-edge triggered */
13661 + // Enable a SX1506 on I2C#1 at slave addr 0x20
13663 + target = <&i2c1>;
13665 + #address-cells = <1>;
13666 + #size-cells = <0>;
13668 + sx1506_1_20: sx150x@20 {
13669 + compatible = "semtech,sx1506q";
13672 + #gpio-cells = <2>;
13673 + #interrupt-cells = <2>;
13674 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
13675 + 2nd word is 2 for falling-edge triggered */
13681 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
13683 + target = <&i2c0>;
13685 + #address-cells = <1>;
13686 + #size-cells = <0>;
13688 + sx1507_0_3E: sx150x@3E {
13689 + compatible = "semtech,sx1507q";
13692 + #gpio-cells = <2>;
13693 + #interrupt-cells = <2>;
13694 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
13695 + 2nd word is 2 for falling-edge triggered */
13701 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
13703 + target = <&i2c1>;
13705 + #address-cells = <1>;
13706 + #size-cells = <0>;
13708 + sx1507_1_3E: sx150x@3E {
13709 + compatible = "semtech,sx1507q";
13712 + #gpio-cells = <2>;
13713 + #interrupt-cells = <2>;
13714 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
13715 + 2nd word is 2 for falling-edge triggered */
13721 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
13723 + target = <&i2c0>;
13725 + #address-cells = <1>;
13726 + #size-cells = <0>;
13728 + sx1507_0_3F: sx150x@3F {
13729 + compatible = "semtech,sx1507q";
13732 + #gpio-cells = <2>;
13733 + #interrupt-cells = <2>;
13734 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
13735 + 2nd word is 2 for falling-edge triggered */
13741 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
13743 + target = <&i2c1>;
13745 + #address-cells = <1>;
13746 + #size-cells = <0>;
13748 + sx1507_1_3F: sx150x@3F {
13749 + compatible = "semtech,sx1507q";
13752 + #gpio-cells = <2>;
13753 + #interrupt-cells = <2>;
13754 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
13755 + 2nd word is 2 for falling-edge triggered */
13761 + // Enable a SX1507 on I2C#0 at slave addr 0x70
13763 + target = <&i2c0>;
13765 + #address-cells = <1>;
13766 + #size-cells = <0>;
13768 + sx1507_0_70: sx150x@70 {
13769 + compatible = "semtech,sx1507q";
13772 + #gpio-cells = <2>;
13773 + #interrupt-cells = <2>;
13774 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
13775 + 2nd word is 2 for falling-edge triggered */
13781 + // Enable a SX1507 on I2C#1 at slave addr 0x70
13783 + target = <&i2c1>;
13785 + #address-cells = <1>;
13786 + #size-cells = <0>;
13788 + sx1507_1_70: sx150x@70 {
13789 + compatible = "semtech,sx1507q";
13792 + #gpio-cells = <2>;
13793 + #interrupt-cells = <2>;
13794 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
13795 + 2nd word is 2 for falling-edge triggered */
13801 + // Enable a SX1507 on I2C#0 at slave addr 0x71
13803 + target = <&i2c0>;
13805 + #address-cells = <1>;
13806 + #size-cells = <0>;
13808 + sx1507_0_71: sx150x@71 {
13809 + compatible = "semtech,sx1507q";
13812 + #gpio-cells = <2>;
13813 + #interrupt-cells = <2>;
13814 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
13815 + 2nd word is 2 for falling-edge triggered */
13821 + // Enable a SX1507 on I2C#1 at slave addr 0x71
13823 + target = <&i2c1>;
13825 + #address-cells = <1>;
13826 + #size-cells = <0>;
13828 + sx1507_1_71: sx150x@71 {
13829 + compatible = "semtech,sx1507q";
13832 + #gpio-cells = <2>;
13833 + #interrupt-cells = <2>;
13834 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
13835 + 2nd word is 2 for falling-edge triggered */
13841 + // Enable a SX1508 on I2C#0 at slave addr 0x20
13843 + target = <&i2c0>;
13845 + #address-cells = <1>;
13846 + #size-cells = <0>;
13848 + sx1508_0_20: sx150x@20 {
13849 + compatible = "semtech,sx1508q";
13852 + #gpio-cells = <2>;
13853 + #interrupt-cells = <2>;
13854 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
13855 + 2nd word is 2 for falling-edge triggered */
13861 + // Enable a SX1508 on I2C#1 at slave addr 0x20
13863 + target = <&i2c1>;
13865 + #address-cells = <1>;
13866 + #size-cells = <0>;
13868 + sx1508_1_20: sx150x@20 {
13869 + compatible = "semtech,sx1508q";
13872 + #gpio-cells = <2>;
13873 + #interrupt-cells = <2>;
13874 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
13875 + 2nd word is 2 for falling-edge triggered */
13881 + // Enable a SX1508 on I2C#0 at slave addr 0x21
13883 + target = <&i2c0>;
13885 + #address-cells = <1>;
13886 + #size-cells = <0>;
13888 + sx1508_0_21: sx150x@21 {
13889 + compatible = "semtech,sx1508q";
13892 + #gpio-cells = <2>;
13893 + #interrupt-cells = <2>;
13894 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
13895 + 2nd word is 2 for falling-edge triggered */
13901 + // Enable a SX1508 on I2C#1 at slave addr 0x21
13903 + target = <&i2c1>;
13905 + #address-cells = <1>;
13906 + #size-cells = <0>;
13908 + sx1508_1_21: sx150x@21 {
13909 + compatible = "semtech,sx1508q";
13912 + #gpio-cells = <2>;
13913 + #interrupt-cells = <2>;
13914 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
13915 + 2nd word is 2 for falling-edge triggered */
13921 + // Enable a SX1508 on I2C#0 at slave addr 0x22
13923 + target = <&i2c0>;
13925 + #address-cells = <1>;
13926 + #size-cells = <0>;
13928 + sx1508_0_22: sx150x@22 {
13929 + compatible = "semtech,sx1508q";
13932 + #gpio-cells = <2>;
13933 + #interrupt-cells = <2>;
13934 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
13935 + 2nd word is 2 for falling-edge triggered */
13941 + // Enable a SX1508 on I2C#1 at slave addr 0x22
13943 + target = <&i2c1>;
13945 + #address-cells = <1>;
13946 + #size-cells = <0>;
13948 + sx1508_1_22: sx150x@22 {
13949 + compatible = "semtech,sx1508q";
13952 + #gpio-cells = <2>;
13953 + #interrupt-cells = <2>;
13954 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
13955 + 2nd word is 2 for falling-edge triggered */
13961 + // Enable a SX1508 on I2C#0 at slave addr 0x23
13963 + target = <&i2c0>;
13965 + #address-cells = <1>;
13966 + #size-cells = <0>;
13968 + sx1508_0_23: sx150x@23 {
13969 + compatible = "semtech,sx1508q";
13972 + #gpio-cells = <2>;
13973 + #interrupt-cells = <2>;
13974 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
13975 + 2nd word is 2 for falling-edge triggered */
13981 + // Enable a SX1508 on I2C#1 at slave addr 0x23
13983 + target = <&i2c1>;
13985 + #address-cells = <1>;
13986 + #size-cells = <0>;
13988 + sx1508_1_23: sx150x@23 {
13989 + compatible = "semtech,sx1508q";
13992 + #gpio-cells = <2>;
13993 + #interrupt-cells = <2>;
13994 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
13995 + 2nd word is 2 for falling-edge triggered */
14001 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
14003 + target = <&i2c0>;
14005 + #address-cells = <1>;
14006 + #size-cells = <0>;
14008 + sx1509_0_3E: sx150x@3E {
14009 + compatible = "semtech,sx1509q";
14012 + #gpio-cells = <2>;
14013 + #interrupt-cells = <2>;
14014 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
14015 + 2nd word is 2 for falling-edge triggered */
14021 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
14023 + target = <&i2c1>;
14025 + #address-cells = <1>;
14026 + #size-cells = <0>;
14028 + sx1509_1_3E: sx150x@3E {
14029 + compatible = "semtech,sx1509q";
14032 + #gpio-cells = <2>;
14033 + #interrupt-cells = <2>;
14034 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
14035 + 2nd word is 2 for falling-edge triggered */
14041 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
14043 + target = <&i2c0>;
14045 + #address-cells = <1>;
14046 + #size-cells = <0>;
14048 + sx1509_0_3F: sx150x@3F {
14049 + compatible = "semtech,sx1509q";
14052 + #gpio-cells = <2>;
14053 + #interrupt-cells = <2>;
14054 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
14055 + 2nd word is 2 for falling-edge triggered */
14061 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
14063 + target = <&i2c1>;
14065 + #address-cells = <1>;
14066 + #size-cells = <0>;
14068 + sx1509_1_3F: sx150x@3F {
14069 + compatible = "semtech,sx1509q";
14072 + #gpio-cells = <2>;
14073 + #interrupt-cells = <2>;
14074 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
14075 + 2nd word is 2 for falling-edge triggered */
14081 + // Enable a SX1509 on I2C#0 at slave addr 0x70
14083 + target = <&i2c0>;
14085 + #address-cells = <1>;
14086 + #size-cells = <0>;
14088 + sx1509_0_70: sx150x@70 {
14089 + compatible = "semtech,sx1509q";
14092 + #gpio-cells = <2>;
14093 + #interrupt-cells = <2>;
14094 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
14095 + 2nd word is 2 for falling-edge triggered */
14101 + // Enable a SX1509 on I2C#1 at slave addr 0x70
14103 + target = <&i2c1>;
14105 + #address-cells = <1>;
14106 + #size-cells = <0>;
14108 + sx1509_1_70: sx150x@70 {
14109 + compatible = "semtech,sx1509q";
14112 + #gpio-cells = <2>;
14113 + #interrupt-cells = <2>;
14114 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
14115 + 2nd word is 2 for falling-edge triggered */
14121 + // Enable a SX1509 on I2C#0 at slave addr 0x71
14123 + target = <&i2c0>;
14125 + #address-cells = <1>;
14126 + #size-cells = <0>;
14128 + sx1509_0_71: sx150x@71 {
14129 + compatible = "semtech,sx1509q";
14132 + #gpio-cells = <2>;
14133 + #interrupt-cells = <2>;
14134 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
14135 + 2nd word is 2 for falling-edge triggered */
14141 + // Enable a SX1509 on I2C#1 at slave addr 0x71
14143 + target = <&i2c1>;
14145 + #address-cells = <1>;
14146 + #size-cells = <0>;
14148 + sx1509_1_71: sx150x@71 {
14149 + compatible = "semtech,sx1509q";
14152 + #gpio-cells = <2>;
14153 + #interrupt-cells = <2>;
14154 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
14155 + 2nd word is 2 for falling-edge triggered */
14161 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
14163 + target = <&sx1501_0_20>;
14165 + interrupt-parent = <&gpio>;
14166 + interrupt-controller;
14167 + pinctrl-names = "default";
14168 + pinctrl-0 = <&sx150x_0_20_pins>;
14172 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
14174 + target = <&sx1501_1_20>;
14176 + interrupt-parent = <&gpio>;
14177 + interrupt-controller;
14178 + pinctrl-names = "default";
14179 + pinctrl-0 = <&sx150x_1_20_pins>;
14183 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
14185 + target = <&sx1501_0_21>;
14187 + interrupt-parent = <&gpio>;
14188 + interrupt-controller;
14189 + pinctrl-names = "default";
14190 + pinctrl-0 = <&sx150x_0_21_pins>;
14194 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
14196 + target = <&sx1501_1_21>;
14198 + interrupt-parent = <&gpio>;
14199 + interrupt-controller;
14200 + pinctrl-names = "default";
14201 + pinctrl-0 = <&sx150x_1_21_pins>;
14205 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
14207 + target = <&sx1502_0_20>;
14209 + interrupt-parent = <&gpio>;
14210 + interrupt-controller;
14211 + pinctrl-names = "default";
14212 + pinctrl-0 = <&sx150x_0_20_pins>;
14216 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
14218 + target = <&sx1502_1_20>;
14220 + interrupt-parent = <&gpio>;
14221 + interrupt-controller;
14222 + pinctrl-names = "default";
14223 + pinctrl-0 = <&sx150x_1_20_pins>;
14227 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
14229 + target = <&sx1502_0_21>;
14231 + interrupt-parent = <&gpio>;
14232 + interrupt-controller;
14233 + pinctrl-names = "default";
14234 + pinctrl-0 = <&sx150x_0_21_pins>;
14238 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
14240 + target = <&sx1502_1_21>;
14242 + interrupt-parent = <&gpio>;
14243 + interrupt-controller;
14244 + pinctrl-names = "default";
14245 + pinctrl-0 = <&sx150x_1_21_pins>;
14249 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
14251 + target = <&sx1503_0_20>;
14253 + interrupt-parent = <&gpio>;
14254 + interrupt-controller;
14255 + pinctrl-names = "default";
14256 + pinctrl-0 = <&sx150x_0_20_pins>;
14260 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
14262 + target = <&sx1503_1_20>;
14264 + interrupt-parent = <&gpio>;
14265 + interrupt-controller;
14266 + pinctrl-names = "default";
14267 + pinctrl-0 = <&sx150x_1_20_pins>;
14271 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
14273 + target = <&sx1504_0_20>;
14275 + interrupt-parent = <&gpio>;
14276 + interrupt-controller;
14277 + pinctrl-names = "default";
14278 + pinctrl-0 = <&sx150x_0_20_pins>;
14282 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
14284 + target = <&sx1504_1_20>;
14286 + interrupt-parent = <&gpio>;
14287 + interrupt-controller;
14288 + pinctrl-names = "default";
14289 + pinctrl-0 = <&sx150x_1_20_pins>;
14293 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
14295 + target = <&sx1504_0_21>;
14297 + interrupt-parent = <&gpio>;
14298 + interrupt-controller;
14299 + pinctrl-names = "default";
14300 + pinctrl-0 = <&sx150x_0_21_pins>;
14304 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
14306 + target = <&sx1504_1_21>;
14308 + interrupt-parent = <&gpio>;
14309 + interrupt-controller;
14310 + pinctrl-names = "default";
14311 + pinctrl-0 = <&sx150x_1_21_pins>;
14315 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
14317 + target = <&sx1505_0_20>;
14319 + interrupt-parent = <&gpio>;
14320 + interrupt-controller;
14321 + pinctrl-names = "default";
14322 + pinctrl-0 = <&sx150x_0_20_pins>;
14326 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
14328 + target = <&sx1505_1_20>;
14330 + interrupt-parent = <&gpio>;
14331 + interrupt-controller;
14332 + pinctrl-names = "default";
14333 + pinctrl-0 = <&sx150x_1_20_pins>;
14337 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
14339 + target = <&sx1505_0_21>;
14341 + interrupt-parent = <&gpio>;
14342 + interrupt-controller;
14343 + pinctrl-names = "default";
14344 + pinctrl-0 = <&sx150x_0_21_pins>;
14348 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
14350 + target = <&sx1505_1_21>;
14352 + interrupt-parent = <&gpio>;
14353 + interrupt-controller;
14354 + pinctrl-names = "default";
14355 + pinctrl-0 = <&sx150x_1_21_pins>;
14359 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
14361 + target = <&sx1506_0_20>;
14363 + interrupt-parent = <&gpio>;
14364 + interrupt-controller;
14365 + pinctrl-names = "default";
14366 + pinctrl-0 = <&sx150x_0_20_pins>;
14370 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
14372 + target = <&sx1506_1_20>;
14374 + interrupt-parent = <&gpio>;
14375 + interrupt-controller;
14376 + pinctrl-names = "default";
14377 + pinctrl-0 = <&sx150x_1_20_pins>;
14381 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
14383 + target = <&sx1507_0_3E>;
14385 + interrupt-parent = <&gpio>;
14386 + interrupt-controller;
14387 + pinctrl-names = "default";
14388 + pinctrl-0 = <&sx150x_0_3E_pins>;
14392 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
14394 + target = <&sx1507_1_3E>;
14396 + interrupt-parent = <&gpio>;
14397 + interrupt-controller;
14398 + pinctrl-names = "default";
14399 + pinctrl-0 = <&sx150x_1_3E_pins>;
14403 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
14405 + target = <&sx1507_0_3F>;
14407 + interrupt-parent = <&gpio>;
14408 + interrupt-controller;
14409 + pinctrl-names = "default";
14410 + pinctrl-0 = <&sx150x_0_3F_pins>;
14414 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
14416 + target = <&sx1507_1_3F>;
14418 + interrupt-parent = <&gpio>;
14419 + interrupt-controller;
14420 + pinctrl-names = "default";
14421 + pinctrl-0 = <&sx150x_1_3F_pins>;
14425 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
14427 + target = <&sx1507_0_70>;
14429 + interrupt-parent = <&gpio>;
14430 + interrupt-controller;
14431 + pinctrl-names = "default";
14432 + pinctrl-0 = <&sx150x_1_70_pins>;
14436 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
14438 + target = <&sx1507_1_70>;
14440 + interrupt-parent = <&gpio>;
14441 + interrupt-controller;
14442 + pinctrl-names = "default";
14443 + pinctrl-0 = <&sx150x_1_70_pins>;
14447 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
14449 + target = <&sx1507_0_71>;
14451 + interrupt-parent = <&gpio>;
14452 + interrupt-controller;
14453 + pinctrl-names = "default";
14454 + pinctrl-0 = <&sx150x_0_71_pins>;
14458 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
14460 + target = <&sx1507_1_71>;
14462 + interrupt-parent = <&gpio>;
14463 + interrupt-controller;
14464 + pinctrl-names = "default";
14465 + pinctrl-0 = <&sx150x_1_71_pins>;
14469 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
14471 + target = <&sx1508_0_20>;
14473 + interrupt-parent = <&gpio>;
14474 + interrupt-controller;
14475 + pinctrl-names = "default";
14476 + pinctrl-0 = <&sx150x_0_20_pins>;
14480 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
14482 + target = <&sx1508_1_20>;
14484 + interrupt-parent = <&gpio>;
14485 + interrupt-controller;
14486 + pinctrl-names = "default";
14487 + pinctrl-0 = <&sx150x_1_20_pins>;
14491 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
14493 + target = <&sx1508_0_21>;
14495 + interrupt-parent = <&gpio>;
14496 + interrupt-controller;
14497 + pinctrl-names = "default";
14498 + pinctrl-0 = <&sx150x_0_21_pins>;
14502 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
14504 + target = <&sx1508_1_21>;
14506 + interrupt-parent = <&gpio>;
14507 + interrupt-controller;
14508 + pinctrl-names = "default";
14509 + pinctrl-0 = <&sx150x_1_21_pins>;
14513 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
14515 + target = <&sx1508_0_22>;
14517 + interrupt-parent = <&gpio>;
14518 + interrupt-controller;
14519 + pinctrl-names = "default";
14520 + pinctrl-0 = <&sx150x_0_22_pins>;
14524 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
14526 + target = <&sx1508_1_22>;
14528 + interrupt-parent = <&gpio>;
14529 + interrupt-controller;
14530 + pinctrl-names = "default";
14531 + pinctrl-0 = <&sx150x_1_22_pins>;
14535 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
14537 + target = <&sx1508_0_23>;
14539 + interrupt-parent = <&gpio>;
14540 + interrupt-controller;
14541 + pinctrl-names = "default";
14542 + pinctrl-0 = <&sx150x_0_23_pins>;
14546 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
14548 + target = <&sx1508_1_23>;
14550 + interrupt-parent = <&gpio>;
14551 + interrupt-controller;
14552 + pinctrl-names = "default";
14553 + pinctrl-0 = <&sx150x_1_23_pins>;
14557 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
14559 + target = <&sx1509_0_3E>;
14561 + interrupt-parent = <&gpio>;
14562 + interrupt-controller;
14563 + pinctrl-names = "default";
14564 + pinctrl-0 = <&sx150x_0_3E_pins>;
14568 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
14570 + target = <&sx1509_1_3E>;
14572 + interrupt-parent = <&gpio>;
14573 + interrupt-controller;
14574 + pinctrl-names = "default";
14575 + pinctrl-0 = <&sx150x_1_3E_pins>;
14579 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
14581 + target = <&sx1509_0_3F>;
14583 + interrupt-parent = <&gpio>;
14584 + interrupt-controller;
14585 + pinctrl-names = "default";
14586 + pinctrl-0 = <&sx150x_0_3F_pins>;
14590 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
14592 + target = <&sx1509_1_3F>;
14594 + interrupt-parent = <&gpio>;
14595 + interrupt-controller;
14596 + pinctrl-names = "default";
14597 + pinctrl-0 = <&sx150x_1_3F_pins>;
14601 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
14603 + target = <&sx1509_0_70>;
14605 + interrupt-parent = <&gpio>;
14606 + interrupt-controller;
14607 + pinctrl-names = "default";
14608 + pinctrl-0 = <&sx150x_0_70_pins>;
14612 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
14614 + target = <&sx1509_1_70>;
14616 + interrupt-parent = <&gpio>;
14617 + interrupt-controller;
14618 + pinctrl-names = "default";
14619 + pinctrl-0 = <&sx150x_1_70_pins>;
14623 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
14625 + target = <&sx1509_0_71>;
14627 + interrupt-parent = <&gpio>;
14628 + interrupt-controller;
14629 + pinctrl-names = "default";
14630 + pinctrl-0 = <&sx150x_0_71_pins>;
14634 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
14636 + target = <&sx1509_1_71>;
14638 + interrupt-parent = <&gpio>;
14639 + interrupt-controller;
14640 + pinctrl-names = "default";
14641 + pinctrl-0 = <&sx150x_1_71_pins>;
14645 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
14646 + // Configure as a input with no pull-up/down
14648 + target = <&gpio>;
14650 + sx150x_0_20_pins: sx150x_0_20_pins {
14651 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
14652 + brcm,function = <0>;
14658 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
14659 + // Configure as a input with no pull-up/down
14661 + target = <&gpio>;
14663 + sx150x_1_20_pins: sx150x_1_20_pins {
14664 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
14665 + brcm,function = <0>;
14671 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
14672 + // Configure as a input with no pull-up/down
14674 + target = <&gpio>;
14676 + sx150x_0_21_pins: sx150x_0_21_pins {
14677 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
14678 + brcm,function = <0>;
14684 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
14685 + // Configure as a input with no pull-up/down
14687 + target = <&gpio>;
14689 + sx150x_1_21_pins: sx150x_1_21_pins {
14690 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
14691 + brcm,function = <0>;
14697 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
14698 + // Configure as a input with no pull-up/down
14700 + target = <&gpio>;
14702 + sx150x_0_22_pins: sx150x_0_22_pins {
14703 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
14704 + brcm,function = <0>;
14710 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
14711 + // Configure as a input with no pull-up/down
14713 + target = <&gpio>;
14715 + sx150x_1_22_pins: sx150x_1_22_pins {
14716 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
14717 + brcm,function = <0>;
14723 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
14724 + // Configure as a input with no pull-up/down
14726 + target = <&gpio>;
14728 + sx150x_0_23_pins: sx150x_0_23_pins {
14729 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
14730 + brcm,function = <0>;
14736 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
14737 + // Configure as a input with no pull-up/down
14739 + target = <&gpio>;
14741 + sx150x_1_23_pins: sx150x_1_23_pins {
14742 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
14743 + brcm,function = <0>;
14749 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
14750 + // Configure as a input with no pull-up/down
14752 + target = <&gpio>;
14754 + sx150x_0_3E_pins: sx150x_0_3E_pins {
14755 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
14756 + brcm,function = <0>;
14762 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
14763 + // Configure as a input with no pull-up/down
14765 + target = <&gpio>;
14767 + sx150x_1_3E_pins: sx150x_1_3E_pins {
14768 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
14769 + brcm,function = <0>;
14775 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
14776 + // Configure as a input with no pull-up/down
14778 + target = <&gpio>;
14780 + sx150x_0_3F_pins: sx150x_0_3F_pins {
14781 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
14782 + brcm,function = <0>;
14788 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
14789 + // Configure as a input with no pull-up/down
14791 + target = <&gpio>;
14793 + sx150x_1_3F_pins: sx150x_1_3F_pins {
14794 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
14795 + brcm,function = <0>;
14801 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
14802 + // Configure as a input with no pull-up/down
14804 + target = <&gpio>;
14806 + sx150x_0_70_pins: sx150x_0_70_pins {
14807 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
14808 + brcm,function = <0>;
14814 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
14815 + // Configure as a input with no pull-up/down
14817 + target = <&gpio>;
14819 + sx150x_1_70_pins: sx150x_1_70_pins {
14820 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
14821 + brcm,function = <0>;
14827 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
14828 + // Configure as a input with no pull-up/down
14830 + target = <&gpio>;
14832 + sx150x_0_71_pins: sx150x_0_71_pins {
14833 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
14834 + brcm,function = <0>;
14840 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
14841 + // Configure as a input with no pull-up/down
14843 + target = <&gpio>;
14845 + sx150x_1_71_pins: sx150x_1_71_pins {
14846 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
14847 + brcm,function = <0>;
14854 + sx1501-0-20 = <0>,"+0+2";
14855 + sx1501-1-20 = <0>,"+1+3";
14856 + sx1501-0-21 = <0>,"+0+4";
14857 + sx1501-1-21 = <0>,"+1+5";
14858 + sx1502-0-20 = <0>,"+0+6";
14859 + sx1502-1-20 = <0>,"+1+7";
14860 + sx1502-0-21 = <0>,"+0+8";
14861 + sx1502-1-21 = <0>,"+1+9";
14862 + sx1503-0-20 = <0>,"+0+10";
14863 + sx1503-1-20 = <0>,"+1+11";
14864 + sx1504-0-20 = <0>,"+0+12";
14865 + sx1504-1-20 = <0>,"+1+13";
14866 + sx1504-0-21 = <0>,"+0+14";
14867 + sx1504-1-21 = <0>,"+1+15";
14868 + sx1505-0-20 = <0>,"+0+16";
14869 + sx1505-1-20 = <0>,"+1+17";
14870 + sx1505-0-21 = <0>,"+0+18";
14871 + sx1505-1-21 = <0>,"+1+19";
14872 + sx1506-0-20 = <0>,"+0+20";
14873 + sx1506-1-20 = <0>,"+1+21";
14874 + sx1507-0-3E = <0>,"+0+22";
14875 + sx1507-1-3E = <0>,"+1+23";
14876 + sx1507-0-3F = <0>,"+0+24";
14877 + sx1507-1-3F = <0>,"+1+25";
14878 + sx1507-0-70 = <0>,"+0+26";
14879 + sx1507-1-70 = <0>,"+1+27";
14880 + sx1507-0-71 = <0>,"+0+28";
14881 + sx1507-1-71 = <0>,"+1+29";
14882 + sx1508-0-20 = <0>,"+0+30";
14883 + sx1508-1-20 = <0>,"+1+31";
14884 + sx1508-0-21 = <0>,"+0+32";
14885 + sx1508-1-21 = <0>,"+1+33";
14886 + sx1508-0-22 = <0>,"+0+34";
14887 + sx1508-1-22 = <0>,"+1+35";
14888 + sx1508-0-23 = <0>,"+0+36";
14889 + sx1508-1-23 = <0>,"+1+37";
14890 + sx1509-0-3E = <0>,"+0+38";
14891 + sx1509-1-3E = <0>,"+1+39";
14892 + sx1509-0-3F = <0>,"+0+40";
14893 + sx1509-1-3F = <0>,"+1+41";
14894 + sx1509-0-70 = <0>,"+0+42";
14895 + sx1509-1-70 = <0>,"+1+43";
14896 + sx1509-0-71 = <0>,"+0+44";
14897 + sx1509-1-71 = <0>,"+1+45";
14898 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
14899 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
14900 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
14901 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
14902 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
14903 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
14904 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
14905 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
14906 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
14907 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
14908 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
14909 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
14910 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
14911 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
14912 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
14913 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
14914 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
14915 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
14916 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
14917 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
14918 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
14919 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
14920 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
14921 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
14922 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
14923 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
14924 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
14925 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
14926 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
14927 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
14928 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
14929 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
14930 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
14931 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
14932 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
14933 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
14934 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
14935 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
14936 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
14937 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
14938 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
14939 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
14940 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
14941 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
14946 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
14949 + * tinylcd35-overlay.dts
14951 + * -------------------------------------------------
14952 + * www.tinlylcd.com
14953 + * -------------------------------------------------
14954 + * Device---Driver-----BUS GPIO's
14955 + * display tinylcd35 spi0.0 25 24 18
14956 + * touch ads7846 spi0.1 5
14957 + * rtc ds1307 i2c1-0068
14958 + * rtc pcf8563 i2c1-0051
14959 + * keypad gpio-keys --------- 17 22 27 23 28
14962 + * TinyLCD.com 3.5 inch TFT
14965 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
14966 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
14974 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
14977 + target = <&spi0>;
14984 + target = <&spidev0>;
14986 + status = "disabled";
14991 + target = <&spidev1>;
14993 + status = "disabled";
14998 + target = <&gpio>;
15000 + tinylcd35_pins: tinylcd35_pins {
15001 + brcm,pins = <25 24 18>;
15002 + brcm,function = <1>; /* out */
15004 + tinylcd35_ts_pins: tinylcd35_ts_pins {
15006 + brcm,function = <0>; /* in */
15008 + keypad_pins: keypad_pins {
15009 + brcm,pins = <4 17 22 23 27>;
15010 + brcm,function = <0>; /* in */
15011 + brcm,pull = <1>; /* down */
15017 + target = <&spi0>;
15019 + /* needed to avoid dtc warning */
15020 + #address-cells = <1>;
15021 + #size-cells = <0>;
15023 + tinylcd35: tinylcd35@0{
15024 + compatible = "neosec,tinylcd";
15026 + pinctrl-names = "default";
15027 + pinctrl-0 = <&tinylcd35_pins>,
15028 + <&tinylcd35_ts_pins>;
15030 + spi-max-frequency = <48000000>;
15035 + reset-gpios = <&gpio 25 0>;
15036 + dc-gpios = <&gpio 24 0>;
15037 + led-gpios = <&gpio 18 1>;
15040 + init = <0x10000B0 0x80
15041 + 0x10000C0 0x0A 0x0A
15042 + 0x10000C1 0x01 0x01
15044 + 0x10000C5 0x00 0x42 0x80
15045 + 0x10000B1 0xD0 0x11
15047 + 0x10000B6 0x00 0x22 0x3B
15050 + 0x10000F0 0x36 0xA5 0xD3
15055 + 0x10000F0 0x36 0xA5 0x53
15056 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
15063 + tinylcd35_ts: tinylcd35_ts@1 {
15064 + compatible = "ti,ads7846";
15066 + status = "disabled";
15068 + spi-max-frequency = <2000000>;
15069 + interrupts = <5 2>; /* high-to-low edge triggered */
15070 + interrupt-parent = <&gpio>;
15071 + pendown-gpio = <&gpio 5 0>;
15072 + ti,x-plate-ohms = /bits/ 16 <100>;
15073 + ti,pressure-max = /bits/ 16 <255>;
15081 + target = <&i2c1>;
15083 + #address-cells = <1>;
15084 + #size-cells = <0>;
15088 + pcf8563: pcf8563@51 {
15089 + compatible = "nxp,pcf8563";
15097 + target = <&i2c1>;
15099 + #address-cells = <1>;
15100 + #size-cells = <0>;
15104 + ds1307: ds1307@68 {
15105 + compatible = "maxim,ds1307";
15113 + * Values for input event code is found under the
15114 + * 'Keys and buttons' heading in include/uapi/linux/input.h
15117 + target-path = "/soc";
15120 + compatible = "gpio-keys";
15121 + #address-cells = <1>;
15122 + #size-cells = <0>;
15123 + pinctrl-names = "default";
15124 + pinctrl-0 = <&keypad_pins>;
15125 + status = "disabled";
15129 + label = "GPIO KEY_UP";
15130 + linux,code = <103>;
15131 + gpios = <&gpio 17 0>;
15134 + label = "GPIO KEY_DOWN";
15135 + linux,code = <108>;
15136 + gpios = <&gpio 22 0>;
15139 + label = "GPIO KEY_LEFT";
15140 + linux,code = <105>;
15141 + gpios = <&gpio 27 0>;
15144 + label = "GPIO KEY_RIGHT";
15145 + linux,code = <106>;
15146 + gpios = <&gpio 23 0>;
15149 + label = "GPIO KEY_ENTER";
15150 + linux,code = <28>;
15151 + gpios = <&gpio 4 0>;
15158 + speed = <&tinylcd35>,"spi-max-frequency:0";
15159 + rotate = <&tinylcd35>,"rotate:0";
15160 + fps = <&tinylcd35>,"fps:0";
15161 + debug = <&tinylcd35>,"debug:0";
15162 + touch = <&tinylcd35_ts>,"status";
15163 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
15164 + <&tinylcd35_ts>,"interrupts:0",
15165 + <&tinylcd35_ts>,"pendown-gpio:4";
15166 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
15167 + rtc-pcf = <0>,"=5";
15168 + rtc-ds = <0>,"=6";
15169 + keypad = <&keypad>,"status";
15173 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
15179 + compatible = "brcm,bcm2708";
15182 + target = <&uart0>;
15184 + pinctrl-names = "default";
15185 + pinctrl-0 = <&uart0_pins>;
15191 + target = <&gpio>;
15193 + uart0_pins: uart0_pins {
15194 + brcm,pins = <14 15>;
15195 + brcm,function = <4>; /* alt0 */
15196 + brcm,pull = <0 2>;
15202 + txd0_pin = <&uart0_pins>,"brcm,pins:0";
15203 + rxd0_pin = <&uart0_pins>,"brcm,pins:4";
15204 + pin_func = <&uart0_pins>,"brcm,function:0";
15208 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
15214 + compatible = "brcm,bcm2708";
15217 + target = <&uart1>;
15219 + pinctrl-names = "default";
15220 + pinctrl-0 = <&uart1_pins>;
15226 + target = <&gpio>;
15228 + uart1_pins: uart1_pins {
15229 + brcm,pins = <14 15>;
15230 + brcm,function = <2>; /* alt5 */
15231 + brcm,pull = <0 2>;
15237 + target-path = "/chosen";
15239 + bootargs = "8250.nr_uarts=1";
15244 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
15245 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
15249 +++ b/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
15251 +// Overlay for missing AUX interrupt controller
15252 +// Instead we bind all AUX devices to the generic AUX interrupt line
15257 + compatible = "brcm,bcm2708";
15260 + target = <&uart1>;
15262 + interrupt-parent = <&intc>;
15263 + interrupts = <0x1 0x1d>;
15268 + target = <&spi1>;
15270 + interrupt-parent = <&intc>;
15271 + interrupts = <0x1 0x1d>;
15276 + target = <&spi2>;
15278 + interrupt-parent = <&intc>;
15279 + interrupts = <0x1 0x1d>;
15285 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
15287 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts,
15292 +#include <dt-bindings/clock/bcm2835.h>
15295 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15297 + target-path = "/chosen";
15299 + bootargs = "cma=256M";
15303 + target-path = "/chosen";
15305 + bootargs = "cma=192M";
15309 + target-path = "/chosen";
15311 + bootargs = "cma=128M";
15315 + target-path = "/chosen";
15317 + bootargs = "cma=96M";
15321 + target-path = "/chosen";
15323 + bootargs = "cma=64M";
15327 + target = <&i2c2>;
15335 + status = "disabled";
15339 + target = <&pixelvalve0>;
15341 + interrupts = <2 13>;
15346 + target = <&pixelvalve1>;
15348 + interrupts = <2 14>;
15353 + target = <&pixelvalve2>;
15355 + interrupts = <2 10>;
15362 + interrupts = <2 1>;
15367 + target = <&hdmi>;
15369 + interrupts = <2 8>, <2 9>;
15376 + interrupts = <1 10>;
15387 + target-path = "/soc/dma";
15389 + brcm,dma-channel-mask = <0x7f35>;
15393 + target = <&clocks>;
15395 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
15406 + #address-cells = <1>;
15407 + #size-cells = <1>;
15408 + dwc2_usb: __overlay__ {
15409 + compatible = "brcm,bcm2835-usb";
15410 + reg = <0x7e980000 0x10000>;
15411 + interrupts = <1 9>;
15413 + g-np-tx-fifo-size = <32>;
15414 + g-rx-fifo-size = <256>;
15415 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
15420 + target = <&uart1>;
15422 + interrupt-parent = <&intc>;
15423 + interrupts = <0x1 0x1d>;
15427 + target = <&spi1>;
15429 + interrupt-parent = <&intc>;
15430 + interrupts = <0x1 0x1d>;
15434 + target = <&spi2>;
15436 + interrupt-parent = <&intc>;
15437 + interrupts = <0x1 0x1d>;
15442 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
15445 + * vc4-fkms-v3d-overlay.dts
15452 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15455 + target-path = "/chosen";
15457 + bootargs = "cma=256M";
15462 + target-path = "/chosen";
15464 + bootargs = "cma=192M";
15469 + target-path = "/chosen";
15471 + bootargs = "cma=128M";
15476 + target-path = "/chosen";
15478 + bootargs = "cma=96M";
15483 + target-path = "/chosen";
15485 + bootargs = "cma=64M";
15492 + status = "disabled";
15497 + target = <&firmwarekms>;
15506 + interrupts = <1 10>;
15519 + target-path = "/soc/dma";
15521 + brcm,dma-channel-mask = <0x7f35>;
15526 + cma-256 = <0>,"+0-1-2-3-4";
15527 + cma-192 = <0>,"-0+1-2-3-4";
15528 + cma-128 = <0>,"-0-1+2-3-4";
15529 + cma-96 = <0>,"-0-1-2+3-4";
15530 + cma-64 = <0>,"-0-1-2-3+4";
15534 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
15537 + * vc4-kms-v3d-overlay.dts
15543 +#include <dt-bindings/clock/bcm2835.h>
15546 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15549 + target-path = "/chosen";
15551 + bootargs = "cma=256M";
15556 + target-path = "/chosen";
15558 + bootargs = "cma=192M";
15563 + target-path = "/chosen";
15565 + bootargs = "cma=128M";
15570 + target-path = "/chosen";
15572 + bootargs = "cma=96M";
15577 + target-path = "/chosen";
15579 + bootargs = "cma=64M";
15584 + target = <&i2c2>;
15593 + status = "disabled";
15598 + target = <&pixelvalve0>;
15600 + interrupts = <2 13>; /* pwa0 */
15606 + target = <&pixelvalve1>;
15608 + interrupts = <2 14>; /* pwa1 */
15614 + target = <&pixelvalve2>;
15616 + interrupts = <2 10>; /* pixelvalve */
15624 + interrupts = <2 1>;
15630 + target = <&hdmi>;
15632 + interrupts = <2 8>, <2 9>;
15640 + interrupts = <1 10>;
15653 + target-path = "/soc/dma";
15655 + brcm,dma-channel-mask = <0x7f35>;
15661 + target = <&clocks>;
15664 + BCM2835_PLLD_DSI0
15665 + BCM2835_PLLD_DSI1
15680 + cma-256 = <0>,"+0-1-2-3-4";
15681 + cma-192 = <0>,"-0+1-2-3-4";
15682 + cma-128 = <0>,"-0-1+2-3-4";
15683 + cma-96 = <0>,"-0-1-2+3-4";
15684 + cma-64 = <0>,"-0-1-2-3+4";
15688 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
15694 + compatible = "brcm,bcm2708";
15696 + // There is no VGA driver module, but we need a platform device
15697 + // node (that doesn't already use pinctrl) to hang the pinctrl
15698 + // reference on - leds will do
15701 + target = <&leds>;
15703 + pinctrl-names = "default";
15704 + pinctrl-0 = <&vga666_pins>;
15709 + target = <&gpio>;
15711 + vga666_pins: vga666_pins {
15712 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
15713 + 13 14 15 16 17 18 19 20 21>;
15714 + brcm,function = <6>; /* alt2 */
15715 + brcm,pull = <0>; /* no pull */
15721 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
15723 +// Definitions for w1-gpio module (without external pullup)
15728 + compatible = "brcm,bcm2708";
15731 + target-path = "/";
15735 + compatible = "w1-gpio";
15736 + pinctrl-names = "default";
15737 + pinctrl-0 = <&w1_pins>;
15738 + gpios = <&gpio 4 0>;
15739 + rpi,parasitic-power = <0>;
15746 + target = <&gpio>;
15748 + w1_pins: w1_pins@0 {
15750 + brcm,function = <0>; // in (initially)
15751 + brcm,pull = <0>; // off
15757 + gpiopin = <&w1>,"gpios:4",
15759 + <&w1_pins>,"brcm,pins:0",
15760 + <&w1_pins>,"reg:0";
15761 + pullup = <&w1>,"rpi,parasitic-power:0";
15765 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
15767 +// Definitions for w1-gpio module (with external pullup)
15772 + compatible = "brcm,bcm2708";
15775 + target-path = "/";
15779 + compatible = "w1-gpio";
15780 + pinctrl-names = "default";
15781 + pinctrl-0 = <&w1_pins>;
15782 + gpios = <&gpio 4 0>, <&gpio 5 1>;
15783 + rpi,parasitic-power = <0>;
15790 + target = <&gpio>;
15792 + w1_pins: w1_pins@0 {
15793 + brcm,pins = <4 5>;
15794 + brcm,function = <0 1>; // in out
15795 + brcm,pull = <0 0>; // off off
15801 + gpiopin = <&w1>,"gpios:4",
15803 + <&w1_pins>,"brcm,pins:0",
15804 + <&w1_pins>,"reg:0";
15805 + extpullup = <&w1>,"gpios:16",
15806 + <&w1_pins>,"brcm,pins:4";
15807 + pullup = <&w1>,"rpi,parasitic-power:0";
15811 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
15814 + * Device Tree overlay for Witty Pi extension board by UUGear
15823 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15826 + target = <&leds>;
15828 + compatible = "gpio-leds";
15829 + wittypi_led: wittypi_led {
15830 + label = "wittypi_led";
15831 + linux,default-trigger = "default-on";
15832 + gpios = <&gpio 17 0>;
15838 + target = <&i2c1>;
15840 + #address-cells = <1>;
15841 + #size-cells = <0>;
15844 + compatible = "dallas,ds1337";
15852 + led_gpio = <&wittypi_led>,"gpios:4";
15853 + led_trigger = <&wittypi_led>,"linux,default-trigger";
15857 --- a/scripts/Makefile.dtbinst
15858 +++ b/scripts/Makefile.dtbinst
15859 @@ -20,6 +20,7 @@ include scripts/Kbuild.include
15860 include $(src)/Makefile
15862 dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15863 +dtboinst-files := $(sort $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15864 dtbinst-dirs := $(subdir-y) $(subdir-m)
15866 # Helper targets for Installing DTBs into the boot directory
15867 @@ -31,10 +32,13 @@ install-dir = $(patsubst $(dtbinst_root)
15868 $(dtbinst-files): %.dtb: $(obj)/%.dtb
15869 $(call cmd,dtb_install,$(install-dir))
15871 +$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
15872 + $(call cmd,dtb_install,$(install-dir))
15875 $(Q)$(MAKE) $(dtbinst)=$(obj)/$@
15877 -PHONY += $(dtbinst-files) $(dtbinst-dirs)
15878 -__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
15879 +PHONY += $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15880 +__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15883 --- a/scripts/Makefile.lib
15884 +++ b/scripts/Makefile.lib
15885 @@ -248,6 +248,7 @@ DTC ?= $(objtree)/scripts/dtc/dtc
15886 ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),)
15887 DTC_FLAGS += -Wno-unit_address_vs_reg \
15888 -Wno-unit_address_format \
15889 + -Wno-gpios_property \
15890 -Wno-avoid_unnecessary_addr_size \
15892 -Wno-graph_child_address \
15893 @@ -292,6 +293,18 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
15894 $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
15895 $(call if_changed_dep,dtc)
15897 +quiet_cmd_dtco = DTCO $@
15898 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
15899 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
15900 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
15901 + -i $(dir $<) $(DTC_FLAGS) \
15902 + -Wno-interrupts_property \
15903 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
15904 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
15906 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
15907 + $(call if_changed_dep,dtco)
15909 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)