1 From 726da40b8c272d181a41686195f91b914363167b Mon Sep 17 00:00:00 2001
2 From: Tim Gover <tim.gover@raspberrypi.org>
3 Date: Tue, 22 Jan 2019 10:49:41 +0000
4 Subject: [PATCH 635/806] overlays: Add the spi-gpio40-45 overlay
6 The 2711 B0 boot EEPROM is programmed via SPI0 on GPIO
7 pins 40-43 CS0. Add a device tree overlay to optionally
8 change the SPI0 pinmux from the external GPIO pins to
11 arch/arm/boot/dts/overlays/Makefile | 1 +
12 arch/arm/boot/dts/overlays/README | 6 ++++
13 .../dts/overlays/spi-gpio40-45-overlay.dts | 36 +++++++++++++++++++
14 3 files changed, 43 insertions(+)
15 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
17 --- a/arch/arm/boot/dts/overlays/Makefile
18 +++ b/arch/arm/boot/dts/overlays/Makefile
19 @@ -135,6 +135,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
23 + spi-gpio40-45.dtbo \
27 --- a/arch/arm/boot/dts/overlays/README
28 +++ b/arch/arm/boot/dts/overlays/README
29 @@ -1967,6 +1967,12 @@ Load: dtoverlay=spi-gpio35-39
34 +Info: Move SPI function block to GPIOs 40 to 45
35 +Load: dtoverlay=spi-gpio40-45
40 Info: Adds support for a number of SPI Real Time Clock devices
41 Load: dtoverlay=spi-rtc,<param>=<val>
43 +++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
46 + * Boot EEPROM overlay
53 + compatible = "brcm,bcm2835";
58 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
64 + target = <&spi0_cs_pins>;
66 + brcm,pins = <45 44 43>;
67 + brcm,function = <1>; /* output */
73 + target = <&spi0_pins>;
75 + brcm,pins = <40 41 42>;
76 + brcm,function = <3>; /* alt4 */