1 From 043927e5556d65b6e40d21a0b53bca06aa9b2d43 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Thu, 21 Jan 2016 17:57:49 +0000
4 Subject: [PATCH 160/304] BCM270X_DT: Add Pi3 support
7 arch/arm/boot/dts/Makefile | 1 +
8 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 192 ++++++++++++++++++++++++++++++++++
9 arch/arm/boot/dts/bcm2710.dtsi | 102 ++++++++++++++++++
10 3 files changed, 295 insertions(+)
11 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
12 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
14 --- a/arch/arm/boot/dts/Makefile
15 +++ b/arch/arm/boot/dts/Makefile
16 @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
17 dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-cm.dtb
18 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
19 dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
20 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
23 ifeq ($(CONFIG_ARCH_BCM2708),y)
25 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
29 +#include "bcm2710.dtsi"
32 + compatible = "brcm,bcm2710","brcm,bcm2709";
33 + model = "Raspberry Pi 3 Model B";
37 + sdhost_pins: sdhost_pins {
38 + brcm,pins = <48 49 50 51 52 53>;
39 + brcm,function = <4>; /* alt0 */
42 + spi0_pins: spi0_pins {
43 + brcm,pins = <9 10 11>;
44 + brcm,function = <4>; /* alt0 */
47 + spi0_cs_pins: spi0_cs_pins {
49 + brcm,function = <1>; /* output */
54 + brcm,function = <4>;
59 + brcm,function = <4>;
63 + brcm,pins = <18 19 20 21>;
64 + brcm,function = <4>; /* alt0 */
67 + sdio_pins: sdio_pins {
68 + brcm,pins = <34 35 36 37 38 39>;
69 + brcm,function = <7>; // alt3 = SD1
70 + brcm,pull = <0 2 2 2 2 2>;
74 + brcm,pins = <28 29 30 31 43>;
75 + brcm,function = <6 6 6 6 4>; /* alt2:PCM alt0:GPCLK2 */
76 + brcm,pull = <0 0 0 0 0>;
79 + uart0_pins: uart0_pins {
80 + brcm,pins = <32 33>;
81 + brcm,function = <7>; /* alt3=UART0 */
85 + uart1_pins: uart1_pins {
86 + brcm,pins = <14 15>;
87 + brcm,function = <2>; /* alt5=UART1 */
93 + pinctrl-names = "default";
94 + pinctrl-0 = <&sdhost_pins>;
100 + pinctrl-names = "default";
101 + pinctrl-0 = <&sdio_pins>;
105 + brcm,overclock-50 = <0>;
109 + virtgpio: virtgpio {
110 + compatible = "brcm,bcm2835-virtgpio";
113 + firmware = <&firmware>;
123 + pinctrl-names = "default";
124 + pinctrl-0 = <&uart0_pins &bt_pins>;
129 + pinctrl-names = "default";
130 + pinctrl-0 = <&uart1_pins>;
135 + pinctrl-names = "default";
136 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
137 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
140 + compatible = "spidev";
141 + reg = <0>; /* CE0 */
142 + #address-cells = <1>;
144 + spi-max-frequency = <500000>;
148 + compatible = "spidev";
149 + reg = <1>; /* CE1 */
150 + #address-cells = <1>;
152 + spi-max-frequency = <500000>;
157 + pinctrl-names = "default";
158 + pinctrl-0 = <&i2c0_pins>;
159 + clock-frequency = <100000>;
163 + pinctrl-names = "default";
164 + pinctrl-0 = <&i2c1_pins>;
165 + clock-frequency = <100000>;
169 + clock-frequency = <100000>;
173 + #sound-dai-cells = <0>;
174 + pinctrl-names = "default";
175 + pinctrl-0 = <&i2s_pins>;
185 + linux,default-trigger = "mmc0";
186 + gpios = <&virtgpio 0 0>;
192 + bootargs = "8250.nr_uarts=1";
198 + uart0 = <&uart0>,"status";
199 + uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
200 + i2s = <&i2s>,"status";
201 + spi = <&spi0>,"status";
202 + i2c0 = <&i2c0>,"status";
203 + i2c1 = <&i2c1>,"status";
204 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
205 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
206 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
207 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
208 + core_freq = <&clk_core>,"clock-frequency:0";
210 + act_led_gpio = <&act_led>,"gpios:4";
211 + act_led_activelow = <&act_led>,"gpios:8";
212 + act_led_trigger = <&act_led>,"linux,default-trigger";
214 + audio = <&audio>,"status";
215 + watchdog = <&watchdog>,"status";
216 + random = <&random>,"status";
220 +++ b/arch/arm/boot/dts/bcm2710.dtsi
222 +#include "bcm2708_common.dtsi"
225 + compatible = "brcm,bcm2710","brcm,bcm2709";
229 + /* No padding required - the boot loader can do that. */
234 + ranges = <0x7e000000 0x3f000000 0x01000000>,
235 + <0x40000000 0x40000000 0x00040000>;
237 + local_intc: local_intc {
238 + compatible = "brcm,bcm2836-l1-intc";
239 + reg = <0x40000000 0x100>;
240 + interrupt-controller;
241 + #interrupt-cells = <1>;
242 + interrupt-parent = <&local_intc>;
246 + compatible = "arm,cortex-a7-pmu";
247 + interrupt-parent = <&local_intc>;
252 + compatible = "brcm,bcm2835-gpiomem";
253 + reg = <0x7e200000 0x1000>;
258 + compatible = "arm,armv7-timer";
259 + clock-frequency = <19200000>;
260 + interrupt-parent = <&local_intc>;
261 + interrupts = <0>, // PHYS_SECURE_PPI
262 + <1>, // PHYS_NONSECURE_PPI
269 + compatible = "brcm,bcm2836-arm-local", "syscon";
270 + reg = <0x40000000 0x100>;
275 + #address-cells = <1>;
279 + device_type = "cpu";
280 + compatible = "arm,cortex-a7";
282 + clock-frequency = <800000000>;
286 + device_type = "cpu";
287 + compatible = "arm,cortex-a7";
289 + clock-frequency = <800000000>;
293 + device_type = "cpu";
294 + compatible = "arm,cortex-a7";
296 + clock-frequency = <800000000>;
300 + device_type = "cpu";
301 + compatible = "arm,cortex-a7";
303 + clock-frequency = <800000000>;
308 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
309 + <&v7_cpu1>, "clock-frequency:0",
310 + <&v7_cpu2>, "clock-frequency:0",
311 + <&v7_cpu3>, "clock-frequency:0";
320 + compatible = "brcm,bcm2836-armctrl-ic";
321 + interrupt-parent = <&local_intc>;