1 From 6aa2c847f76f21c830544e8c79f9030a170ef475 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Thu, 21 Jan 2016 17:57:49 +0000
4 Subject: [PATCH 167/170] BCM270X_DT: Add Pi3 support
7 arch/arm/boot/dts/Makefile | 1 +
8 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 174 ++++++++++++++++++++++++++++++++++
9 arch/arm/boot/dts/bcm2710.dtsi | 102 ++++++++++++++++++++
10 3 files changed, 277 insertions(+)
11 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
12 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
14 --- a/arch/arm/boot/dts/Makefile
15 +++ b/arch/arm/boot/dts/Makefile
16 @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
17 dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-cm.dtb
18 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
19 dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
20 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
23 ifeq ($(CONFIG_ARCH_BCM2708),y)
25 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
29 +#include "bcm2710.dtsi"
32 + compatible = "brcm,bcm2710","brcm,bcm2709";
33 + model = "Raspberry Pi 3 Model B";
37 + sdhost_pins: sdhost_pins {
38 + brcm,pins = <48 49 50 51 52 53>;
39 + brcm,function = <4>; /* alt0 */
42 + spi0_pins: spi0_pins {
43 + brcm,pins = <9 10 11>;
44 + brcm,function = <4>; /* alt0 */
47 + spi0_cs_pins: spi0_cs_pins {
49 + brcm,function = <1>; /* output */
54 + brcm,function = <4>;
59 + brcm,function = <4>;
63 + brcm,pins = <18 19 20 21>;
64 + brcm,function = <4>; /* alt0 */
67 + sdio_pins: sdio_pins {
68 + brcm,pins = <34 35 36 37 38 39>;
69 + brcm,function = <7>; // alt3 = SD1
70 + brcm,pull = <0 2 2 2 2 2>;
74 + brcm,pins = <28 29 30 31 14 15 43>;
75 + brcm,function = <6 6 6 6 2 2 4>;
76 + // alt2:PCM alt5:UART1 alt0:GPCLK2
77 + brcm,pull = <0 0 0 0 0 2 0>;
80 + uart1_pins: uart1_pins {
81 + brcm,pins = <32 33>;
82 + brcm,function = <7>; /* alt3=UART0 */
88 + pinctrl-names = "default";
89 + pinctrl-0 = <&sdhost_pins>;
95 + pinctrl-names = "default";
96 + pinctrl-0 = <&sdio_pins>;
111 + pinctrl-names = "default";
112 + pinctrl-0 = <&uart1_pins &bt_pins>;
117 + pinctrl-names = "default";
118 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
119 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
122 + compatible = "spidev";
123 + reg = <0>; /* CE0 */
124 + #address-cells = <1>;
126 + spi-max-frequency = <500000>;
130 + compatible = "spidev";
131 + reg = <1>; /* CE1 */
132 + #address-cells = <1>;
134 + spi-max-frequency = <500000>;
139 + pinctrl-names = "default";
140 + pinctrl-0 = <&i2c0_pins>;
141 + clock-frequency = <100000>;
145 + pinctrl-names = "default";
146 + pinctrl-0 = <&i2c1_pins>;
147 + clock-frequency = <100000>;
151 + clock-frequency = <100000>;
155 + #sound-dai-cells = <0>;
156 + pinctrl-names = "default";
157 + pinctrl-0 = <&i2s_pins>;
167 + linux,default-trigger = "mmc0";
168 + gpios = <&gpio 47 0>;
174 + bootargs = "8250.nr_uarts=1";
180 + uart0 = <&uart0>,"status";
181 + uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
182 + i2s = <&i2s>,"status";
183 + spi = <&spi0>,"status";
184 + i2c0 = <&i2c0>,"status";
185 + i2c1 = <&i2c1>,"status";
186 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
187 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
188 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
189 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
190 + core_freq = <&clk_core>,"clock-frequency:0";
192 + act_led_gpio = <&act_led>,"gpios:4";
193 + act_led_activelow = <&act_led>,"gpios:8";
194 + act_led_trigger = <&act_led>,"linux,default-trigger";
196 + audio = <&audio>,"status";
197 + watchdog = <&watchdog>,"status";
198 + random = <&random>,"status";
202 +++ b/arch/arm/boot/dts/bcm2710.dtsi
204 +#include "bcm2708_common.dtsi"
207 + compatible = "brcm,bcm2710","brcm,bcm2709";
211 + /* No padding required - the boot loader can do that. */
216 + ranges = <0x7e000000 0x3f000000 0x01000000>,
217 + <0x40000000 0x40000000 0x00040000>;
219 + local_intc: local_intc {
220 + compatible = "brcm,bcm2836-l1-intc";
221 + reg = <0x40000000 0x100>;
222 + interrupt-controller;
223 + #interrupt-cells = <1>;
224 + interrupt-parent = <&local_intc>;
228 + compatible = "arm,cortex-a7-pmu";
229 + interrupt-parent = <&local_intc>;
234 + compatible = "brcm,bcm2835-gpiomem";
235 + reg = <0x7e200000 0x1000>;
240 + compatible = "arm,armv7-timer";
241 + clock-frequency = <19200000>;
242 + interrupt-parent = <&local_intc>;
243 + interrupts = <0>, // PHYS_SECURE_PPI
244 + <1>, // PHYS_NONSECURE_PPI
251 + compatible = "brcm,bcm2836-arm-local", "syscon";
252 + reg = <0x40000000 0x100>;
257 + #address-cells = <1>;
261 + device_type = "cpu";
262 + compatible = "arm,cortex-a7";
264 + clock-frequency = <800000000>;
268 + device_type = "cpu";
269 + compatible = "arm,cortex-a7";
271 + clock-frequency = <800000000>;
275 + device_type = "cpu";
276 + compatible = "arm,cortex-a7";
278 + clock-frequency = <800000000>;
282 + device_type = "cpu";
283 + compatible = "arm,cortex-a7";
285 + clock-frequency = <800000000>;
290 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
291 + <&v7_cpu1>, "clock-frequency:0",
292 + <&v7_cpu2>, "clock-frequency:0",
293 + <&v7_cpu3>, "clock-frequency:0";
302 + compatible = "brcm,bcm2836-armctrl-ic";
303 + interrupt-parent = <&local_intc>;