1 From fd6dfd0af2ab83d8df5d7b17a52fbf0284e42f2b Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Mon, 28 Dec 2015 14:34:44 -0800
4 Subject: [PATCH 276/423] drm/vc4: Move the plane clipping/scaling setup to a
7 As we add actual scaling, this is going to get way more complicated.
9 Signed-off-by: Eric Anholt <eric@anholt.net>
10 (cherry picked from commit 5c6799942003df91801b1d2277bba34d71f99603)
12 drivers/gpu/drm/vc4/vc4_plane.c | 78 +++++++++++++++++++++++++++--------------
13 1 file changed, 52 insertions(+), 26 deletions(-)
15 --- a/drivers/gpu/drm/vc4/vc4_plane.c
16 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
17 @@ -40,6 +40,14 @@ struct vc4_plane_state {
18 * hardware at vc4_crtc_atomic_flush() time.
20 u32 __iomem *hw_dlist;
22 + /* Clipped coordinates of the plane on the display. */
23 + int crtc_x, crtc_y, crtc_w, crtc_h;
25 + /* Offset to start scanning out from the start of the plane's
31 static inline struct vc4_plane_state *
32 @@ -167,22 +175,17 @@ static void vc4_dlist_write(struct vc4_p
33 vc4_state->dlist[vc4_state->dlist_count++] = val;
36 -/* Writes out a full display list for an active plane to the plane's
37 - * private dlist state.
39 -static int vc4_plane_mode_set(struct drm_plane *plane,
40 - struct drm_plane_state *state)
41 +static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
43 struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
44 struct drm_framebuffer *fb = state->fb;
45 - struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
46 - u32 ctl0_offset = vc4_state->dlist_count;
47 - const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
48 - uint32_t offset = fb->offsets[0];
49 - int crtc_x = state->crtc_x;
50 - int crtc_y = state->crtc_y;
51 - int crtc_w = state->crtc_w;
52 - int crtc_h = state->crtc_h;
54 + vc4_state->offset = fb->offsets[0];
56 + vc4_state->crtc_x = state->crtc_x;
57 + vc4_state->crtc_y = state->crtc_y;
58 + vc4_state->crtc_w = state->crtc_w;
59 + vc4_state->crtc_h = state->crtc_h;
61 if (state->crtc_w << 16 != state->src_w ||
62 state->crtc_h << 16 != state->src_h) {
63 @@ -194,18 +197,41 @@ static int vc4_plane_mode_set(struct drm
68 - offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
71 + if (vc4_state->crtc_x < 0) {
72 + vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
74 + -vc4_state->crtc_x);
75 + vc4_state->crtc_w += vc4_state->crtc_x;
76 + vc4_state->crtc_x = 0;
80 - offset += fb->pitches[0] * -crtc_y;
83 + if (vc4_state->crtc_y < 0) {
84 + vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
85 + vc4_state->crtc_h += vc4_state->crtc_y;
86 + vc4_state->crtc_y = 0;
93 +/* Writes out a full display list for an active plane to the plane's
94 + * private dlist state.
96 +static int vc4_plane_mode_set(struct drm_plane *plane,
97 + struct drm_plane_state *state)
99 + struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
100 + struct drm_framebuffer *fb = state->fb;
101 + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
102 + u32 ctl0_offset = vc4_state->dlist_count;
103 + const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
106 + ret = vc4_plane_setup_clipping_and_scaling(state);
110 vc4_dlist_write(vc4_state,
112 (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
113 @@ -215,8 +241,8 @@ static int vc4_plane_mode_set(struct drm
114 /* Position Word 0: Image Positions and Alpha Value */
115 vc4_dlist_write(vc4_state,
116 VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
117 - VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
118 - VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
119 + VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
120 + VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
122 /* Position Word 1: Scaled Image Dimensions.
123 * Skipped due to SCALER_CTL0_UNITY scaling.
124 @@ -228,8 +254,8 @@ static int vc4_plane_mode_set(struct drm
125 SCALER_POS2_ALPHA_MODE_PIPELINE :
126 SCALER_POS2_ALPHA_MODE_FIXED,
127 SCALER_POS2_ALPHA_MODE) |
128 - VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
129 - VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
130 + VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
131 + VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
133 /* Position Word 3: Context. Written by the HVS. */
134 vc4_dlist_write(vc4_state, 0xc0c0c0c0);
135 @@ -237,7 +263,7 @@ static int vc4_plane_mode_set(struct drm
136 vc4_state->pw0_offset = vc4_state->dlist_count;
138 /* Pointer Word 0: RGB / Y Pointer */
139 - vc4_dlist_write(vc4_state, bo->paddr + offset);
140 + vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
142 /* Pointer Context Word 0: Written by the HVS */
143 vc4_dlist_write(vc4_state, 0xc0c0c0c0);