1 From 7312a1a17fcfd2ae587be671f895b23c8973e9ad Mon Sep 17 00:00:00 2001
2 From: wavelet2 <a3d35232@btinternet.com>
3 Date: Fri, 19 Aug 2016 09:32:53 +0100
4 Subject: [PATCH] Overlay for Microchip MCP23S08/17 SPI gpio expanders (#1566)
6 Added Overlay for Microchip MCP23S08/17 SPI gpio expanders
8 arch/arm/boot/dts/overlays/Makefile | 1 +
9 arch/arm/boot/dts/overlays/README | 24 +
10 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++++++++++++++++++++++
11 3 files changed, 757 insertions(+)
12 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
14 --- a/arch/arm/boot/dts/overlays/Makefile
15 +++ b/arch/arm/boot/dts/overlays/Makefile
16 @@ -49,6 +49,7 @@ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.
17 dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
18 dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
19 dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
20 +dtbo-$(RPI_DT_OVERLAYS) += mcp23s17.dtbo
21 dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
22 dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
23 dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
24 --- a/arch/arm/boot/dts/overlays/README
25 +++ b/arch/arm/boot/dts/overlays/README
26 @@ -628,6 +628,30 @@ Params: gpiopin Gpio pin
27 addr I2C address of the MCP23017 (default: 0x20)
31 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
32 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
33 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
34 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
35 + device must be the only one present on that SPI bus/CS#.
36 +Load: dtoverlay=mcp23s17,<param>=<val>
37 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
38 + devices present on SPI<n>, CS#<m>
40 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
41 + devices present on SPI<n>, CS#<m>
43 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
44 + MCP23S08 device on SPI<n>, CS#<m>, specifies
45 + the GPIO pin to which INT output of MCP23S08
48 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
49 + single MCP23S17 device on SPI<n>, CS#<m>,
50 + specifies the GPIO pin to which either INTA
51 + or INTB output of MCP23S17 is connected.
55 Info: Configures the MCP2515 CAN controller on spi0.0
56 Load: dtoverlay=mcp2515-can0,<param>=<val>
58 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
60 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
63 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
64 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
65 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
66 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
68 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
69 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
71 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
72 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
74 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
75 +// dtoverlay=spi1-2cs
76 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
82 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
84 + // disable spi-dev on spi0.0
86 + target = <&spidev0>;
88 + status = "disabled";
92 + // disable spi-dev on spi0.1
94 + target = <&spidev1>;
96 + status = "disabled";
100 + // disable spi-dev on spi1.0
102 + target-path = "spi1/spidev@0";
104 + status = "disabled";
108 + // disable spi-dev on spi1.1
110 + target-path = "spi1/spidev@1";
112 + status = "disabled";
116 + // disable spi-dev on spi1.2
118 + target-path = "spi1/spidev@2";
120 + status = "disabled";
124 + // disable spi-dev on spi2.0
126 + target-path = "spi2/spidev@0";
128 + status = "disabled";
132 + // disable spi-dev on spi2.1
134 + target-path = "spi2/spidev@1";
136 + status = "disabled";
140 + // disable spi-dev on spi2.2
142 + target-path = "spi2/spidev@2";
144 + status = "disabled";
148 + // enable one or more mcp23s08s on spi0.0
153 + #address-cells = <1>;
155 + mcp23s08_00: mcp23s08@0 {
156 + compatible = "microchip,mcp23s08";
159 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
161 + spi-max-frequency = <500000>;
163 + #interrupt-cells=<2>;
164 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
169 + // enable one or more mcp23s08s on spi0.1
174 + #address-cells = <1>;
176 + mcp23s08_01: mcp23s08@1 {
177 + compatible = "microchip,mcp23s08";
180 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
182 + spi-max-frequency = <500000>;
184 + #interrupt-cells=<2>;
185 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
190 + // enable one or more mcp23s08s on spi1.0
195 + #address-cells = <1>;
197 + mcp23s08_10: mcp23s08@0 {
198 + compatible = "microchip,mcp23s08";
201 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
203 + spi-max-frequency = <500000>;
205 + #interrupt-cells=<2>;
206 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
211 + // enable one or more mcp23s08s on spi1.1
216 + #address-cells = <1>;
218 + mcp23s08_11: mcp23s08@1 {
219 + compatible = "microchip,mcp23s08";
222 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
224 + spi-max-frequency = <500000>;
226 + #interrupt-cells=<2>;
227 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
232 + // enable one or more mcp23s08s on spi1.2
237 + #address-cells = <1>;
239 + mcp23s08_12: mcp23s08@2 {
240 + compatible = "microchip,mcp23s08";
243 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
245 + spi-max-frequency = <500000>;
247 + #interrupt-cells=<2>;
248 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
253 + // enable one or more mcp23s08s on spi2.0
258 + #address-cells = <1>;
260 + mcp23s08_20: mcp23s08@0 {
261 + compatible = "microchip,mcp23s08";
264 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
266 + spi-max-frequency = <500000>;
268 + #interrupt-cells=<2>;
269 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
274 + // enable one or more mcp23s08s on spi2.1
279 + #address-cells = <1>;
281 + mcp23s08_21: mcp23s08@1 {
282 + compatible = "microchip,mcp23s08";
285 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
287 + spi-max-frequency = <500000>;
289 + #interrupt-cells=<2>;
290 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
295 + // enable one or more mcp23s08s on spi2.2
300 + #address-cells = <1>;
302 + mcp23s08_22: mcp23s08@2 {
303 + compatible = "microchip,mcp23s08";
306 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
308 + spi-max-frequency = <500000>;
310 + #interrupt-cells=<2>;
311 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
316 + // enable one or more mcp23s17s on spi0.0
321 + #address-cells = <1>;
323 + mcp23s17_00: mcp23s17@0 {
324 + compatible = "microchip,mcp23s17";
327 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
329 + spi-max-frequency = <500000>;
331 + #interrupt-cells=<2>;
332 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
337 + // enable one or more mcp23s17s on spi0.1
342 + #address-cells = <1>;
344 + mcp23s17_01: mcp23s17@1 {
345 + compatible = "microchip,mcp23s17";
348 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
350 + spi-max-frequency = <500000>;
352 + #interrupt-cells=<2>;
353 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
358 + // enable one or more mcp23s17s on spi1.0
363 + #address-cells = <1>;
365 + mcp23s17_10: mcp23s17@0 {
366 + compatible = "microchip,mcp23s17";
369 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
371 + spi-max-frequency = <500000>;
373 + #interrupt-cells=<2>;
374 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
379 + // enable one or more mcp23s17s on spi1.1
384 + #address-cells = <1>;
386 + mcp23s17_11: mcp23s17@1 {
387 + compatible = "microchip,mcp23s17";
390 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
392 + spi-max-frequency = <500000>;
394 + #interrupt-cells=<2>;
395 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
400 + // enable one or more mcp23s17s on spi1.2
405 + #address-cells = <1>;
407 + mcp23s17_12: mcp23s17@2 {
408 + compatible = "microchip,mcp23s17";
411 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
413 + spi-max-frequency = <500000>;
415 + #interrupt-cells=<2>;
416 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
421 + // enable one or more mcp23s17s on spi2.0
426 + #address-cells = <1>;
428 + mcp23s17_20: mcp23s17@0 {
429 + compatible = "microchip,mcp23s17";
432 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
434 + spi-max-frequency = <500000>;
436 + #interrupt-cells=<2>;
437 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
442 + // enable one or more mcp23s17s on spi2.1
447 + #address-cells = <1>;
449 + mcp23s17_21: mcp23s17@1 {
450 + compatible = "microchip,mcp23s17";
453 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
455 + spi-max-frequency = <500000>;
457 + #interrupt-cells=<2>;
458 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
463 + // enable one or more mcp23s17s on spi2.2
468 + #address-cells = <1>;
470 + mcp23s17_22: mcp23s17@2 {
471 + compatible = "microchip,mcp23s17";
474 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
476 + spi-max-frequency = <500000>;
478 + #interrupt-cells=<2>;
479 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
484 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
488 + spi0_0_int_pins: spi0_0_int_pins {
489 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
490 + brcm,function = <0>;
496 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
500 + spi0_1_int_pins: spi0_1_int_pins {
501 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
502 + brcm,function = <0>;
508 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
512 + spi1_0_int_pins: spi1_0_int_pins {
513 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
514 + brcm,function = <0>;
520 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
524 + spi1_1_int_pins: spi1_1_int_pins {
525 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
526 + brcm,function = <0>;
532 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
536 + spi1_2_int_pins: spi1_2_int_pins {
537 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
538 + brcm,function = <0>;
544 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
548 + spi2_0_int_pins: spi2_0_int_pins {
549 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
550 + brcm,function = <0>;
556 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
560 + spi2_1_int_pins: spi2_1_int_pins {
561 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
562 + brcm,function = <0>;
568 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
572 + spi2_2_int_pins: spi2_2_int_pins {
573 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
574 + brcm,function = <0>;
580 + // Enable interrupts for a mcp23s08 on spi0.0.
581 + // Use default active low interrupt signalling.
583 + target = <&mcp23s08_00>;
585 + interrupt-parent = <&gpio>;
586 + interrupt-controller;
590 + // Enable interrupts for a mcp23s08 on spi0.1.
591 + // Use default active low interrupt signalling.
593 + target = <&mcp23s08_01>;
595 + interrupt-parent = <&gpio>;
596 + interrupt-controller;
600 + // Enable interrupts for a mcp23s08 on spi1.0.
601 + // Use default active low interrupt signalling.
603 + target = <&mcp23s08_10>;
605 + interrupt-parent = <&gpio>;
606 + interrupt-controller;
610 + // Enable interrupts for a mcp23s08 on spi1.1.
611 + // Use default active low interrupt signalling.
613 + target = <&mcp23s08_11>;
615 + interrupt-parent = <&gpio>;
616 + interrupt-controller;
620 + // Enable interrupts for a mcp23s08 on spi1.2.
621 + // Use default active low interrupt signalling.
623 + target = <&mcp23s08_12>;
625 + interrupt-parent = <&gpio>;
626 + interrupt-controller;
630 + // Enable interrupts for a mcp23s08 on spi2.0.
631 + // Use default active low interrupt signalling.
633 + target = <&mcp23s08_20>;
635 + interrupt-parent = <&gpio>;
636 + interrupt-controller;
640 + // Enable interrupts for a mcp23s08 on spi2.1.
641 + // Use default active low interrupt signalling.
643 + target = <&mcp23s08_21>;
645 + interrupt-parent = <&gpio>;
646 + interrupt-controller;
650 + // Enable interrupts for a mcp23s08 on spi2.2.
651 + // Use default active low interrupt signalling.
653 + target = <&mcp23s08_22>;
655 + interrupt-parent = <&gpio>;
656 + interrupt-controller;
660 + // Enable interrupts for a mcp23s17 on spi0.0.
661 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
662 + // Use default active low interrupt signalling.
664 + target = <&mcp23s17_00>;
666 + interrupt-parent = <&gpio>;
667 + interrupt-controller;
668 + microchip,irq-mirror;
672 + // Enable interrupts for a mcp23s17 on spi0.1.
673 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
674 + // Configure INTA/B outputs of mcp23s08/17 as active low.
676 + target = <&mcp23s17_01>;
678 + interrupt-parent = <&gpio>;
679 + interrupt-controller;
680 + microchip,irq-mirror;
684 + // Enable interrupts for a mcp23s17 on spi1.0.
685 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
686 + // Configure INTA/B outputs of mcp23s08/17 as active low.
688 + target = <&mcp23s17_10>;
690 + interrupt-parent = <&gpio>;
691 + interrupt-controller;
692 + microchip,irq-mirror;
696 + // Enable interrupts for a mcp23s17 on spi1.1.
697 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
698 + // Configure INTA/B outputs of mcp23s08/17 as active low.
700 + target = <&mcp23s17_11>;
702 + interrupt-parent = <&gpio>;
703 + interrupt-controller;
704 + microchip,irq-mirror;
708 + // Enable interrupts for a mcp23s17 on spi1.2.
709 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
710 + // Configure INTA/B outputs of mcp23s08/17 as active low.
712 + target = <&mcp23s17_12>;
714 + interrupt-parent = <&gpio>;
715 + interrupt-controller;
716 + microchip,irq-mirror;
720 + // Enable interrupts for a mcp23s17 on spi2.0.
721 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
722 + // Configure INTA/B outputs of mcp23s08/17 as active low.
724 + target = <&mcp23s17_20>;
726 + interrupt-parent = <&gpio>;
727 + interrupt-controller;
728 + microchip,irq-mirror;
732 + // Enable interrupts for a mcp23s17 on spi2.1.
733 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
734 + // Configure INTA/B outputs of mcp23s08/17 as active low.
736 + target = <&mcp23s17_21>;
738 + interrupt-parent = <&gpio>;
739 + interrupt-controller;
740 + microchip,irq-mirror;
744 + // Enable interrupts for a mcp23s17 on spi2.2.
745 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
746 + // Configure INTA/B outputs of mcp23s08/17 as active low.
748 + target = <&mcp23s17_22>;
750 + interrupt-parent = <&gpio>;
751 + interrupt-controller;
752 + microchip,irq-mirror;
757 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
758 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
759 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
760 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
761 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
762 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
763 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
764 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
765 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
766 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
767 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
768 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
769 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
770 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
771 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
772 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
773 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
774 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
775 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
776 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
777 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
778 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
779 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
780 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
781 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
782 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
783 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
784 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
785 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
786 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
787 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
788 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";