1 From efdb964748f093780166ef56fa7873067d35074e Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Mon, 16 Jan 2017 14:53:12 +0000
4 Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay
6 The spi0-cs overlay allows the software chip selectts to be modified
7 using the cs0_pin and cs1_pin parameters.
9 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
11 arch/arm/boot/dts/overlays/Makefile | 1 +
12 arch/arm/boot/dts/overlays/README | 9 +++++++-
13 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++
14 3 files changed, 38 insertions(+), 1 deletion(-)
15 create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
17 --- a/arch/arm/boot/dts/overlays/Makefile
18 +++ b/arch/arm/boot/dts/overlays/Makefile
19 @@ -83,6 +83,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
27 --- a/arch/arm/boot/dts/overlays/README
28 +++ b/arch/arm/boot/dts/overlays/README
29 @@ -1138,7 +1138,7 @@ Params: <None>
33 -Info: move SPI function block to GPIO 35 to 39
34 +Info: Move SPI function block to GPIO 35 to 39
35 Load: dtoverlay=spi-gpio35-39
38 @@ -1149,6 +1149,13 @@ Load: dtoverlay=spi-rtc,<param>=<val>
39 Params: pcf2123 Select the PCF2123 device
43 +Info: Allows the (software) CS pins for SPI0 to be changed
44 +Load: dtoverlay=spi0-cs,<param>=<val>
45 +Params: cs0_pin GPIO pin for CS0 (default 8)
46 + cs1_pin GPIO pin for CS1 (default 7)
50 Info: Re-enables hardware CS/CE (chip selects) for SPI0
51 Load: dtoverlay=spi0-hw-cs
53 +++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
60 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
63 + target = <&spi0_cs_pins>;
64 + frag0: __overlay__ {
71 + frag1: __overlay__ {
72 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
78 + cs0_pin = <&frag0>,"brcm,pins:0",
79 + <&frag1>,"cs-gpios:4";
80 + cs1_pin = <&frag0>,"brcm,pins:4",
81 + <&frag1>,"cs-gpios:16";