refresh 2.6.27 patches
[openwrt/staging/wigyori.git] / target / linux / brcm63xx / patches-2.6.27 / 001-add_broadcom_63xx_cpu_definitions.patch
1 From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001
2 From: Maxime Bizon <mbizon@freebox.fr>
3 Date: Fri, 18 Jul 2008 15:53:08 +0200
4 Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions.
5
6 Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
7 ---
8 arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++
9 arch/mips/mm/tlbex.c | 4 ++++
10 include/asm-mips/cpu.h | 7 +++++++
11 3 files changed, 36 insertions(+), 0 deletions(-)
12
13 --- a/arch/mips/kernel/cpu-probe.c
14 +++ b/arch/mips/kernel/cpu-probe.c
15 @@ -153,6 +153,9 @@ void __init check_wait(void)
16 case CPU_25KF:
17 case CPU_PR4450:
18 case CPU_BCM3302:
19 + case CPU_BCM6338:
20 + case CPU_BCM6348:
21 + case CPU_BCM6358:
22 cpu_wait = r4k_wait;
23 break;
24
25 @@ -802,11 +805,28 @@ static inline void cpu_probe_broadcom(st
26 decode_configs(c);
27 switch (c->processor_id & 0xff00) {
28 case PRID_IMP_BCM3302:
29 + /* same as PRID_IMP_BCM6338 */
30 c->cputype = CPU_BCM3302;
31 break;
32 case PRID_IMP_BCM4710:
33 c->cputype = CPU_BCM4710;
34 break;
35 + case PRID_IMP_BCM6345:
36 + c->cputype = CPU_BCM6345;
37 + break;
38 + case PRID_IMP_BCM6348:
39 + c->cputype = CPU_BCM6348;
40 + break;
41 + case PRID_IMP_BCM4350:
42 + switch (c->processor_id & 0xf0) {
43 + case PRID_REV_BCM6358:
44 + c->cputype = CPU_BCM6358;
45 + break;
46 + default:
47 + c->cputype = CPU_UNKNOWN;
48 + break;
49 + }
50 + break;
51 default:
52 c->cputype = CPU_UNKNOWN;
53 break;
54 @@ -892,6 +912,10 @@ static __cpuinit const char *cpu_to_name
55 case CPU_SR71000: name = "Sandcraft SR71000"; break;
56 case CPU_BCM3302: name = "Broadcom BCM3302"; break;
57 case CPU_BCM4710: name = "Broadcom BCM4710"; break;
58 + case CPU_BCM6338: name = "Broadcom BCM6338"; break;
59 + case CPU_BCM6345: name = "Broadcom BCM6345"; break;
60 + case CPU_BCM6348: name = "Broadcom BCM6348"; break;
61 + case CPU_BCM6358: name = "Broadcom BCM6358"; break;
62 case CPU_PR4450: name = "Philips PR4450"; break;
63 case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
64 default:
65 --- a/arch/mips/mm/tlbex.c
66 +++ b/arch/mips/mm/tlbex.c
67 @@ -317,6 +317,10 @@ static void __cpuinit build_tlb_write_en
68 case CPU_BCM3302:
69 case CPU_BCM4710:
70 case CPU_LOONGSON2:
71 + case CPU_BCM6338:
72 + case CPU_BCM6345:
73 + case CPU_BCM6348:
74 + case CPU_BCM6358:
75 if (m4kc_tlbp_war())
76 uasm_i_nop(p);
77 tlbw(p);
78 --- a/include/asm-mips/cpu.h
79 +++ b/include/asm-mips/cpu.h
80 @@ -112,6 +112,12 @@
81
82 #define PRID_IMP_BCM4710 0x4000
83 #define PRID_IMP_BCM3302 0x9000
84 +#define PRID_IMP_BCM6338 0x9000
85 +#define PRID_IMP_BCM6345 0x8000
86 +#define PRID_IMP_BCM6348 0x9100
87 +#define PRID_IMP_BCM4350 0xA000
88 +#define PRID_REV_BCM6358 0x0010
89 +#define PRID_REV_BCM6368 0x0030
90
91 /*
92 * Definitions for 7:0 on legacy processors
93 @@ -198,6 +204,7 @@ enum cpu_type_enum {
94 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
95 CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
96 CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
97 + CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
98
99 /*
100 * MIPS64 class processors