1 From 2f94c414e554531e2a65a7c4a7fa2d1ba0380c0a Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Mon, 21 Nov 2011 00:53:26 +0100
4 Subject: [PATCH 29/72] MIPS: BCM63XX: enable pcie for BCM6362
6 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
8 arch/mips/pci/pci-bcm63xx.c | 19 ++++++++++++++++---
9 1 file changed, 16 insertions(+), 3 deletions(-)
11 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
12 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
14 /*************************************************************************
15 * _REG relative to RSET_MISC
16 *************************************************************************/
17 -#define MISC_SERDES_CTRL_REG 0x0
18 +#define MISC_SERDES_CTRL_6328_REG 0x0
19 +#define MISC_SERDES_CTRL_6362_REG 0x4
20 #define SERDES_PCIE_EN (1 << 0)
21 #define SERDES_PCIE_EXD_EN (1 << 15)
23 --- a/arch/mips/pci/pci-bcm63xx.c
24 +++ b/arch/mips/pci/pci-bcm63xx.c
25 @@ -121,11 +121,17 @@ void __iomem *pci_iospace_start;
26 static void __init bcm63xx_reset_pcie(void)
32 - val = bcm_misc_readl(MISC_SERDES_CTRL_REG);
33 + if (BCMCPU_IS_6328())
34 + reg = MISC_SERDES_CTRL_6328_REG;
36 + reg = MISC_SERDES_CTRL_6362_REG;
38 + val = bcm_misc_readl(reg);
39 val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;
40 - bcm_misc_writel(val, MISC_SERDES_CTRL_REG);
41 + bcm_misc_writel(val, reg);
43 /* reset the PCIe core */
44 bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
45 @@ -330,6 +336,7 @@ static int __init bcm63xx_pci_init(void)
47 switch (bcm63xx_get_cpu_id()) {
49 + case BCM6362_CPU_ID:
50 return bcm63xx_register_pcie();