1 From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sun, 3 Jul 2011 15:00:38 +0200
4 Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
6 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
8 arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
9 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
10 2 files changed, 33 insertions(+), 2 deletions(-)
12 --- a/arch/mips/bcm63xx/dev-flash.c
13 +++ b/arch/mips/bcm63xx/dev-flash.c
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/mtd/spi-nor.h>
18 +#include <linux/of.h>
19 +#include <linux/spi/spi.h>
20 +#include <linux/spi/flash.h>
22 #include <bcm63xx_cpu.h>
23 #include <bcm63xx_dev_flash.h>
24 +#include <bcm63xx_dev_hsspi.h>
25 #include <bcm63xx_regs.h>
26 #include <bcm63xx_io.h>
28 @@ -66,6 +70,46 @@ void __init bcm63xx_flash_force_phys_bas
29 mtd_resources[0].end = end;
32 +static struct flash_platform_data bcm63xx_flash_data = {
33 + .part_probe_types = bcm63xx_part_types,
36 +static struct spi_board_info bcm63xx_spi_flash_info[] = {
41 + .max_speed_hz = 781000,
42 + .modalias = "m25p80",
43 + .platform_data = &bcm63xx_flash_data,
47 +static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
48 + unsigned int new_hz)
50 + struct property *max_hz;
53 + max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
57 + max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
58 + if (!max_hz->name) {
63 + max_hz->value = max_hz + 1;
64 + max_hz->length = sizeof(*hz);
67 + *hz = cpu_to_be32(new_hz);
69 + of_update_property(np, max_hz);
72 static int __init bcm63xx_detect_flash_type(void)
75 @@ -73,9 +117,15 @@ static int __init bcm63xx_detect_flash_t
76 switch (bcm63xx_get_cpu_id()) {
78 /* only support serial flash */
79 + bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
80 return BCM63XX_FLASH_TYPE_SERIAL;
82 val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
83 + if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
84 + bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
86 + bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
88 if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
89 return BCM63XX_FLASH_TYPE_SERIAL;
91 @@ -94,12 +144,20 @@ static int __init bcm63xx_detect_flash_t
92 return BCM63XX_FLASH_TYPE_SERIAL;
94 val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
95 + if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
96 + bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
98 + bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
100 if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
101 return BCM63XX_FLASH_TYPE_SERIAL;
103 return BCM63XX_FLASH_TYPE_NAND;
105 val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
106 + if (val & STRAPBUS_6368_SPI_CLK_FAST)
107 + bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
109 switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
110 case STRAPBUS_6368_BOOT_SEL_NAND:
111 return BCM63XX_FLASH_TYPE_NAND;
112 @@ -110,6 +168,11 @@ static int __init bcm63xx_detect_flash_t
114 case BCM63268_CPU_ID:
115 val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
116 + if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
117 + bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
119 + bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
121 if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
122 return BCM63XX_FLASH_TYPE_SERIAL;
124 @@ -176,6 +239,7 @@ void __init bcm63xx_flash_detect(void)
126 int __init bcm63xx_flash_register(void)
128 + struct device_node *np;
131 switch (flash_type) {
132 @@ -195,8 +259,21 @@ int __init bcm63xx_flash_register(void)
134 return platform_device_register(&mtd_dev);
135 case BCM63XX_FLASH_TYPE_SERIAL:
136 - pr_warn("unsupported serial flash detected\n");
138 + np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
140 + bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
144 + if (BCMCPU_IS_6318() || BCMCPU_IS_6328() ||
145 + BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
146 + bcm63xx_spi_flash_info[0].bus_num = 1;
147 + bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL;
150 + return spi_register_board_info(bcm63xx_spi_flash_info,
151 + ARRAY_SIZE(bcm63xx_spi_flash_info));
153 case BCM63XX_FLASH_TYPE_NAND:
154 pr_warn("unsupported NAND flash detected\n");
156 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
157 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
159 #define GPIO_STRAPBUS_REG 0x40
160 #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
161 #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
162 +#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
163 #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
164 #define STRAPBUS_6368_BOOT_SEL_NAND 0
165 #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
166 @@ -1564,6 +1565,7 @@
167 #define IDDQ_CTRL_63268_USBH (1 << 4)
169 #define MISC_STRAPBUS_6328_REG 0x240
170 +#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
171 #define STRAPBUS_6328_FCVO_SHIFT 7
172 #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
173 #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)