target/linux/brcm63xx/patches-4.4/902-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch

   1 From 0a7c0670525da604a8cee20bad31aeb645dacbe6 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Fri, 24 Jun 2016 22:12:50 +0200
   4 Subject: [PATCH] pinctrl: add a pincontrol driver for BCM6328
   5
   6 Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
   7 GPIOs, as LEDs for the integrated LED controller, or various other
   8 functions. Its pincontrol mux registers also control other aspects, like
   9 switching the second USB port between host and device mode.
  10
  11 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  12 ---
  13  drivers/pinctrl/bcm63xx/Kconfig           |   7 +
  14  drivers/pinctrl/bcm63xx/Makefile          |   1 +
  15  drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 501 ++++++++++++++++++++++++++++++
  16  3 files changed, 509 insertions(+)
  17  create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
  18
  19 --- a/drivers/pinctrl/bcm63xx/Kconfig
  20 +++ b/drivers/pinctrl/bcm63xx/Kconfig
  21 @@ -1,3 +1,10 @@
  22  config PINCTRL_BCM63XX
  23         bool
  24         select GPIO_GENERIC
  25 +
  26 +config PINCTRL_BCM6328
  27 +       bool "BCM6328 pincontrol driver" if COMPILE_TEST
  28 +       select PINMUX
  29 +       select PINCONF
  30 +       select PINCTRL_BCM63XX
  31 +       select GENERIC_PINCONF
  32 --- a/drivers/pinctrl/bcm63xx/Makefile
  33 +++ b/drivers/pinctrl/bcm63xx/Makefile
  34 @@ -1 +1,2 @@
  35  obj-$(CONFIG_PINCTRL_BCM63XX)  += pinctrl-bcm63xx.o
  36 +obj-$(CONFIG_PINCTRL_BCM6328)  += pinctrl-bcm6328.o
  37 --- /dev/null
  38 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
  39 @@ -0,0 +1,501 @@
  40 +/*
  41 + * This file is subject to the terms and conditions of the GNU General Public
  42 + * License.  See the file "COPYING" in the main directory of this archive
  43 + * for more details.
  44 + *
  45 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
  46 + */
  47 +
  48 +#include <linux/bitops.h>
  49 +#include <linux/gpio.h>
  50 +#include <linux/kernel.h>
  51 +#include <linux/slab.h>
  52 +#include <linux/spinlock.h>
  53 +#include <linux/of.h>
  54 +#include <linux/of_gpio.h>
  55 +#include <linux/platform_device.h>
  56 +
  57 +#include <linux/pinctrl/machine.h>
  58 +#include <linux/pinctrl/pinconf.h>
  59 +#include <linux/pinctrl/pinconf-generic.h>
  60 +#include <linux/pinctrl/pinmux.h>
  61 +
  62 +#include "../core.h"
  63 +#include "../pinctrl-utils.h"
  64 +
  65 +#include "pinctrl-bcm63xx.h"
  66 +
  67 +#define BCM6328_MUX_LO_REG     0x4
  68 +#define BCM6328_MUX_HI_REG     0x0
  69 +#define BCM6328_MUX_OTHER_REG  0xc
  70 +
  71 +#define BCM6328_NGPIO          32
  72 +
  73 +struct bcm6328_pingroup {
  74 +       const char *name;
  75 +       const unsigned * const pins;
  76 +       const unsigned num_pins;
  77 +};
  78 +
  79 +struct bcm6328_function {
  80 +       const char *name;
  81 +       const char * const *groups;
  82 +       const unsigned num_groups;
  83 +
  84 +       unsigned mode_val:1;
  85 +       unsigned mux_val:3;
  86 +};
  87 +
  88 +struct bcm6328_pinctrl {
  89 +       struct device *dev;
  90 +       struct pinctrl_dev *pctldev;
  91 +       struct pinctrl_desc desc;
  92 +
  93 +       void __iomem *mode;
  94 +       void __iomem *mux[3];
  95 +
  96 +       spinlock_t lock;
  97 +
  98 +       unsigned long requested[2];
  99 +       struct gpio_chip gpio;
 100 +};
 101 +
 102 +static const struct pinctrl_pin_desc bcm6328_pins[] = {
 103 +       PINCTRL_PIN(0, "gpio0"),
 104 +       PINCTRL_PIN(1, "gpio1"),
 105 +       PINCTRL_PIN(2, "gpio2"),
 106 +       PINCTRL_PIN(3, "gpio3"),
 107 +       PINCTRL_PIN(4, "gpio4"),
 108 +       PINCTRL_PIN(5, "gpio5"),
 109 +       PINCTRL_PIN(6, "gpio6"),
 110 +       PINCTRL_PIN(7, "gpio7"),
 111 +       PINCTRL_PIN(8, "gpio8"),
 112 +       PINCTRL_PIN(9, "gpio9"),
 113 +       PINCTRL_PIN(10, "gpio10"),
 114 +       PINCTRL_PIN(11, "gpio11"),
 115 +       PINCTRL_PIN(12, "gpio12"),
 116 +       PINCTRL_PIN(13, "gpio13"),
 117 +       PINCTRL_PIN(14, "gpio14"),
 118 +       PINCTRL_PIN(15, "gpio15"),
 119 +       PINCTRL_PIN(16, "gpio16"),
 120 +       PINCTRL_PIN(17, "gpio17"),
 121 +       PINCTRL_PIN(18, "gpio18"),
 122 +       PINCTRL_PIN(19, "gpio19"),
 123 +       PINCTRL_PIN(20, "gpio20"),
 124 +       PINCTRL_PIN(21, "gpio21"),
 125 +       PINCTRL_PIN(22, "gpio22"),
 126 +       PINCTRL_PIN(23, "gpio23"),
 127 +       PINCTRL_PIN(24, "gpio24"),
 128 +       PINCTRL_PIN(25, "gpio25"),
 129 +       PINCTRL_PIN(26, "gpio26"),
 130 +       PINCTRL_PIN(27, "gpio27"),
 131 +       PINCTRL_PIN(28, "gpio28"),
 132 +       PINCTRL_PIN(29, "gpio29"),
 133 +       PINCTRL_PIN(30, "gpio30"),
 134 +       PINCTRL_PIN(31, "gpio31"),
 135 +
 136 +       /*
 137 +        * No idea where they really are; so let's put them according
 138 +        * to their mux offsets.
 139 +        */
 140 +       PINCTRL_PIN(36, "hsspi_cs1"),
 141 +       PINCTRL_PIN(38, "usb_p2"),
 142 +};
 143 +
 144 +static unsigned gpio0_pins[] = { 0 };
 145 +static unsigned gpio1_pins[] = { 1 };
 146 +static unsigned gpio2_pins[] = { 2 };
 147 +static unsigned gpio3_pins[] = { 3 };
 148 +static unsigned gpio4_pins[] = { 4 };
 149 +static unsigned gpio5_pins[] = { 5 };
 150 +static unsigned gpio6_pins[] = { 6 };
 151 +static unsigned gpio7_pins[] = { 7 };
 152 +static unsigned gpio8_pins[] = { 8 };
 153 +static unsigned gpio9_pins[] = { 9 };
 154 +static unsigned gpio10_pins[] = { 10 };
 155 +static unsigned gpio11_pins[] = { 11 };
 156 +static unsigned gpio12_pins[] = { 12 };
 157 +static unsigned gpio13_pins[] = { 13 };
 158 +static unsigned gpio14_pins[] = { 14 };
 159 +static unsigned gpio15_pins[] = { 15 };
 160 +static unsigned gpio16_pins[] = { 16 };
 161 +static unsigned gpio17_pins[] = { 17 };
 162 +static unsigned gpio18_pins[] = { 18 };
 163 +static unsigned gpio19_pins[] = { 19 };
 164 +static unsigned gpio20_pins[] = { 20 };
 165 +static unsigned gpio21_pins[] = { 21 };
 166 +static unsigned gpio22_pins[] = { 22 };
 167 +static unsigned gpio23_pins[] = { 23 };
 168 +static unsigned gpio24_pins[] = { 24 };
 169 +static unsigned gpio25_pins[] = { 25 };
 170 +static unsigned gpio26_pins[] = { 26 };
 171 +static unsigned gpio27_pins[] = { 27 };
 172 +static unsigned gpio28_pins[] = { 28 };
 173 +static unsigned gpio29_pins[] = { 29 };
 174 +static unsigned gpio30_pins[] = { 30 };
 175 +static unsigned gpio31_pins[] = { 31 };
 176 +
 177 +static unsigned hsspi_cs1_pins[] = { 36 };
 178 +static unsigned usb_port1_pins[] = { 38 };
 179 +
 180 +#define BCM6328_GROUP(n)                                       \
 181 +       {                                                       \
 182 +               .name = #n,                                     \
 183 +               .pins = n##_pins,                               \
 184 +               .num_pins = ARRAY_SIZE(n##_pins),               \
 185 +       }
 186 +
 187 +static struct bcm6328_pingroup bcm6328_groups[] = {
 188 +       BCM6328_GROUP(gpio0),
 189 +       BCM6328_GROUP(gpio1),
 190 +       BCM6328_GROUP(gpio2),
 191 +       BCM6328_GROUP(gpio3),
 192 +       BCM6328_GROUP(gpio4),
 193 +       BCM6328_GROUP(gpio5),
 194 +       BCM6328_GROUP(gpio6),
 195 +       BCM6328_GROUP(gpio7),
 196 +       BCM6328_GROUP(gpio8),
 197 +       BCM6328_GROUP(gpio9),
 198 +       BCM6328_GROUP(gpio10),
 199 +       BCM6328_GROUP(gpio11),
 200 +       BCM6328_GROUP(gpio12),
 201 +       BCM6328_GROUP(gpio13),
 202 +       BCM6328_GROUP(gpio14),
 203 +       BCM6328_GROUP(gpio15),
 204 +       BCM6328_GROUP(gpio16),
 205 +       BCM6328_GROUP(gpio17),
 206 +       BCM6328_GROUP(gpio18),
 207 +       BCM6328_GROUP(gpio19),
 208 +       BCM6328_GROUP(gpio20),
 209 +       BCM6328_GROUP(gpio21),
 210 +       BCM6328_GROUP(gpio22),
 211 +       BCM6328_GROUP(gpio23),
 212 +       BCM6328_GROUP(gpio24),
 213 +       BCM6328_GROUP(gpio25),
 214 +       BCM6328_GROUP(gpio26),
 215 +       BCM6328_GROUP(gpio27),
 216 +       BCM6328_GROUP(gpio28),
 217 +       BCM6328_GROUP(gpio29),
 218 +       BCM6328_GROUP(gpio30),
 219 +       BCM6328_GROUP(gpio31),
 220 +
 221 +       BCM6328_GROUP(hsspi_cs1),
 222 +       BCM6328_GROUP(usb_port1),
 223 +};
 224 +
 225 +/* GPIO_MODE */
 226 +static const char * const led_groups[] = {
 227 +       "gpio0",
 228 +       "gpio1",
 229 +       "gpio2",
 230 +       "gpio3",
 231 +       "gpio4",
 232 +       "gpio5",
 233 +       "gpio6",
 234 +       "gpio7",
 235 +       "gpio8",
 236 +       "gpio9",
 237 +       "gpio10",
 238 +       "gpio11",
 239 +       "gpio12",
 240 +       "gpio13",
 241 +       "gpio14",
 242 +       "gpio15",
 243 +       "gpio16",
 244 +       "gpio17",
 245 +       "gpio18",
 246 +       "gpio19",
 247 +       "gpio20",
 248 +       "gpio21",
 249 +       "gpio22",
 250 +       "gpio23",
 251 +};
 252 +
 253 +/* PINMUX_SEL */
 254 +static const char * const serial_led_data_groups[] = {
 255 +       "gpio6",
 256 +};
 257 +
 258 +static const char * const serial_led_clk_groups[] = {
 259 +       "gpio7",
 260 +};
 261 +
 262 +static const char * const inet_act_led_groups[] = {
 263 +       "gpio11",
 264 +};
 265 +
 266 +static const char * const pcie_clkreq_groups[] = {
 267 +       "gpio16",
 268 +};
 269 +
 270 +static const char * const ephy0_act_led_groups[] = {
 271 +       "gpio25",
 272 +};
 273 +
 274 +static const char * const ephy1_act_led_groups[] = {
 275 +       "gpio26",
 276 +};
 277 +
 278 +static const char * const ephy2_act_led_groups[] = {
 279 +       "gpio27",
 280 +};
 281 +
 282 +static const char * const ephy3_act_led_groups[] = {
 283 +       "gpio28",
 284 +};
 285 +
 286 +static const char * const hsspi_cs1_groups[] = {
 287 +       "hsspi_cs1"
 288 +};
 289 +
 290 +static const char * const usb_host_port_groups[] = {
 291 +       "usb_port1",
 292 +};
 293 +
 294 +static const char * const usb_device_port_groups[] = {
 295 +       "usb_port1",
 296 +};
 297 +
 298 +#define BCM6328_MODE_FUN(n)                            \
 299 +       {                                               \
 300 +               .name = #n,                             \
 301 +               .groups = n##_groups,                   \
 302 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 303 +               .mode_val = 1,                          \
 304 +       }
 305 +
 306 +#define BCM6328_MUX_FUN(n, mux)                                \
 307 +       {                                               \
 308 +               .name = #n,                             \
 309 +               .groups = n##_groups,                   \
 310 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 311 +               .mux_val = mux,                         \
 312 +       }
 313 +
 314 +static const struct bcm6328_function bcm6328_funcs[] = {
 315 +       BCM6328_MODE_FUN(led),
 316 +       BCM6328_MUX_FUN(serial_led_data, 2),
 317 +       BCM6328_MUX_FUN(serial_led_clk, 2),
 318 +       BCM6328_MUX_FUN(inet_act_led, 1),
 319 +       BCM6328_MUX_FUN(pcie_clkreq, 2),
 320 +       BCM6328_MUX_FUN(ephy0_act_led, 1),
 321 +       BCM6328_MUX_FUN(ephy1_act_led, 1),
 322 +       BCM6328_MUX_FUN(ephy2_act_led, 1),
 323 +       BCM6328_MUX_FUN(ephy3_act_led, 1),
 324 +       BCM6328_MUX_FUN(hsspi_cs1, 2),
 325 +       BCM6328_MUX_FUN(usb_host_port, 1),
 326 +       BCM6328_MUX_FUN(usb_device_port, 2),
 327 +};
 328 +
 329 +static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 330 +{
 331 +       return ARRAY_SIZE(bcm6328_groups);
 332 +}
 333 +
 334 +static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 335 +                                                 unsigned group)
 336 +{
 337 +       return bcm6328_groups[group].name;
 338 +}
 339 +
 340 +static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 341 +                                         unsigned group, const unsigned **pins,
 342 +                                         unsigned *num_pins)
 343 +{
 344 +       *pins = bcm6328_groups[group].pins;
 345 +       *num_pins = bcm6328_groups[group].num_pins;
 346 +
 347 +       return 0;
 348 +}
 349 +
 350 +static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
 351 +{
 352 +       return ARRAY_SIZE(bcm6328_funcs);
 353 +}
 354 +
 355 +static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 356 +                                                unsigned selector)
 357 +{
 358 +       return bcm6328_funcs[selector].name;
 359 +}
 360 +
 361 +static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
 362 +                                     unsigned selector,
 363 +                                     const char * const **groups,
 364 +                                     unsigned * const num_groups)
 365 +{
 366 +       *groups = bcm6328_funcs[selector].groups;
 367 +       *num_groups = bcm6328_funcs[selector].num_groups;
 368 +
 369 +       return 0;
 370 +}
 371 +
 372 +static void bcm6328_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
 373 +                                        struct seq_file *s,
 374 +                                        unsigned offset)
 375 +{
 376 +       seq_printf(s, " %s", dev_name(pctldev->dev));
 377 +}
 378 +
 379 +static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
 380 +                           u32 mode, u32 mux)
 381 +{
 382 +       unsigned long flags;
 383 +       u32 reg;
 384 +
 385 +       spin_lock_irqsave(&pctl->lock, flags);
 386 +       if (pin < 32) {
 387 +               reg = __raw_readl(pctl->mode);
 388 +               reg &= ~BIT(pin);
 389 +               if (mode)
 390 +                       reg |= BIT(pin);
 391 +               __raw_writel(reg, pctl->mode);
 392 +       }
 393 +
 394 +       reg = __raw_readl(pctl->mux[pin / 16]);
 395 +       reg &= ~(3UL << (pin % 16));
 396 +       reg |= mux << (pin % 16);
 397 +       __raw_writel(reg, pctl->mux[pin / 16]);
 398 +
 399 +       spin_unlock_irqrestore(&pctl->lock, flags);
 400 +}
 401 +
 402 +static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 403 +                                  unsigned selector, unsigned group)
 404 +{
 405 +       struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 406 +       const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
 407 +       const struct bcm6328_function *f = &bcm6328_funcs[selector];
 408 +
 409 +       bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
 410 +
 411 +       return 0;
 412 +}
 413 +
 414 +static int bcm6328_pinctrl_request(struct pinctrl_dev *pctldev,
 415 +                                  unsigned offset)
 416 +{
 417 +       struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 418 +
 419 +       if (test_and_set_bit(offset, pctl->requested))
 420 +               return -EBUSY;
 421 +
 422 +       return 0;
 423 +}
 424 +
 425 +static int bcm6328_pinctrl_free(struct pinctrl_dev *pctldev,
 426 +                               unsigned offset)
 427 +{
 428 +       struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 429 +
 430 +       clear_bit(offset, pctl->requested);
 431 +
 432 +       return 0;
 433 +}
 434 +
 435 +static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
 436 +                                      struct pinctrl_gpio_range *range,
 437 +                                      unsigned offset)
 438 +{
 439 +       struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 440 +
 441 +       if (test_and_set_bit(offset, pctl->requested))
 442 +               return -EBUSY;
 443 +
 444 +       /* disable all functions using this pin */
 445 +       bcm6328_rmw_mux(pctl, offset, 0, 0);
 446 +
 447 +       return 0;
 448 +}
 449 +
 450 +static void bcm6328_gpio_disable_free(struct pinctrl_dev *pctldev,
 451 +                                     struct pinctrl_gpio_range *range,
 452 +                                     unsigned offset)
 453 +{
 454 +       struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 455 +
 456 +       clear_bit(offset, pctl->requested);
 457 +}
 458 +
 459 +static struct pinctrl_ops bcm6328_pctl_ops = {
 460 +       .get_groups_count       = bcm6328_pinctrl_get_group_count,
 461 +       .get_group_name         = bcm6328_pinctrl_get_group_name,
 462 +       .get_group_pins         = bcm6328_pinctrl_get_group_pins,
 463 +#ifdef CONFIG_OF
 464 +       .dt_node_to_map         = pinconf_generic_dt_node_to_map_pin,
 465 +       .dt_free_map            = pinctrl_utils_dt_free_map,
 466 +#endif
 467 +       .pin_dbg_show           = bcm6328_pinctrl_pin_dbg_show,
 468 +};
 469 +
 470 +static struct pinmux_ops bcm6328_pmx_ops = {
 471 +       .request                = bcm6328_pinctrl_request,
 472 +       .free                   = bcm6328_pinctrl_free,
 473 +       .get_functions_count    = bcm6328_pinctrl_get_func_count,
 474 +       .get_function_name      = bcm6328_pinctrl_get_func_name,
 475 +       .get_function_groups    = bcm6328_pinctrl_get_groups,
 476 +       .set_mux                = bcm6328_pinctrl_set_mux,
 477 +       .gpio_request_enable    = bcm6328_gpio_request_enable,
 478 +       .gpio_disable_free      = bcm6328_gpio_disable_free,
 479 +};
 480 +
 481 +static int bcm6328_pinctrl_probe(struct platform_device *pdev)
 482 +{
 483 +       struct bcm6328_pinctrl *pctl;
 484 +       struct resource *res;
 485 +       void __iomem *mode, *mux;
 486 +
 487 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
 488 +       mode = devm_ioremap_resource(&pdev->dev, res);
 489 +       if (IS_ERR(mode))
 490 +               return PTR_ERR(mode);
 491 +
 492 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
 493 +       mux = devm_ioremap_resource(&pdev->dev, res);
 494 +       if (IS_ERR(mux))
 495 +               return PTR_ERR(mux);
 496 +
 497 +       pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 498 +       if (!pctl)
 499 +               return -ENOMEM;
 500 +
 501 +       spin_lock_init(&pctl->lock);
 502 +
 503 +       pctl->mode = mode;
 504 +       pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
 505 +       pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
 506 +       pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
 507 +
 508 +       pctl->desc.name = dev_name(&pdev->dev);
 509 +       pctl->desc.owner = THIS_MODULE;
 510 +       pctl->desc.pctlops = &bcm6328_pctl_ops;
 511 +       pctl->desc.pmxops = &bcm6328_pmx_ops;
 512 +       pctl->dev = &pdev->dev;
 513 +
 514 +       pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
 515 +       pctl->desc.pins = bcm6328_pins;
 516 +
 517 +       platform_set_drvdata(pdev, pctl);
 518 +
 519 +       pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
 520 +                                                &pctl->gpio, BCM6328_NGPIO);
 521 +       if (IS_ERR(pctl->pctldev))
 522 +               return PTR_ERR(pctl->pctldev);
 523 +
 524 +       return 0;
 525 +}
 526 +
 527 +static const struct of_device_id bcm6328_pinctrl_match[] = {
 528 +       { .compatible = "brcm,bcm6328-pinctrl", },
 529 +       { },
 530 +};
 531 +
 532 +static struct platform_driver bcm6328_pinctrl_driver = {
 533 +       .probe = bcm6328_pinctrl_probe,
 534 +       .driver = {
 535 +               .name = "bcm6328-pinctrl",
 536 +               .of_match_table = bcm6328_pinctrl_match,
 537 +       },
 538 +};
 539 +
 540 +builtin_platform_driver(bcm6328_pinctrl_driver);