1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
34 #if !defined(__DWC_PCD_H__)
37 #include <linux/types.h>
38 #include <linux/list.h>
39 #include <linux/errno.h>
40 #include <linux/device.h>
41 #include <linux/platform_device.h>
43 #include <linux/usb/ch9.h>
44 #include <linux/usb/gadget.h>
46 #include <linux/interrupt.h>
47 #include <linux/dma-mapping.h>
49 struct dwc_otg_device
;
56 * This file contains the structures, constants, and interfaces for
57 * the Perpherial Contoller Driver (PCD).
59 * The Peripheral Controller Driver (PCD) for Linux will implement the
60 * Gadget API, so that the existing Gadget drivers can be used. For
61 * the Mass Storage Function driver the File-backed USB Storage Gadget
62 * (FBS) driver will be used. The FBS driver supports the
63 * Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only
68 /** Invalid DMA Address */
69 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
70 /** Maxpacket size for EP0 */
71 #define MAX_EP0_SIZE 64
72 /** Maxpacket size for any EP */
73 #define MAX_PACKET_SIZE 1024
75 /** Max Transfer size for any EP */
76 #define MAX_TRANSFER_SIZE 65535
78 /** Max DMA Descriptor count for any EP */
79 #define MAX_DMA_DESC_CNT 64
82 * Get the pointer to the core_if from the pcd pointer.
84 #define GET_CORE_IF( _pcd ) (_pcd->otg_dev->core_if)
89 typedef enum ep0_state
91 EP0_DISCONNECT
, /* no host */
100 /** Fordward declaration.*/
103 /** DWC_otg iso request structure.
106 typedef struct usb_iso_request dwc_otg_pcd_iso_request_t
;
108 /** PCD EP structure.
109 * This structure describes an EP, there is an array of EPs in the PCD
112 typedef struct dwc_otg_pcd_ep
116 /** USB EP Descriptor */
117 const struct usb_endpoint_descriptor
*desc
;
119 /** queue of dwc_otg_pcd_requests. */
120 struct list_head queue
;
121 unsigned stopped
: 1;
122 unsigned disabling
: 1;
124 unsigned queue_sof
: 1;
127 /** DWC_otg Isochronous Transfer */
128 struct usb_iso_request
* iso_req
;
131 /** DWC_otg ep data. */
134 /** Pointer to PCD */
135 struct dwc_otg_pcd
*pcd
;
140 /** DWC_otg PCD Structure.
141 * This structure encapsulates the data for the dwc_otg PCD.
143 typedef struct dwc_otg_pcd
146 struct usb_gadget gadget
;
147 /** USB gadget driver pointer*/
148 struct usb_gadget_driver
*driver
;
149 /** The DWC otg device pointer. */
150 struct dwc_otg_device
*otg_dev
;
154 /** EP0 Request is pending */
155 unsigned ep0_pending
: 1;
156 /** Indicates when SET CONFIGURATION Request is in process */
157 unsigned request_config
: 1;
158 /** The state of the Remote Wakeup Enable. */
159 unsigned remote_wakeup_enable
: 1;
160 /** The state of the B-Device HNP Enable. */
161 unsigned b_hnp_enable
: 1;
162 /** The state of A-Device HNP Support. */
163 unsigned a_hnp_support
: 1;
164 /** The state of the A-Device Alt HNP support. */
165 unsigned a_alt_hnp_support
: 1;
166 /** Count of pending Requests */
167 unsigned request_pending
;
169 /** SETUP packet for EP0
170 * This structure is allocated as a DMA buffer on PCD initialization
171 * with enough space for up to 3 setup packets.
175 struct usb_ctrlrequest req
;
179 dma_addr_t setup_pkt_dma_handle
;
181 /** 2-byte dma buffer used to return status from GET_STATUS */
182 uint16_t *status_buf
;
183 dma_addr_t status_buf_dma_handle
;
186 dwc_otg_pcd_ep_t ep0
;
188 /** Array of IN EPs. */
189 dwc_otg_pcd_ep_t in_ep
[ MAX_EPS_CHANNELS
- 1];
190 /** Array of OUT EPs. */
191 dwc_otg_pcd_ep_t out_ep
[ MAX_EPS_CHANNELS
- 1];
192 /** number of valid EPs in the above array. */
193 // unsigned num_eps : 4;
195 /** Timer for SRP. If it expires before SRP is successful
197 struct timer_list srp_timer
;
199 /** Tasklet to defer starting of TEST mode transmissions until
200 * Status Phase has been completed.
202 struct tasklet_struct test_mode_tasklet
;
204 /** Tasklet to delay starting of xfer in DMA mode */
205 struct tasklet_struct
*start_xfer_tasklet
;
207 /** The test mode to enter when the tasklet is executed. */
213 /** DWC_otg request structure.
214 * This structure is a list of requests.
218 struct usb_request req
; /**< USB Request. */
219 struct list_head queue
; /**< queue of these requests. */
220 } dwc_otg_pcd_request_t
;
223 extern int dwc_otg_pcd_init(struct platform_device
*pdev
);
225 //extern void dwc_otg_pcd_remove( struct dwc_otg_device *_otg_dev );
226 extern void dwc_otg_pcd_remove( struct platform_device
*pdev
);
227 extern int32_t dwc_otg_pcd_handle_intr( dwc_otg_pcd_t
*pcd
);
228 extern void dwc_otg_pcd_start_srp_timer(dwc_otg_pcd_t
*pcd
);
230 extern void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t
*pcd
);
231 extern void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t
*pcd
, int set
);
233 extern void dwc_otg_iso_buffer_done(dwc_otg_pcd_ep_t
*ep
, dwc_otg_pcd_iso_request_t
*req
);
234 extern void dwc_otg_request_done(dwc_otg_pcd_ep_t
*_ep
, dwc_otg_pcd_request_t
*req
,
236 extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t
*_ep
);
237 extern void dwc_otg_pcd_update_otg(dwc_otg_pcd_t
*_pcd
,
238 const unsigned reset
);
240 #define VERIFY_PCD_DMA_ADDR(_addr_) BUG_ON(((_addr_)==DMA_ADDR_INVALID)||\
244 #define VERIFY_PCD_DMA_ADDR(_addr_) {\
245 if(((_addr_)==DMA_ADDR_INVALID)||\
248 printk("%s: Invalid DMA address "#_addr_"(%.8x)\n",__func__,_addr_);\
255 static inline void ep_check_and_patch_dma_addr(dwc_otg_pcd_ep_t
*ep
){
256 //void ep_check_and_patch_dma_addr(dwc_otg_pcd_ep_t *ep){
257 dwc_ep_t
*dwc_ep
=&ep
->dwc_ep
;
259 DWC_DEBUGPL(DBG_PCDV
,"%s: dwc_ep xfer_buf=%.8x, total_len=%d, dma_addr=%.8x\n",__func__
,(u32
)dwc_ep
->xfer_buff
,(dwc_ep
->total_len
),dwc_ep
->dma_addr
);
260 if (/*(core_if->dma_enable)&&*/(dwc_ep
->dma_addr
==DMA_ADDR_INVALID
)) {
261 if((((u32
)dwc_ep
->xfer_buff
)&0x3)==0){
262 dwc_ep
->dma_addr
=dma_map_single(NULL
,(void *)(dwc_ep
->start_xfer_buff
),(dwc_ep
->total_len
), DMA_TO_DEVICE
);
263 DWC_DEBUGPL(DBG_PCDV
," got dma_addr=%.8x\n",dwc_ep
->dma_addr
);
265 DWC_DEBUGPL(DBG_PCDV
," buf not aligned, use aligned_buf instead. xfer_buf=%.8x, total_len=%d, aligned_buf_size=%d\n",(u32
)dwc_ep
->xfer_buff
,(dwc_ep
->total_len
),dwc_ep
->aligned_buf_size
);
266 if(dwc_ep
->aligned_buf_size
<dwc_ep
->total_len
){
267 if(dwc_ep
->aligned_buf
){
268 //printk(" free buff dwc_ep aligned_buf_size=%d, aligned_buf(%.8x), aligned_dma_addr(%.8x));\n",dwc_ep->aligned_buf_size,dwc_ep->aligned_buf,dwc_ep->aligned_dma_addr);
269 //dma_free_coherent(NULL,dwc_ep->aligned_buf_size,dwc_ep->aligned_buf,dwc_ep->aligned_dma_addr);
270 kfree(dwc_ep
->aligned_buf
);
272 dwc_ep
->aligned_buf_size
=((1<<20)>(dwc_ep
->total_len
<<1))?(dwc_ep
->total_len
<<1):(1<<20);
273 //dwc_ep->aligned_buf = dma_alloc_coherent (NULL, dwc_ep->aligned_buf_size, &dwc_ep->aligned_dma_addr, GFP_KERNEL|GFP_DMA);
274 dwc_ep
->aligned_buf
=kmalloc(dwc_ep
->aligned_buf_size
,GFP_KERNEL
|GFP_DMA
|GFP_ATOMIC
);
275 dwc_ep
->aligned_dma_addr
=dma_map_single(NULL
,(void *)(dwc_ep
->aligned_buf
),(dwc_ep
->aligned_buf_size
),DMA_FROM_DEVICE
);
276 if(!dwc_ep
->aligned_buf
){
277 DWC_ERROR("Cannot alloc required buffer!!\n");
280 DWC_DEBUGPL(DBG_PCDV
," dwc_ep allocated aligned buf=%.8x, dma_addr=%.8x, size=%d(0x%x)\n", (u32
)dwc_ep
->aligned_buf
, dwc_ep
->aligned_dma_addr
, dwc_ep
->aligned_buf_size
, dwc_ep
->aligned_buf_size
);
282 dwc_ep
->dma_addr
=dwc_ep
->aligned_dma_addr
;
284 memcpy(dwc_ep
->aligned_buf
,dwc_ep
->xfer_buff
,dwc_ep
->total_len
);
285 dma_sync_single_for_device(NULL
,dwc_ep
->dma_addr
,dwc_ep
->total_len
,DMA_TO_DEVICE
);
292 #endif /* DWC_HOST_ONLY */