target/linux/d1/patches-6.1/0030-riscv-dts-allwinner-Add-Sipeed-Lichee-RV-devicetrees.patch

   1 From 3bf76e93011425ed64a69c462b9959ed2a8ccf46 Mon Sep 17 00:00:00 2001
   2 From: Samuel Holland <samuel@sholland.org>
   3 Date: Wed, 29 Jun 2022 00:13:50 -0500
   4 Subject: [PATCH 030/117] riscv: dts: allwinner: Add Sipeed Lichee RV
   5  devicetrees
   6
   7 Sipeed manufactures a "Lichee RV" system-on-module, which provides a
   8 minimal working system on its own, as well as a few carrier boards. The
   9 "Dock" board provides audio, USB, and WiFi. The "86 Panel" additionally
  10 provides 100M Ethernet and a built-in display panel.
  11
  12 The 86 Panel repurposes the USB ID and VBUS detection GPIOs for its RGB
  13 panel interface, since the USB OTG port is inaccessible inside the case.
  14
  15 Co-developed-by: Jisheng Zhang <jszhang@kernel.org>
  16 Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
  17 Signed-off-by: Samuel Holland <samuel@sholland.org>
  18 ---
  19  arch/riscv/boot/dts/allwinner/Makefile        |  4 +
  20  .../sun20i-d1-lichee-rv-86-panel-480p.dts     | 29 ++++++
  21  .../sun20i-d1-lichee-rv-86-panel-720p.dts     | 10 ++
  22  .../sun20i-d1-lichee-rv-86-panel.dtsi         | 92 +++++++++++++++++++
  23  .../allwinner/sun20i-d1-lichee-rv-dock.dts    | 74 +++++++++++++++
  24  .../dts/allwinner/sun20i-d1-lichee-rv.dts     | 84 +++++++++++++++++
  25  6 files changed, 293 insertions(+)
  26  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts
  27  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts
  28  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
  29  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts
  30  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts
  31
  32 --- a/arch/riscv/boot/dts/allwinner/Makefile
  33 +++ b/arch/riscv/boot/dts/allwinner/Makefile
  34 @@ -1,2 +1,6 @@
  35  # SPDX-License-Identifier: GPL-2.0
  36 +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
  37 +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
  38 +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb
  39 +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv.dtb
  40  dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb
  41 --- /dev/null
  42 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts
  43 @@ -0,0 +1,29 @@
  44 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  45 +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
  46 +
  47 +#include "sun20i-d1-lichee-rv-86-panel.dtsi"
  48 +
  49 +/ {
  50 +       model = "Sipeed Lichee RV 86 Panel (480p)";
  51 +       compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
  52 +                    "allwinner,sun20i-d1";
  53 +};
  54 +
  55 +&i2c2 {
  56 +       pinctrl-0 = <&i2c2_pb0_pins>;
  57 +       pinctrl-names = "default";
  58 +       status = "okay";
  59 +
  60 +       touchscreen@48 {
  61 +               compatible = "focaltech,ft6236";
  62 +               reg = <0x48>;
  63 +               interrupt-parent = <&pio>;
  64 +               interrupts = <6 14 IRQ_TYPE_LEVEL_LOW>; /* PG14 */
  65 +               iovcc-supply = <&reg_vcc_3v3>;
  66 +               reset-gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */
  67 +               touchscreen-size-x = <480>;
  68 +               touchscreen-size-y = <480>;
  69 +               vcc-supply = <&reg_vcc_3v3>;
  70 +               wakeup-source;
  71 +       };
  72 +};
  73 --- /dev/null
  74 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts
  75 @@ -0,0 +1,10 @@
  76 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  77 +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
  78 +
  79 +#include "sun20i-d1-lichee-rv-86-panel.dtsi"
  80 +
  81 +/ {
  82 +       model = "Sipeed Lichee RV 86 Panel (720p)";
  83 +       compatible = "sipeed,lichee-rv-86-panel-720p", "sipeed,lichee-rv",
  84 +                    "allwinner,sun20i-d1";
  85 +};
  86 --- /dev/null
  87 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
  88 @@ -0,0 +1,92 @@
  89 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  90 +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
  91 +
  92 +#include "sun20i-d1-lichee-rv.dts"
  93 +
  94 +/ {
  95 +       aliases {
  96 +               ethernet0 = &emac;
  97 +               ethernet1 = &xr829;
  98 +       };
  99 +
 100 +       /* PC1 is repurposed as BT_WAKE_AP */
 101 +       /delete-node/ leds;
 102 +
 103 +       wifi_pwrseq: wifi-pwrseq {
 104 +               compatible = "mmc-pwrseq-simple";
 105 +               clocks = <&ccu CLK_FANOUT1>;
 106 +               clock-names = "ext_clock";
 107 +               reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
 108 +               assigned-clocks = <&ccu CLK_FANOUT1>;
 109 +               assigned-clock-rates = <32768>;
 110 +               pinctrl-0 = <&clk_pg11_pin>;
 111 +               pinctrl-names = "default";
 112 +       };
 113 +};
 114 +
 115 +&ehci1 {
 116 +       status = "okay";
 117 +};
 118 +
 119 +&emac {
 120 +       pinctrl-0 = <&rmii_pe_pins>;
 121 +       pinctrl-names = "default";
 122 +       phy-handle = <&ext_rmii_phy>;
 123 +       phy-mode = "rmii";
 124 +       phy-supply = <&reg_vcc_3v3>;
 125 +       status = "okay";
 126 +};
 127 +
 128 +&mdio {
 129 +       ext_rmii_phy: ethernet-phy@1 {
 130 +               compatible = "ethernet-phy-ieee802.3-c22";
 131 +               reg = <1>;
 132 +               reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
 133 +       };
 134 +};
 135 +
 136 +&mmc1 {
 137 +       bus-width = <4>;
 138 +       mmc-pwrseq = <&wifi_pwrseq>;
 139 +       non-removable;
 140 +       vmmc-supply = <&reg_vcc_3v3>;
 141 +       vqmmc-supply = <&reg_vcc_3v3>;
 142 +       pinctrl-0 = <&mmc1_pins>;
 143 +       pinctrl-names = "default";
 144 +       status = "okay";
 145 +
 146 +       xr829: wifi@1 {
 147 +               reg = <1>;
 148 +       };
 149 +};
 150 +
 151 +&ohci1 {
 152 +       status = "okay";
 153 +};
 154 +
 155 +&pio {
 156 +       clk_pg11_pin: clk-pg11-pin {
 157 +               pins = "PG11";
 158 +               function = "clk";
 159 +       };
 160 +};
 161 +
 162 +&uart1 {
 163 +       uart-has-rtscts;
 164 +       pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
 165 +       pinctrl-names = "default";
 166 +       status = "okay";
 167 +
 168 +       /* XR829 bluetooth is connected here */
 169 +};
 170 +
 171 +&usb_otg {
 172 +       status = "disabled";
 173 +};
 174 +
 175 +&usbphy {
 176 +       /* PD20 and PD21 are repurposed for the LCD panel */
 177 +       /delete-property/ usb0_id_det-gpios;
 178 +       /delete-property/ usb0_vbus_det-gpios;
 179 +       usb1_vbus-supply = <&reg_vcc>;
 180 +};
 181 --- /dev/null
 182 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts
 183 @@ -0,0 +1,74 @@
 184 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
 185 +// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
 186 +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
 187 +
 188 +#include <dt-bindings/input/input.h>
 189 +
 190 +#include "sun20i-d1-lichee-rv.dts"
 191 +
 192 +/ {
 193 +       model = "Sipeed Lichee RV Dock";
 194 +       compatible = "sipeed,lichee-rv-dock", "sipeed,lichee-rv",
 195 +                    "allwinner,sun20i-d1";
 196 +
 197 +       aliases {
 198 +               ethernet1 = &rtl8723ds;
 199 +       };
 200 +
 201 +       wifi_pwrseq: wifi-pwrseq {
 202 +               compatible = "mmc-pwrseq-simple";
 203 +               reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
 204 +       };
 205 +};
 206 +
 207 +&ehci1 {
 208 +       status = "okay";
 209 +};
 210 +
 211 +&lradc {
 212 +       status = "okay";
 213 +
 214 +       button-220 {
 215 +               label = "OK";
 216 +               linux,code = <KEY_OK>;
 217 +               channel = <0>;
 218 +               voltage = <220000>;
 219 +       };
 220 +};
 221 +
 222 +&mmc1 {
 223 +       bus-width = <4>;
 224 +       mmc-pwrseq = <&wifi_pwrseq>;
 225 +       non-removable;
 226 +       vmmc-supply = <&reg_vcc_3v3>;
 227 +       vqmmc-supply = <&reg_vcc_3v3>;
 228 +       pinctrl-0 = <&mmc1_pins>;
 229 +       pinctrl-names = "default";
 230 +       status = "okay";
 231 +
 232 +       rtl8723ds: wifi@1 {
 233 +               reg = <1>;
 234 +       };
 235 +};
 236 +
 237 +&ohci1 {
 238 +       status = "okay";
 239 +};
 240 +
 241 +&uart1 {
 242 +       uart-has-rtscts;
 243 +       pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
 244 +       pinctrl-names = "default";
 245 +       status = "okay";
 246 +
 247 +       bluetooth {
 248 +               compatible = "realtek,rtl8723ds-bt";
 249 +               device-wake-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG16 */
 250 +               enable-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */
 251 +               host-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */
 252 +       };
 253 +};
 254 +
 255 +&usbphy {
 256 +       usb1_vbus-supply = <&reg_vcc>;
 257 +};
 258 --- /dev/null
 259 +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts
 260 @@ -0,0 +1,84 @@
 261 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
 262 +// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
 263 +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
 264 +
 265 +/dts-v1/;
 266 +
 267 +#include <dt-bindings/gpio/gpio.h>
 268 +#include <dt-bindings/leds/common.h>
 269 +
 270 +#include "sun20i-d1.dtsi"
 271 +#include "sun20i-d1-common-regulators.dtsi"
 272 +
 273 +/ {
 274 +       model = "Sipeed Lichee RV";
 275 +       compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1";
 276 +
 277 +       aliases {
 278 +               mmc0 = &mmc0;
 279 +               serial0 = &uart0;
 280 +       };
 281 +
 282 +       chosen {
 283 +               stdout-path = "serial0:115200n8";
 284 +       };
 285 +
 286 +       leds {
 287 +               compatible = "gpio-leds";
 288 +
 289 +               led-0 {
 290 +                       color = <LED_COLOR_ID_GREEN>;
 291 +                       function = LED_FUNCTION_STATUS;
 292 +                       gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
 293 +               };
 294 +       };
 295 +
 296 +       reg_vdd_cpu: vdd-cpu {
 297 +               compatible = "regulator-fixed";
 298 +               regulator-name = "vdd-cpu";
 299 +               regulator-min-microvolt = <900000>;
 300 +               regulator-max-microvolt = <900000>;
 301 +               vin-supply = <&reg_vcc>;
 302 +       };
 303 +};
 304 +
 305 +&cpu0 {
 306 +       cpu-supply = <&reg_vdd_cpu>;
 307 +};
 308 +
 309 +&ehci0 {
 310 +       status = "okay";
 311 +};
 312 +
 313 +&mmc0 {
 314 +       broken-cd;
 315 +       bus-width = <4>;
 316 +       disable-wp;
 317 +       vmmc-supply = <&reg_vcc_3v3>;
 318 +       vqmmc-supply = <&reg_vcc_3v3>;
 319 +       pinctrl-0 = <&mmc0_pins>;
 320 +       pinctrl-names = "default";
 321 +       status = "okay";
 322 +};
 323 +
 324 +&ohci0 {
 325 +       status = "okay";
 326 +};
 327 +
 328 +&uart0 {
 329 +       pinctrl-0 = <&uart0_pb8_pins>;
 330 +       pinctrl-names = "default";
 331 +       status = "okay";
 332 +};
 333 +
 334 +&usb_otg {
 335 +       dr_mode = "otg";
 336 +       status = "okay";
 337 +};
 338 +
 339 +&usbphy {
 340 +       usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
 341 +       usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
 342 +       usb0_vbus-supply = <&reg_vcc>;
 343 +       status = "okay";
 344 +};